STM32H742VG

Part: STM32H742xI/G, STM32H743xI/G — STMicroelectronics

Type: 32-bit ARM Cortex-M7 Microcontroller

Description: 480 MHz 32-bit ARM Cortex-M7 MCU with DP-FPU, up to 2 MB Flash, 1 MB RAM, advanced graphics acceleration, and extensive communication and analog interfaces.

Operating Conditions:

• Supply voltage: 1.62 to 3.6 V (VDD, VDDLDO)
• Operating temperature: -40 to +85 °C (suffix 6, maximum power dissipation)
• Analog operating voltage (VDDA): 1.62 to 3.6 V (ADC/COMP), 1.8 to 3.6 V (DAC/VREFBUF), 2.0 to 3.6 V (OPAMP)
• Maximum CPU frequency: up to 480 MHz

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V (VDDX - VSS)
• Max continuous current: 620 mA (Σ IVDD total current into sum of all VDD lines)
• Max junction/storage temperature: -65 to +150 °C (storage), 125 °C (junction)

Key Specs:

• Maximum CPU core clock: 480 MHz (1027 DMIPS / 2.14 DMIPS/MHz)
• Total current sink: 620 mA (Σ IVSS max out of sum of all VSS lines)
• Current per supply pin: 100 mA (IVDD max into each VDD pin / IVSS max out of each VSS pin)
• Output current sunk by standard I/O pin: 20 mA (IIO max)
• Total output current sunk/sourced by sum of all I/Os: 140 mA (Σ I(PIN))
• Flash memory capacity: up to 2 Mbytes with read-while-write support
• SRAM capacity: up to 1 Mbyte (including 192 KB TCM RAM and 4 KB backup SRAM)
• ADCs: 3× 16-bit ADCs up to 3.6 MSPS (up to 36 channels)
• Standby mode current: 2.95 μA (Backup SRAM OFF, RTC/LSE ON)

Features:

• Arm Cortex-M7 core with double-precision FPU, L1 cache (16 KB instruction + 16 KB data), and DSP instructions
• Chrom-ART graphical hardware accelerator (DMA2D), hardware JPEG codec, and LCD-TFT controller up to XGA
• Flexible external memory controller (FMC) supporting SRAM, PSRAM, SDRAM, and NOR/NAND Flash
• Dual-mode Quad-SPI memory interface up to 133 MHz
• Up to 35 communication peripherals including 4× I2C, 8× USART/UART, 1× LPUART, 6× SPI, 4× SAI, SPDIFRX, and 2× SDMMC
• 2× USB OTG (1 FS, 1 HS/FS crystal-less), Ethernet MAC with dedicated DMA, and 2× FDCAN controllers
• High-resolution timer (HRTIM1) with 2.1 ns max resolution and up to 22 timers total
• Analog subsystem with 2× 12-bit DACs, 2× comparators, 2× operational amplifiers, DFSDM, and internal reference buffer

Applications:

• Motor drive and application control
• Medical equipment
• Industrial applications (PLC, inverters, circuit breakers)
• Home audio and graphical user interfaces (HMI)

Package:

• LQFP100 (14 × 14 mm)
• TFBGA100 (8 × 8 mm)
• LQFP144 (20 × 20 mm)
• UFBGA169 (7 × 7 mm)
• LQFP176 (24 × 24 mm)
• UFBGA176+25 (10 × 10 mm)
• LQFP208 (28 × 28 mm)
• TFBGA240+25 (14 × 14 mm)

Figure 5. LQFP100 pinout

1. The above figure shows the package top view.

101

Unless otherwise specified, the parameters given in Table 87 are derived from tests performed under the ambient temperature, f PCLK2 frequency and V DDA supply voltage conditions summarized in Table 24: General operating conditions .

Table 87. ADC characteristics (1)

Table 87. ADC characteristics (1)

Table 87. ADC characteristics (1) (continued)

1. Guaranteed by design.

2. These values are obtained using the following formula: f S = f ADC / t CONV , where f ADC = 36 MHz and t CONV = 1,5 cycle sampling time + t SAR sampling time. Refer to the product reference manual for the value of t SAR depending on resolution.

3. Depending on the package, V REF+ can be internally connected to V DDA and V REF- to V SSA .

320

Table 88. ADC accuracy (1)(2)(3)

1. Guaranteed by characterization for BGA packages, the values for LQFP packages might differ.
2. ADC DC accuracy values are measured after internal calibration.
3. The above table gives the ADC performance in 16-bit mode.
4. ADC clock frequency ≤ 36 MHz, 2 V ≤ V DDA ≤ 3.3 V, 1.6 V ≤ V REF ≤ V DDA , BOOSTEN (for I/O) = 1.
5. ENOB, SINAD, SNR and THD are specified for V DDA = V REF = 3.3 V.

Note: ADC accuracy vs. negative injection current: injecting a negative current on any analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents.

Any positive injection current within the limits specified for I INJ(PIN) and Σ I INJ(PIN) in Section 6.3.14 does not affect the ADC accuracy.

Figure 40. ADC accuracy characteristics

Figure 41. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function

1. Refer to Section 6.3.20: 16-bit ADC characteristics for the values of R AIN and C ADC .
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 60: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value downgrades conversion accuracy. To remedy this, f ADC should be reduced.
3. Refer to Table 60: I/O static characteristics for the value of I lkg .
4. Refer to Figure 15: Power supply scheme .

320

Stresses above the absolute maximum ratings listed in Table 21: Voltage characteristics , Table 22: Current characteristics , and Table 23: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and the functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Table 21. Voltage characteristics (1)

1. This formula has to be applied on power supplies related to the IO structure described by the pin definition table.
2. To sustain a voltage higher than 4V the internal pull-up/pull-down resistors must be disabled.
3. All main power (V DD , V DDA , V DD33USB ) and ground (V SS , V SSA ) pins must always be connected to the external power supplies, in the permitted range.
4. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages.
5. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
6. A positive injection is induced by V IN >VDD while a negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer also to Table 21: Voltage characteristics for the maximum allowed input voltage values.
7. When several inputs are submitted to a current injection, the maximum ∑ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 22. Current characteristics

Table 23. Thermal characteristics

320

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max × Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark