STM32F407VET6

Part: STM32F405xx STM32F407xx

Type: ARM Cortex-M4 MCU

Description: 32-bit ARM Cortex-M4 MCU with FPU, up to 168 MHz, 210 DMIPS, up to 1 MB Flash, 192+4 KB RAM, USB OTG HS/FS, Ethernet, 17 Timers, 3 ADCs, and 15 communication interfaces.

Operating Conditions:

• Supply voltage: 1.8 V to 3.6 V
• Max clock: 168 MHz

Absolute Maximum Ratings:

Key Specs:

• Core frequency: up to 168 MHz
• Flash memory: Up to 1 Mbyte
• SRAM: Up to 192+4 Kbytes (including 64 Kbyte CCM RAM)
• ADC: 3×12-bit, 2.4 MSPS (up to 24 channels, 7.2 MSPS in triple interleaved mode)
• DAC: 2×12-bit
• I/O ports: Up to 140 with interrupt capability, up to 138 5 V-tolerant
• SPI speed: Up to 42 Mbits/s
• Ethernet: 10/100 MAC

Features:

• ARM 32-bit Cortex-M4 CPU with FPU and DSP instructions
• Adaptive real-time accelerator (ART Accelerator™)
• Memory protection unit
• Flexible static memory controller (Compact Flash, SRAM, PSRAM, NOR, NAND)
• LCD parallel interface, 8080/6800 modes
• POR, PDR, PVD and BOR
• 4-to-26 MHz crystal oscillator
• Internal 16 MHz factory-trimmed RC (1% accuracy)
• 32 kHz oscillator for RTC with calibration
• Internal 32 kHz RC with calibration
• Low power modes: Sleep, Stop, Standby
• VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
• General-purpose DMA: 16-stream controller with FIFOs and burst support
• Up to 17 timers (twelve 16-bit, two 32-bit)
• Up to 3 I2C interfaces (SMBus/PMBus)
• Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816, LIN, IrDA, modem control)
• Up to 3 SPIs, 2 with muxed full-duplex I2S
• 2 CAN interfaces (2.0B Active)
• SDIO interface
• USB 2.0 full-speed device/host/OTG controller with on-chip PHY
• USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
• 10/100 Ethernet MAC with dedicated DMA, supports IEEE 1588v2 hardware, MII/RMII
• 8- to 14-bit parallel camera interface up to 54 Mbytes/s
• True random number generator
• CRC calculation unit
• 96-bit unique ID
• RTC: subsecond accuracy, hardware calendar
• Serial wire debug (SWD) & JTAG interfaces
• Cortex-M4 Embedded Trace Macrocell™

Package:

• LQFP64 (10 × 10 mm)
• LQFP100 (14 × 14 mm)
• LQFP144 (20 × 20 mm)
• LQFP176 (24 × 24 mm)
• WLCSP90
• UFBGA176 (10 × 10 mm)

• Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories
• -Up to 1 Mbyte of Flash memory
• -Up to 192+4 Kbytes of SRAM including 64Kbyte of CCM (core coupled memory) data RAM
• -Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
• -1.8 V to 3.6 V application supply and I/Os
• -POR, PDR, PVD and BOR
• -4-to-26 MHz crystal oscillator
• -Internal 16 MHz factory-trimmed RC (1% accuracy)
• -32 kHz oscillator for RTC with calibration
• -Internal 32 kHz RC with calibration
• Low power
• -Sleep, Stop and Standby modes
• -VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
• 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
• 2×12-bit D/A converters
• General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
• Up to 17 timers: up to twelve 16-bit and two 32bit timers up to 168 MHz, each with up to 4

WLCSP90

UFBGA176 (10 × 10 mm)

1

Figure 12. STM32F40x LQFP64 pinout

Figure 13. STM32F40x LQFP100 pinout

Figure 14. STM32F40x LQFP144 pinout

Figure 15. STM32F40x LQFP176 pinout

The definition and values of input/output AC characteristics are given in Figure 37 and Table 49 , respectively.

Unless otherwise specified, the parameters given in Table 49 are derived from tests performed under the ambient temperature and V DD supply voltage conditions summarized in Table 14 .

Table 49. I/O AC characteristics (1)(2)(3)

OSPEEDRy [1:0] bit value (1)	Symbol	Parameter	Conditions	Min	Typ	Max	Unit
00	f max(IO)out	Maximum frequency (4)	C L = 50 pF, V DD > 2.70 V	-	-	2	MHz
00	f max(IO)out	Maximum frequency (4)	C L = 50 pF, V DD > 1.8 V	-	-	2	MHz
00	f max(IO)out	Maximum frequency (4)	C L = 10 pF, V DD > 2.70 V	-	-	TBD	MHz
00	f max(IO)out	Maximum frequency (4)	C L = 10 pF, V DD > 1.8 V	-	-	TBD	MHz
00	t f(IO)out	Output high to low level fall time	C L = 50 pF, V DD = 1.8 V to 3.6 V	-	-	TBD	ns
00	t r(IO)out	Output low to high level rise time	C L = 50 pF, V DD = 1.8 V to 3.6 V	-	-	TBD	ns
01	f max(IO)out	Maximum frequency (4)	C L = 50 pF, V DD > 2.70 V	-	-	25	MHz
01	f max(IO)out	Maximum frequency (4)	C L = 50 pF, V DD > 1.8 V	-	-	12.5 (5)	MHz
01	f max(IO)out	Maximum frequency (4)	C L = 10 pF, V DD > 2.70 V	-	-	50 (5)	MHz
01	f max(IO)out	Maximum frequency (4)	C L = 10 pF, V DD > 1.8 V	-	-	TBD	MHz
01	t f(IO)out	Output high to low level fall time	C L = 50 pF, V DD < 2.7 V	-	-	TBD	ns
01	t f(IO)out	Output high to low level fall time	C L = 10 pF, V DD > 2.7 V	-	-	TBD	ns
01	t r(IO)out	Output low to high level rise time	C L = 50 pF, V DD < 2.7 V	-	-	TBD
01	t r(IO)out	Output low to high level rise time	C L = 10 pF, V DD > 2.7 V	-	-	TBD
10	f max(IO)out	Maximum frequency (4)	C L = 40 pF, V DD > 2.70 V	-	-	50 (5)	MHz
10	f max(IO)out	Maximum frequency (4)	C L = 40 pF, V DD > 1.8 V	-	-	25	MHz
10	f max(IO)out	Maximum frequency (4)	C L = 10 pF, V DD > 2.70 V	-	-	100 (5)	MHz
10	f max(IO)out	Maximum frequency (4)	C L = 10 pF, V DD > 1.8 V	-	-	TBD	MHz
10	t f(IO)out	Output high to low level fall time	C L = 50 pF, 2.4 < V DD < 2.7 V	-	-	TBD	ns
10	t f(IO)out	Output high to low level fall time	C L = 10 pF, V DD > 2.7 V	-	-	TBD	ns
10	t r(IO)out	Output low to high level rise time	C L = 50 pF, 2.4 < V DD < 2.7 V	-	-	TBD
10	t r(IO)out	Output low to high level rise time	C L = 10 pF, V DD > 2.7 V	-	-	TBD

Table 49. I/O AC characteristics (1)(2)(3) (continued)

OSPEEDRy [1:0] bit value (1)	Symbol	Parameter	Conditions	Min	Typ	Max	Unit
11	F max(IO)ou t	Maximum frequency (4)	C L = 30 pF, V DD > 2.70 V	-	-	100 (5)	MHz
11	F max(IO)ou t	Maximum frequency (4)	C L = 30 pF, V DD > 1.8 V	-	-	50 (5)	MHz
11	F max(IO)ou t	Maximum frequency (4)	C L = 10 pF, V DD > 2.70 V	-	-	200 (5)	MHz
11	F max(IO)ou t	Maximum frequency (4)	C L = 10 pF, V DD > 1.8 V	-	-	TBD	MHz
11	t f(IO)out	Output high to low level fall time	C L = 20 pF, 2.4 < V DD < 2.7 V	-	-	TBD	ns
11	t f(IO)out	Output high to low level fall time	C L = 10 pF, V DD > 2.7 V	-	-	TBD	ns
11	t r(IO)out	Output low to high level rise time	C L = 20 pF, 2.4 < V DD < 2.7 V	-	-	TBD	ns
11	t r(IO)out	Output low to high level rise time	C L = 10 pF, V DD > 2.7 V	-	-	TBD	ns
-	t EXTIpw	Pulse width of external signals detected by the EXTI controller		10	-	-	ns

1. Based on characterization data, not tested in production.
2. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F20/21xxx reference manual for a description of the GPIOx_SPEEDR GPIO port output speed register.
3. TBD stands for 'to be defined'.
4. The maximum frequency is defined in Figure 37 .
5. For maximum frequencies above 50 MHz, the compensation cell should be used.

Figure 37. I/O AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 11: Voltage characteristics , Table 12: Current characteristics , and Table 13: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 11. Voltage characteristics

Symbol	Ratings	Min	Max	Unit
V DD -V SS	External main supply voltage (including V DDA , V DD ) (1)	-0.3	4.0	V
V IN	Input voltage on five-volt tolerant pin (2)	V SS -0.3	V DD +4	V
V IN	Input voltage on any other pin	V SS -0.3	4.0	V
\	∆ V DDx \		Variations between different V DD power pins	-
\	V SSX - V SS \		Variations between all the different ground pins	-
V ESD(HBM)	Electrostatic discharge voltage (human body model)	see Section 5.3.14: Absolute maximum ratings (electrical sensitivity)	see Section 5.3.14: Absolute maximum ratings (electrical sensitivity)

Table 12. Current characteristics

Symbol	Ratings	Max.	Unit
I VDD	Total current into V DD power lines (source) (1)	150	mA
I VSS	Total current out of V SS ground lines (sink) (1)	150	mA
I IO	Output current sunk by any I/O and control pin	25	mA
I IO	Output current source by any I/Os and control pin	25	mA
I INJ(PIN) (2)	Injected current on five-volt tolerant I/O (3)	-5/+0	mA
I INJ(PIN) (2)	Injected current on any other pin (4)	±5	mA
Σ I INJ(PIN) (4)	Total injected current (sum of all I/O and control pins) (5)	±25	mA

1. Positive injection is not possible on these I/Os. A negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer to Table 11 for the values of the maximum allowed input voltage.
2. A positive injection is induced by V IN >VDD while a negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer to Table 11 for the values of the maximum allowed input voltage.
3. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 13. Thermal characteristics

Symbol	Ratings	Value	Unit
T STG	Storage temperature range	-65 to +150	°C
T J	Maximum junction temperature	125	°C

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max x Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.

Figure 76. WLCSP90 - 0.400 mm pitch wafer level chip size package outline

Table 90. WLCSP90 - 0.400 mm pitch wafer level chip size package mechanical data

Symbol	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
A	0.520	0.570	0.620	0.0205	0.0224	0.0244
A1	0.165	0.190	0.215	0.0065	0.0075	0.0085
A2	0.350	0.380	0.410	0.0138	0.015	0.0161
b	0.240	0.270	0.300	0.0094	0.0106	0.0118
D	4.178	4.218	4.258	0.1645	0.1661	0.1676
E	3.964	3.969	4.004	0.1561	0.1563	0.1576
e		0.400			0.0157
e1		3.600			0.1417
e2		3.200			0.126
F		0.312			0.0123
G		0.385			0.0152
eee			0.050			0.0020

Table 90. WLCSP90 - 0.400 mm pitch wafer level chip size package mechanical data

Figure 77. LQFP64 - 10 x 10 mm 64 pin low-profile quad flat package outline

1. Drawing is not to scale.

Table 91. LQFP64 - 10 x 10 mm 64 pin low-profile quad flat package mechanical data

Symbol	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
A			1.600			0.0630
A1	0.050		0.150	0.0020		0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090		0.200	0.0035		0.0079
D		12.000			0.4724
D1		10.000			0.3937
E		12.000			0.4724
E1		10.000			0.3937
e		0.500			0.0197
θ	0°	3.5°	7°	0°	3.5°	7°
L	0.450	0.600	0.750	0.0177	0.0236	0.0295
L1		1.000			0.0394
N	Number of pins	Number of pins	Number of pins	Number of pins	Number of pins	Number of pins
N	64	64	64	64	64	64

Table 91. LQFP64 - 10 x 10 mm 64 pin low-profile quad flat package mechanical data

Figure 78. LQFP64 recommended footprint

Figure 78. LQFP64 recommended footprint

1. Drawing is not to scale.
2. Dimensions are in millimeters.

Figure 79. LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline

1. Drawing is not to scale.
2. Values in inches are converted from mm and rounded to 4 decimal digits.

Table 92. LQPF100 - 14 x 14 mm 100-pin low-profile quad flat package mechanical data (1)

Symbol	millimeters	millimeters	millimeters	inches	inches	inches
Symbol	Min	Typ	Max	Min	Typ	Max
A			1.600			0.0630
A1	0.050		0.150	0.0020		0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090		0.200	0.0035		0.0079
D	15.800	16.000	16.200	0.6220	0.6299	0.6378
D1	13.800	14.000	14.200	0.5433	0.5512	0.5591
D3		12.000			0.4724
E	15.80v	16.000	16.200	0.6220	0.6299	0.6378
E1	13.800	14.000	14.200	0.5433	0.5512	0.5591
E3		12.000			0.4724
e		0.500			0.0197
L	0.450	0.600	0.750	0.0177	0.0236	0.0295
L1		1.000			0.0394
k	0°	3.5°	7°	0°	3.5°	7°
ccc			0.080			0.0031

Table 92. LQPF100 - 14 x 14 mm 100-pin low-profile quad flat package mechanical data (1)

Figure 80. LQFP100 recommended footprint

1. Drawing is not to scale.
2. Dimensions are in millimeters.

Figure 81. LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package outline

1. Drawing is not to scale.

Table 93. LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package mechanical data

Symbol	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
A			1.600			0.0630
A1	0.050		0.150	0.0020		0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090		0.200	0.0035		0.0079
D	21.800	22.000	22.200	0.8583	0.8661	0.874
D1	19.800	20.000	20.200	0.7795	0.7874	0.7953
D3		17.500			0.689
E	21.800	22.000	22.200	0.8583	0.8661	0.8740
E1	19.800	20.000	20.200	0.7795	0.7874	0.7953
E3		17.500			0.6890
e		0.500			0.0197
L	0.450	0.600	0.750	0.0177	0.0236	0.0295
L1		1.000			0.0394

Table 93. LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package mechanical data

	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
k	0°	3.5°	7°	0°	3.5°	7°
ccc			0.080			0.0031

1. Values in inches are converted from mm and rounded to 4 decimal digits.
2. Drawing is not to scale.
3. Dimensions are in millimeters.

Figure 82. LQFP144 recommended footprint

Figure 83. UFBGA176+25 - ultra thin fine pitch ball grid array 10 × 10 × 0.6 mm, package outline

1. Drawing is not to scale.

Table 94. UFBGA176+25 - ultra thin fine pitch ball grid array 10 × 10 × 0.6 mm mechanical data

Symbol	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
A	0.460	0.530	0.600	0.0181	0.0209	0.0236
A1	0.050	0.080	0.110	0.002	0.0031	0.0043
A2	0.400	0.450	0.500	0.0157	0.0177	0.0197
b	0.230	0.280	0.330	0.0091	0.0110	0.0130
D	9.900	10.000	10.100	0.3898	0.3937	0.3976
E	9.900	10.000	10.100	0.3898	0.3937	0.3976
e		0.650			0.0256
F	0.425	0.450	0.475	0.0167	0.0177	0.0187
ddd			0.080			0.0031
eee			0.150			0.0059
fff			0.080			0.0031

Table 94. UFBGA176+25 - ultra thin fine pitch ball grid array 10 × 10 × 0.6 mm mechanical data

Figure 84. LQFP176 24 x 24 mm, 176-pin low-profile quad flat package outline

Table 95. LQFP176, 24 x 24 mm, 176-pin low-profile quad flat package mechanical data

Symbol	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
A			1.600			0.0630
A1	0.050		0.150	0.0020
A2	1.350		1.450	0.0531		0.0060
b	0.170		0.270	0.0067		0.0106
C	0.090		0.200	0.0035		0.0079
D	23.900		24.100	0.9409		0.9488
E	23.900		24.100	0.9409		0.9488
e		0.500			0.0197
HD	25.900		26.100	1.0200		1.0276
HE	25.900		26.100	1.0200		1.0276
L	0.450		0.750	0.0177		0.0295
L1		1.000			0.0394
ZD		1.250			0.0492
ZE		1.250			0.0492

Table 95. LQFP176, 24 x 24 mm, 176-pin low-profile quad flat package mechanical data

	millimeters	millimeters	millimeters	inches (1)	inches (1)	inches (1)
Symbol	Min	Typ	Max	Min	Typ	Max
ccc			0.080			0.0031
k	0 °		7 °	0 °		7 °

1. Values in inches are converted from mm and rounded to 4 decimal digits.
2. Dimensions are expressed in millimeters.

Figure 85. LQFP176 recommended footprint