Overview

Part: GD32F103xx Arm® Cortex®-M3 32-bit MCU by GigaDevice Semiconductor Inc.

Type: Arm® Cortex®-M3 32-bit MCU

Key Specs:

Core: 32-bit

Features:

Arm® Cortex®-M3 core
On-chip memory
Clock, reset and supply management
Boot modes
Power saving modes
Analog to digital converter (ADC)
Digital to analog converter (DAC)
DMA
General-purpose inputs/outputs (GPIOs)
Timers and PWM generation
Real time clock (RTC)
Inter-integrated circuit (I2C)
Universal synchronous asynchronous receiver transmitter (USART)
Inter-IC sound (I2S)
Secure digital input and output card interface (SDIO)
Universal serial bus full-speed device (USBD)
Controller area network (CAN)
External memory controller (EXMC)
Debug mode

Applications:

null

Package:

LQFP144: dimensions not provided in text
LQFP100: dimensions not provided in text
LQFP64: dimensions not provided in text
LQFP48: dimensions not provided in text
QFN36: dimensions not provided in text

Features

	Table 2-2. GD32F103xx devices features and peripheral list (continued)

	Code Area (KB)
Flash	Data Area (KB)
	Total (KB)
	SRAM (KB)
	General timer(16- bit)
	Advanced timer(16- bit)
Timers	SysTick
	Basic timer(16- bit)
	Watchdog
	RTC
	USART
	UART
	I2C
Connectivity	SPI
	CAN
	USBD
	I2S
	SDIO
	GPIO
	EXMC
	EXTI
	Units
ADC	Channels

		GD32F103xx
	Part Number	RC
ADC	Units	3
ADC	Channels	16

	Table 2-3. GD32F103xx devices features and peripheral list (continued)
	Part Number

	Code Area (KB)
Flash	Data Area (KB)
	Total (KB)
	SRAM (KB)
	General
	timer(16-bit)
	Advanced
	timer(16-bit)
Timers	SysTick
	Basic timer(16-
	bit)
	Watchdog
	RTC
	USART
	UART
	I2C
	SPI

Connectivity	CAN
	USBD

	I2S
	SDIO
	GPIO
	EXMC
	EXTI
	Units
ADC	Channels
DAC	Units
	Channels

Package LQFP144

Pin Configuration

Figure 2-3. GD32F103Zx LQFP144 pinouts

		VD D_3	VS S_3 PE		BO OT				6 PD 7	PD	5 PD4 PD		3 PD2 PD	1 PD	0	PC 12	PC 11	PC 10	PA 15	PA 14
P E2	1						100 99 98 97 96 95 94 93 92 91 90 89						88 87 86 85 84 83 82 81 80 79 78 77							76 75
P E3	2																			74
P E4	3																			73
P E5	4																			72
P E6	5																			71
VBAT	6																			70
PC13-TAMPER-RTC	7																			69
PC14-OSC32I N	8																			68
PC15-OSC32OUT	9																			67
VSS_5	10																			66
VDD_5	11																			65
OSCIN-PD0	12						GigaDevice GD32F103Vx													64
OSCOUT-P D1	13								LQFP100											63
NRST	14																			62
P C0	15																			61
P C1	16																			60
P C2	17																			59
P C3	18																			58
VSSA	19																			57
VREFN	20																			56
VREFP	21																			55
VDDA	22																			54
PA0-WKUP	23																			53
PA1	24																			52
PA2	25	PA3 VS					26 27 28 29 30 31 32 33 34 35 36 37			38 39 40 41		42 PE	43 44 45 46 47 48 49 PE	PE	PE	PE	PB		VS	51 50 VD
			S_4 VD	D_4	PA4 PA5 PA6 PA7 PC4 PC	5	PB0 PB	1 PB2		PE7 PE8 PE9 PE	10	11	12	13	14	15	10 PB	11	S_1	D_1

Figure 2-4. GD32F103Vx LQFP100 pinouts

Figure 2-6. GD32F103Cx LQFP48 pinouts

Electrical Characteristics

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
VIL	Standard IO Low level input voltage	2.6 V ≤ VDD = VDDA ≤ 3.6 V	—	—	0.3 VDD	V
	5V-tolerant IO Low level input voltage	2.6 V ≤ VDD = VDDA ≤ 3.6 V	—	—	0.3 VDD	V
VIH	Standard IO High level input voltage	2.6 V ≤ VDD = VDDA ≤ 3.6 V	0.7 VDD	—	—	V
	5V-tolerant IO High level input voltage	2.6 V ≤ VDD = VDDA ≤ 3.6 V	0.7 VDD	—	—	V

Symbol	Parameter		Conditions	Min	Typ	Max	Unit
	input voltage
RPU(2)	Internal pull	All pins	VIN = VSS	—	40	—
	up resistor	PA10	—	—	10	—	kΩ
	Internal pull	All pins	VIN = VDD	—	40	—
RPD(2)	down resistor	PA10	—	—	10	—	kΩ
IO_Speed=50MHz
		Low level output voltage	VDD = 2.6V	—	0.12	—
	for an IO Pin		VDD = 3.3 V	—	0.1	—
	(IIO = +4 mA)		VDD = 3.6V	—	0.1	—
VOL	Low level output voltage		VDD = 2.6V	—	0.38	—	V
	for an IO Pin		VDD = 3.3 V	—	0.32	—
		(IIO = +12 mA)	VDD = 3.6V	—	0.3	—
		High level output voltage	VDD = 2.6V	—	2.32	—
	for an IO Pin		VDD = 3.3 V	—	3.06	—
		(IIO = +8 mA) High level output voltage	VDD = 3.6V	—	3.37	—
VOH	for an IO Pin (IIO = +15 mA)		VDD = 2.6V	—	2.03	—	V
	High level output voltage for an IO Pin		VDD = 3.3 V	—	2.76	—
	(IIO = +18 mA)		VDD = 3.6V IO_Speed=10MHz	—	3.09	—
		Low level output voltage for	VDD = 2.6V	—	0.29	—
	an IO Pin		VDD = 3.3 V	—	0.26	—
		(IIO = +4 mA)	VDD = 3.6V	—	0.25	—
		Low level output voltage for	VDD = 2.6V	—	0.65	—
VOL	an IO Pin	(IIO = +8 mA) Low level output voltage for	VDD = 3.3 V	—	0.51	—	V
	an IO Pin	(IIO = +10 mA)	VDD = 3.6V	—	0.62	—
		High level output voltage	VDD = 2.6V	—	1.94	—
	for an IO Pin		VDD = 3.3 V	—	2.78	—
		(IIO = +8 mA) High level output voltage	VDD = 3.6V	—	3.11	—
VOH	for an IO Pin	(IIO = +10mA)	VDD = 2.6V	—	1.71	—	V
		High level output voltage	VDD = 3.3 V	—	2.18	—
	for an IO Pin (IIO = +15mA)		VDD = 3.6V	—	2.85	—
IO_Speed=2MHz

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
VOL	Low level output voltage for	VDD = 2.6V	—	0.59	—
	an IO Pin	VDD = 3.3 V	—	0.54	—	V
	(IIO = +4 mA)	VDD = 3.6V	—	0.51	—
VOH	High level output voltage
	for an IO Pin (IIO = +2mA)	VDD = 2.6V	—	2.14	—
	High level output voltage for an IO Pin	VDD = 3.3 V	—	2.53	—	V
	(IIO = +4mA)	VDD = 3.6V	—	2.89	—

(2) Guaranteed by design, not tested in production.

(3) All pins except PC13 / PC14 / PC15. Since PC13 to PC15 are supplied through the Power Switch, which can only be obtained by a small current (typical source capability:3 mA shared between these IOs, but sink capability is same as other IO), the speed of GPIOs PC13 to PC15 should not exceed 2 MHz when they are in output mode (maximum load: 30 pF).

		Table 4-31. I/O port DC characteristics(For GD32F103xC/D/E/F/G/I/K devices)	(1) (3)
--	--	-----------------------------------------------------------------------------	---------

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
VOL	Low level output voltage for an IO Pin (IIO = +4 mA)	VDD = 2.6V	—	0.59	—	V
		VDD = 3.3 V	—	0.54	—
		VDD = 3.6V	—	0.51	—
VOH	High level output voltage for an IO Pin (IIO = +2mA)	VDD = 2

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
	for an IO Pin (IIO = +10 mA)
	High level output voltage	VDD = 3.3 V	—	2.59	—
	for an IO Pin (IIO = +20 mA)	VDD = 3.6V IO_Speed=10MHz	—	2.95	—
	Low level output voltage for	VDD = 2.6V	—	0.43	—
	an IO Pin	VDD = 3.3 V	—	0.36	—
	(IIO = +8 mA)	VDD = 3.6V	—	0.34	—
VOL	Low level output voltage for	VDD = 2.6V	—	—	—	V
	an IO Pin	VDD = 3.3 V	—	0.78	—
	(IIO = +15 mA)	VDD = 3.6V	—	0.72	—
	High level output voltage	VDD = 2.6V	—	2.06	—
	for an IO Pin	VDD = 3.3 V	—	2.87	—
	(IIO = +8 mA)	VDD = 3.6V	—	3.2	—
VOH	High level output voltage	VDD = 2.6V	—	—	—	V
	for an IO Pin	VDD = 3.3 V	—	2.39	—
	(IIO = +15mA)	VDD = 3.6V	—	2.77	—
IO_Speed=2MHz
	Low level output voltage for	VDD = 2.6V	—	0.44	—
VOL	an IO Pin	VDD = 3.3 V	—	0.36	—	V
	(IIO = +4 mA)	VDD = 3.6V	—	0.34	—
	High level output voltage	VDD = 2.6V	—	2.22	—
VOH	for an IO Pin	VDD = 3.3 V	—	2.99	—	V
	(IIO = +4mA)	VDD = 3.6V	—	3.31	—

(2) Guaranteed by design, not tested in production.

(3) All pins except PC13 / PC14 / PC15. Since PC13 to PC15 are supplied through the Power Switch, which can only be obtained by a small current (typical source capability:3 mA shared between these IOs, but sink capability is same as other IO), the speed of GPIOs PC13 to PC15 should not exceed 2 MHz when they are in output mode(maximum load: 30 pF).

Table 4-32. I/O port AC characteristics(For GD32F103x4/6/8/B devices)	(1)(2)(4)
-----------------------------------------------------------------------	-----------

GPIOx_MDy[1:0] bit value(3)	Parameter	Conditions	Typ	Unit
GPIOx_CTL->MDy[1:0]=10 (IO_Speed = 2MHz)	TRise/TFall	2.6 ≤ VDD ≤ 3.6 V, CL = 10 pF	48.6
		2.6 ≤ VDD ≤ 3.6 V, CL = 30 pF	59.4	ns
		2.6 ≤ VDD ≤ 3.6 V, CL = 50 pF	68.4
GPIOx_CTL->MDy[1:0] = 01 (IO_Speed = 10MHz)	TRise/TFall	2.6 ≤ VDD ≤ 3.6 V, CL = 10 pF	16
		2.6 ≤ VDD ≤ 3.6 V, CL = 30 pF	19.4	ns
		2.6 ≤ VDD ≤ 3.6 V, CL = 50 pF	25.2
GPIOx_CTL->MDy[1:0]=11 (IO_Speed = 50MHz)	TRise/TFall	2.6 ≤ VDD ≤ 3.6 V, CL = 10 pF	2.6
		2.6 ≤ VDD ≤ 3.6 V, CL = 30 pF	3.2	ns
		2.6 ≤ VDD ≤ 3.6 V, CL = 50 pF	4.2

(1) Based on characterization, not tested in production.
(2) Unless otherwise specified, all test results given for T^A = 25 °C.
(3) The I/O speed is configured using the GPIOx_CTL -> MDy[1:0] bits.
(4) Only for reference, Depending on user's design.

Absolute Maximum Ratings

The maximum ratings are the limits to which the device can be subjected without permanently damaging the device. Note that the device is not guaranteed to operate properly beyond the maximum ratings. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.

Symbol	Parameter	Min	Max	Unit
VDD	External voltage range(2)	VSS - 0.3	VSS + 3.6	V
VDDA	External analog supply voltage	VSSA - 0.3	VSSA + 3.6	V
VBAT	External battery supply voltage	VSS - 0.3	VSS + 3.6	V
VIN	Input voltage on 5V tolerant pin(3)	VSS - 0.3	VDD + 3.6	V
	Input voltage on other I/O	VSS - 0.3	3.6	V
ΔVDDX	Variations between different VDD power pins	—	50	mV
VSSX -VSS	Variations between different ground pins	—	50	mV
IIO	Maximum current for GPIO pins	—	±25	mA
TA	Operating temperature range	-40	+85	°C
PD	Power dissipation at TA = 85°C of LQFP144	—	820	mW
	Power dissipation at TA = 85°C of LQFP100	—	697
	Power dissipation at TA = 85°C of LQFP64	—	647
	Power dissipation at TA = 85°C of LQFP48	—	621
	Power dissipation at TA = 85°C of QFN36	—	926
TSTG	Storage temperature range	-65	+150	°C
TJ	Maximum junction temperature	—	125	°C

Table 4-1. Absolute maximum ratings (1)(4)

(1) Guaranteed by design, not tested in production.

(2) All main power and ground pins should be connected to an external power source within the allowable range.

(3) VIN maximum value cannot exceed 5.5 V.

(4) It is recommended that VDD and VDDA are powered by the same source. The maximum difference between VDD and VDDA does not exceed 300 mV during power-up and operation.

Thermal Information

Thermal resistance is used to characterize the thermal performance of the package device, which is represented by the Greek letter "θ". For semiconductor devices, thermal resistance represents the steady-state temperature rise of the chip junction due to the heat dissipated on the chip surface.

θJA: Thermal resistance, junction-to-ambient.

θJB: Thermal resistance, junction-to-board.

θJC: Thermal resistance, junction-to-case.

ᴪJB: Thermal characterization parameter, junction-to-board.

ᴪJT: Thermal characterization parameter, junction-to-top center.

$Θ_mathsf{IA} = (mathsf{T}_mathsf{J} mathsf{·} mathsf{T}_mathsf{A}) mathsf{·} mathsf{P}_mathsf{D} tag{5-4}$

$Θ_mathsf{JB} equiv (mathsf{T}_mathsf{I} mathsf{T}_mathsf{B}) mathsf{P}_mathsf{D} tag{5-2}$

$Θ_mathsf{JC} equiv (mathsf{T}_mathsf{I} mathsf{T}_mathsf{C}) mathsf{P}_mathsf{D} tag{5-3}$

Where, T^J = Junction temperature.

T^A = Ambient temperature

T^B = Board temperature

T^C = Case temperature which is monitoring on package surface

P^D = Total power dissipation

θJA represents the resistance of the heat flows from the heating junction to ambient air. It is an indicator of package heat dissipation capability. Lower θJA can be considerate as better overall thermal performance. θJA is generally used to estimate junction temperature.

θJB is used to measure the heat flow resistance between the chip surface and the PCB board.

θJC represents the thermal resistance between the chip surface and the package top case. θJC is mainly used to estimate the heat dissipation of the system (using heat sink or other heat dissipation methods outside the device package).

Symbol	Condition	Package	Value	Unit
θJA	Natural convection, 2S2P PCB	LQFP144 LQFP100	48.76 57.42
		LQFP64 LQFP48 QFN36	61.80 64.40 43.20	°C/W
θJB	Cold plate, 2S2P PCB	LQFP144	35.00	°C/W

Table 5-6. Package thermal characteristics(1)

Symbol	Condition	Package	Value	Unit
		LQFP100 LQFP64 LQFP48 QFN36	31.68 42.83 42.32 16.51
	Cold plate, 2S2P PCB	LQFP144	12.03
θJC		LQFP100	13.85
		LQFP64 LQFP48 QFN36 LQFP144 LQFP100	21.98 22.47 16.18 35.32 41.28	°C/W
ᴪJB	Natural convection, 2S2P PCB	LQFP64 LQFP48 QFN36 LQFP144	43.05 42.42 16.64 1.86	°C/W
ᴪJT	Natural convection, 2S2P PCB	LQFP100	0.75
		LQFP64 LQFP48 QFN36	1.58 1.74 1.07	°C/W

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
GD32F103C8	GigaDevice Semiconductor Inc.	—
GD32F103C8/B	GigaDevice Semiconductor Inc.	—

GD32F103C8T6