STM32H743BG

Part: STM32H742xI/G STM32H743xI/G — STMicroelectronics

Type: 32-bit ARM Cortex-M7 MCU

Description: 32-bit ARM Cortex-M7 MCU running at up to 480 MHz with up to 2 MB Flash, up to 1 MB RAM, and 46 communication and analog interfaces.

Operating Conditions:

• Supply voltage: 1.62 to 3.6 V
• Operating temperature: -40 to +125 °C (Junction)
• Max CPU frequency: 480 MHz

Absolute Maximum Ratings:

• Max supply voltage: 3.8 V
• Max junction/storage temperature: +150 °C (Storage)

Key Specs:

• Core: 32-bit Arm Cortex-M7 with FPU, MPU, 1027 DMIPS at 480 MHz
• Flash memory: Up to 2 Mbytes with read-while-write support
• RAM: Up to 1 Mbyte (192 Kbytes TCM, 864 Kbytes user SRAM, 4 Kbytes Backup SRAM)
• Low-power consumption: 2.95 μA in Standby mode (Backup SRAM OFF, RTC/LSE ON)
• ADCs: 3× 16-bit, up to 36 channels, up to 3.6 MSPS
• DACs: 2× 12-bit, 1 MHz
• Communication interfaces: 4× I2Cs, 8× USART/UARTs, 6× SPIs, 2× USB OTG, Ethernet MAC, 2× CAN FD
• GPIOs: Up to 168 I/O ports with interrupt capability

Features:

• L1 cache: 16 Kbytes data, 16 Kbytes instruction
• Dual mode Quad-SPI memory interface up to 133 MHz
• Flexible external memory controller for SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND flash
• Hardware JPEG Codec
• Chrom-ART graphical hardware Accelerator (DMA2D)
• True random number generators (3 oscillators each)

Package:

• TFBGA100
• TFBGA240+25
• LQFP100
• LQFP144
• LQFP176
• LQFP208
• UFBGA169
• UFBGA176+25

Figure 5. LQFP100 pinout

1. The above figure shows the package top view.

101

Unless otherwise specified, the parameters given in Table 87 are derived from tests performed under the ambient temperature, f PCLK2 frequency and V DDA supply voltage conditions summarized in Table 24: General operating conditions .

Table 87. ADC characteristics (1)

Table 87. ADC characteristics (1)

Table 87. ADC characteristics (1) (continued)

1. These values are obtained using the following formula: f S = f ADC / t CONV , where f ADC = 36 MHz and t CONV = 1,5 cycle sampling time + t SAR sampling time. Refer to the product reference manual for the value of t SAR depending on resolution.

2. Depending on the package, V REF+ can be internally connected to V DDA and V REF- to V SSA .

320

Table 88. ADC accuracy (1)(2)(3)

Note: ADC accuracy vs. negative injection current: injecting a negative current on any analog input pins should be avoided as this significantly reduces the accuracy of the conversion

being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents.

Any positive injection current within the limits specified for I INJ(PIN) and Σ I INJ(PIN) in Section 6.3.14 does not affect the ADC accuracy.

Figure 40. ADC accuracy characteristics

Figure 41. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function

1. Refer to Section 6.3.20: 16-bit ADC characteristics for the values of R AIN and C ADC .
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 60: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value downgrades conversion accuracy. To remedy this, f ADC should be reduced.
3. Refer to Table 60: I/O static characteristics for the value of I lkg .
4. Refer to Figure 15: Power supply scheme .

320

Stresses above the absolute maximum ratings listed in Table 21: Voltage characteristics , Table 22: Current characteristics , and Table 23: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and the functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Table 21. Voltage characteristics (1)

1. This formula has to be applied on power supplies related to the IO structure described by the pin definition table.
2. To sustain a voltage higher than 4V the internal pull-up/pull-down resistors must be disabled.
3. All main power (V DD , V DDA , V DD33USB ) and ground (V SS , V SSA ) pins must always be connected to the external power supplies, in the permitted range.
4. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages.
5. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
6. A positive injection is induced by V IN >VDD while a negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer also to Table 21: Voltage characteristics for the maximum allowed input voltage values.
7. When several inputs are submitted to a current injection, the maximum ∑ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 22. Current characteristics

Table 23. Thermal characteristics

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The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max × Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark