STM32L051T8
MicrocontrollerThe STM32L051T8 is a microcontroller from STMicroelectronics. View the full STM32L051T8 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
STM32L051T8 shares its datasheet with STM32L051K8T6, whose page lists every part number it covers.
Official STM32L051T8 datasheet (PDF) — the source this page was extracted from.
Manufacturer
STMicroelectronicsCategory
Microcontrollers (MCU)STM32L051T8 Key Specifications
| Parameter | Value |
|---|---|
| ADC Channels (Resolution) | 10-Ch 12-Bit |
| Case/Package | LQFP |
| China RoHS | Compliant |
| Connectivity | I2C, IrDA, SPI, UART/USART |
| Core Architecture | ARM Cortex-M0+ |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Bus Width | 32 b |
| Data Converters | A/D 10x12b |
| DigiKey Programmable | Not Verified |
| EEPROM Memory Size | 2 kB |
| EEPROM Size | 2K x 8 |
| Flash Memory Size | 64 kB |
| Frequency | 32 MHz |
| Height - Seated (Max) | 1.6 mm |
| Interface | I2C |
| Introduction Date | 2014-04-29 |
| Lead Free | Lead Free |
| Length | 7 mm |
| Lifecycle Status | Production (Last Updated: 1 month ago) |
| Max Frequency | 32 MHz |
| Max Operating Temperature | 85 °C |
| Max Power Dissipation | 526 mW |
| Max Supply Current | 6.8 mA |
| Max Supply Voltage | 3.6 V |
| Memory Size | 64 kB |
| Memory Type | FLASH |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 1.8 V |
| Mounting Type | Surface Mount |
| Nominal Supply Current | 290 nA |
| Nominal Supply Voltage (DC) | 3 V |
| Number of ADC Channels | 10 |
| Number of Channels | 10 |
| Number of I/O | 27 |
| Number of I/Os | 25 |
| Number of I2C Channels | 1 |
| Number of Pins | 32 |
| Number of Programmable I/O | 25 |
| Number of SPI Channels | 1 |
| Number of Terminals | 32 |
| Number of Timers/Counters | 5 |
| Number of USART Channels | 2 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | Internal |
| Oscillator Type | Internal |
| Package / Case | 32-LQFP |
| Packaging | Cut Tape |
| Peripherals | Brown-out Detect/Reset, DMA, POR, PWM, WDT |
| Peripherals | DMA, POR, PWM, RTC, WDT |
| Flash Memory Size | 64KB (64K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8K x 8 B |
| RAM Size | 8 kB |
| REACH SVHC | Unaffected |
| RoHS | Compliant |
| Schedule B | 8542310000, 8542310000|8542310000|8542310000|8542310000|8542310000 |
| Clock Speed | 32MHz |
| Supplier Device Package | 32-LQFP (7x7) |
| Temperature Grade | Industrial |
| Terminal Pitch | 800 µm |
| Supply Voltage | 1.65V ~ 3.6V |
| Watchdog Timer | Yes |
| Weight | 773.99868 mg |
| Width | 7 mm |
STM32L051T8 Overview
Part: STM32L051K8T6 — STMicroelectronics (STM32L051x6/x8 family)
Type: Ultra-low-power 32-bit Arm Cortex-M0+ MCU
Description: Ultra-low-power Arm Cortex-M0+ MCU running at up to 32 MHz from a 1.65–3.6 V supply, with up to 64 KB Flash, 8 KB SRAM, 2 KB data EEPROM and a 12-bit 1.14 Msps ADC.
Operating Conditions:
- Supply voltage (VDD): 1.65–3.6 V with BOR disabled; 1.8–3.6 V at power-on with BOR enabled
- Operating temperature: -40 to 85 °C (range 6; range 7 is -40 to 105 °C and range 3 is -40 to 125 °C, depending on ordering suffix)
- Max AHB/APB clock: 32 MHz
- FT/FTf/RST pin input voltage: up to 5.5 V (VDD ≥ 2.0 V)
Absolute Maximum Ratings:
- Max supply voltage (VDD-VSS): 4.0 V (min -0.3 V)
- Input voltage on FT/FTf pins: VDD + 4.0 V max
- Total current into all VDD lines: 105 mA
- Current per I/O pin: 16 mA sunk / -16 mA sourced (22 mA sunk on FTf pins)
- Max junction temperature: 150 °C
- Storage temperature: -65 to +150 °C
Key Specs:
- VDD range: 1.65–3.6 V (BOR disabled)
- Max core/bus frequency: 32 MHz
- Power dissipation at TA = 85 °C: 363 mW for LQFP48, 351 mW for LQFP32, 526 mW for UFQFPN32
- Junction temperature range: -40 to 105 °C (range 6, TA ≤ 85 °C)
- Standby current: 0.27 μA typical (2 wakeup pins)
- Stop mode current: 0.4 μA typical
- Run mode current: 88 μA/MHz
- Wakeup time: 3.5 μs from RAM, 5 μs from Flash
Features:
- Arm Cortex-M0+ core with MPU, 0.95 DMIPS/MHz
- Up to 64 KB Flash with ECC, 8 KB RAM, 2 KB data EEPROM with ECC, 20-byte backup registers
- 12-bit ADC, 1.14 Msps, up to 16 channels, operating down to 1.65 V
- 2x ultra-low-power comparators with window mode and wakeup
- 7-channel DMA controller
- 2x USART, 1x low-power UART, up to 4x SPI at 16 Mbit/s, 2x I2C (SMBus/PMBus)
- 9 timers, including a 16-bit ultra-low-power timer and 2 watchdogs
- CRC unit and 96-bit unique ID
- Up to 51 fast I/Os, 45 of them 5 V tolerant
- BOR with 5 selectable thresholds, POR/PDR, PVD
- Clock sources: 1–25 MHz crystal, 32 kHz RTC oscillator, 16 MHz HSI (±1%), 37 kHz LSI, multispeed RC from 65 kHz to 4.2 MHz, PLL
- Bootloader (USART, SPI) and serial wire debug
- ECOPACK2 packages
Applications:
- Ultra-low-power battery-powered embedded systems
Package:
- LQFP32 (7x7 mm), LQFP48 (7x7 mm), LQFP64 (10x10 mm)
- UFQFPN32 (5x5 mm), UFQFPN48 (7x7 mm)
- WLCSP36 standard and thin (2.61x2.88 mm)
- TFBGA64 (5x5 mm)
STM32L051T8 Features
- Ultra-low-power platform
- -1.65 V to 3.6 V power supply
- --40 to 125 °C temperature range
- -0.27 μA Standby mode (2 wakeup pins)
- -0.4 μA Stop mode (16 wakeup lines)
- -0.8 μA Stop mode + RTC + 8-Kbyte RAM retention
- -88 μA/MHz in Run mode
- -3.5 μs wakeup time (from RAM)
- -5 μs wakeup time (from Flash memory)
- Core: Arm ® 32-bit Cortex ® -M0+ with MPU
- -From 32 kHz up to 32 MHz max.
- -0.95 DMIPS/MHz
- Memories
- -Up to 64-Kbyte Flash memory with ECC
- -8-Kbyte RAM
- -2 Kbytes of data EEPROM with ECC
- -20-byte backup register
- -Sector protection against R/W operation
- Up to 51 fast I/Os (45 I/Os 5V tolerant)
- Reset and supply management
- -Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds
- -Ultra-low-power POR/PDR
- -Programmable voltage detector (PVD)
- Clock sources
- -1 to 25 MHz crystal oscillator
- -32 kHz oscillator for RTC with calibration
- -High speed internal 16 MHz factory-trimmed RC (+/- 1%)
- -Internal low-power 37 kHz RC
- -Internal multispeed low-power 65 kHz to 4.2 MHz RC
- -PLL for CPU clock
- Pre-programmed bootloader
- -USART, SPI supported
- Development support
- -Serial wire debug supported
TFBGA64 (5x5 mm)
STM32L051T8 Pin Configuration
Figure 3. STM32L051x6/8 LQFP64 pinout
- The above figure shows the package top view.
- PA11 and PA12 input/outputs (greyed out pins) are supplied by VDDIO2.
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Figure 4. STM32L051x6/8 TFBGA64 ballout
- The above figure shows the package top view.
- PA11 and PA12 input/outputs (greyed out pins) are supplied by VDDIO2.
Figure 5. STM32L051x6/8 LQFP48 pinout
- The above figure shows the package top view.
- PA11 and PA12 input/outputs (greyed out pins) are supplied by VDDIO2.
- The above figure shows the package top view.
- PA11 and PA12 input/outputs (greyed out pins) are supplied by VDDIO2.
Figure 6. STM32L051x6/8 UFQFPN48
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Figure 7. STM32L051x6/8 WLCSP36 ballout
- The above figure shows the package top view.
- The above figure shows the package top view.
Figure 8. STM32L051x6/8 LQFP32 pinout
Figure 9. STM32L051x6/8 UFQFPN32 pinout
- The above figure shows the package top view.
Table 14. Legend/abbreviations used in the pinout table
| Name | Definition the pin name, the pin the actual pin name | Abbreviation Pin name Unless otherwise specified in brackets below function during and after reset is the same as |
|---|---|---|
| Supply pin | Supply pin | Pin type |
| I | Input only pin | I/O |
| Input / output pin | FT | |
| 5 V tolerant I/O | 5 V tolerant I/O | FTf 5 V tolerant I/O, FM+ capable |
| TC | Standard 3.3V I/O | I/O structure B |
| Dedicated BOOT0 pin | Dedicated BOOT0 pin | RST Bidirectional reset pin with embedded weak pull-up resistor |
| Pin functions | GPIOx_AFR registers | |
| Additional functions | Additional functions |
Table 14. Legend/abbreviations used in the pinout table
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Table 15. STM32L051x6/8 pin definitions
| Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - WLCSP36 (1) | Pin Number - LQFP32 | Pin Number - UFQFPN32 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | B2 | 1 | 1 | - | - | - | VDD | S | - | - | - | - |
| 2 | A2 | 2 | 2 | - | - | - | PC13 | I/O | FT | - | - | RTC_TAMP1/ RTC_TS/ RTC_OUT/ WKUP2 |
| 3 | A1 | 3 | 3 | A6 | 2 | 2 | PC14- OSC32_IN (PC14) | I/O | FT | - | - | OSC32_IN |
| 4 | B1 | 4 | 4 | B6 | 3 | 3 | PC15- OSC32_OUT (PC15) | I/O | TC | - | - | OSC32_OUT |
| 5 | C1 | 5 | 5 | - | - | - | PH0-OSC_IN (PH0) | I/O | TC | - | - | OSC_IN |
| 6 | D1 | 6 | 6 | - | - | - | PH1- OSC_OUT (PH1) | I/O | TC | - | - | OSC_OUT |
| 7 | E1 | 7 | 7 | C6 | 4 | 4 | NRST | I/O | RST | - | - | - |
| 8 | E3 | - | - | - | - | - | PC0 | I/O | FT | - | LPTIM1_IN1, EVENTOUT | ADC_IN10 |
| 9 | E2 | - | - | - | - | - | PC1 | I/O | FT | - | LPTIM1_OUT, EVENTOUT | ADC_IN11 |
| 10 | F2 | - | - | - | - | - | PC2 | I/O | FT | - | LPTIM1_IN2, SPI2_MISO/I2S2_M CK | ADC_IN12 |
| 11 | - | - | - | - | - | - | PC3 | I/O | FT | - | LPTIM1_ETR, SPI2_MOSI/I2S2_SD | ADC_IN13 |
| 12 | F1 | 8 | 8 | - | - | - | VSSA | S | - | - | - | |
| - | G1 | - | - | E6 | - | - | VREF+ | S | - | - | - | |
| 13 | H1 | 9 | 9 | D5 | 5 | 5 | VDDA | S | - | - | - | |
| 14 | G2 | 10 | 10 | D4 | 6 | 6 | PA0 | I/O | TC | - | TIM2_CH1, USART2_CTS, TIM2_ETR, COMP1_OUT | COMP1_INM6, ADC_IN0, RTC_TAMP2/WKU P1 |
Table 15. STM32L051x6/8 pin definitions
Table 15. STM32L051x6/8 pin definitions (continued)
| Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - WLCSP36 (1) | Pin Number - LQFP32 | Pin Number - UFQFPN32 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 15 | H2 | 11 | 11 | F6 | 7 | 7 | PA1 | I/O | FT | - | EVENTOUT, TIM2_CH2, USART2_RTS/ USART2_DE, TIM21_ETR | COMP1_INP, ADC_IN1 |
| 16 | F3 | 12 | 12 | E5 | 8 | 8 | PA2 | I/O | FT | - | TIM21_CH1, TIM2_CH3, USART2_TX, COMP2_OUT | COMP2_INM6, ADC_IN2 |
| 17 | G3 | 13 | 13 | F5 | 9 | 9 | PA3 | I/O | FT | - | TIM21_CH2, TIM2_CH4, USART2_RX | COMP2_INP, ADC_IN3 |
| 18 | C2 | - | - | - | - | - | VSS | S | - | - | - | |
| 19 | D2 | - | - | - | - | - | VDD | S | - | - | - | |
| 20 | H3 | 14 | 14 | E4 | 10 | 10 | PA4 | I/O | TC | SPI1_NSS, USART2_CK, TIM22_ETR | COMP1_INM4, COMP2_INM4, ADC_IN4 | |
| 21 | F4 | 15 | 15 | F4 | 11 | 11 | PA5 | I/O | TC | - | SPI1_SCK, TIM2_ETR, TIM2_CH1 | COMP1_INM5, COMP2_INM5, ADC_IN5 |
| 22 | G4 | 16 | 16 | E3 | 12 | 12 | PA6 | I/O | FT | - | SPI1_MISO, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT | ADC_IN6 |
| 23 | H4 | 17 | 17 | F3 | 13 | 13 | PA7 | I/O | FT | - | SPI1_MOSI, TIM22_CH2, EVENTOUT, COMP2_OUT | ADC_IN7 |
| 24 | H5 | - | - | - | - | - | PC4 | I/O | FT | - | EVENTOUT, LPUART1_TX | ADC_IN14 |
| 25 | H6 | - | - | - | - | - | PC5 | I/O | FT | - | LPUART1_RX, | ADC_IN15 |
| 26 | F5 | 18 | 18 | D3 | 14 | 14 | PB0 | I/O | FT | - | EVENTOUT | ADC_IN8, VREF_OUT |
| 27 | G5 | 19 | 19 | C3 | 15 | 15 | PB1 | I/O | FT | - | LPUART1_RTS/ LPUART1_DE | ADC_IN9, VREF_OUT |
Table 15. STM32L051x6/8 pin definitions (continued)
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Table 15. STM32L051x6/8 pin definitions (continued)
| Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - WLCSP36 (1) | Pin Number - LQFP32 | Pin Number - UFQFPN32 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 28 | G6 | 20 | 20 | F2 | - | 16 | PB2 | I/O | FT | - | LPTIM1_OUT | - |
| 29 | G7 | 21 | 21 | E2 | - | - | PB10 | I/O | FT | - | TIM2_CH3, LPUART1_TX, SPI2_SCK, I2C2_SCL | - |
| 30 | H7 | 22 | 22 | D2 | - | - | PB11 | I/O | FT | - | EVENTOUT, TIM2_CH4, LPUART1_RX, I2C2_SDA | - |
| 31 | D6 | 23 | 23 | - | 16 | - | VSS | S | - | - | - | - |
| 32 | E5 | 24 | 24 | F1 | 17 | 17 | VDD | S | - | - | - | - |
| 33 | H8 | 25 | 25 | - | - | - | PB12 | I/O | FT | - | SPI2_NSS/I2S2_WS, LPUART1_RTS/ LPUART1_DE, EVENTOUT | - |
| 34 | G8 | 26 | 26 | - | - | - | PB13 | I/O | FTf | - | SPI2_SCK/I2S2_CK, LPUART1_CTS, I2C2_SCL, TIM21_CH1 | - |
| 35 | F8 | 27 | 27 | - | - | - | PB14 | I/O | FTf | - | SPI2_MISO/I 2S2_MCK, RTC_OUT, LPUART1_RTS/ LPUART1_DE, I2C2_SDA, TIM21_CH2 | - |
| 36 | F7 | 28 | 28 | - | - | - | PB15 | I/O | FT | - | SPI2_MOSI/I2S2_SD , RTC_REFIN | - |
| 37 | F6 | - | - | - | - | - | PC6 | I/O | FT | - | TIM22_CH1 | - |
| 38 | E7 | - | - | - | - | - | PC7 | I/O | FT | - | TIM22_CH2 | - |
| 39 | E8 | - | - | - | - | - | PC8 | I/O | FT | - | TIM22_ETR | - |
| 40 | D8 | - | - | - | - | - | PC9 | I/O | FT | - | TIM21_ETR | - |
| 41 | D7 | 29 | 29 | E1 | 18 | 18 | PA8 | I/O | FT | - | MCO, EVENTOUT, USART1_CK | - |
Table 15. STM32L051x6/8 pin definitions (continued)
Table 15. STM32L051x6/8 pin definitions (continued)
| Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - WLCSP36 (1) | Pin Number - LQFP32 | Pin Number - UFQFPN32 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 42 | C7 | 30 | 30 | D1 | 19 | 19 | PA9 | I/O | FT | - | MCO, USART1_TX | - |
| 43 | C6 | 31 | 31 | C1 | 20 | 20 | PA10 | I/O | FT | - | USART1_RX | - |
| 44 | C8 | 32 | 32 | C2 | 21 | 21 | PA11 | I/O | FT | - | SPI1_MISO, EVENTOUT, USART1_CTS, COMP1_OUT | - |
| 45 | B8 | 33 | 33 | B1 | 22 | 22 | PA12 | I/O | FT | - | SPI1_MOSI, EVENTOUT, USART1_RTS/ USART1_DE, COMP2_OUT | - |
| 46 | A8 | 34 | 34 | A1 | 23 | 23 | PA13 | I/O | FT | - | SWDIO | - |
| 47 | D5 | 35 | 35 | - | - | - | VSS | S | - | - | - | |
| 48 | E6 | 36 | 36 | - | - | - | VDDIO2 | S | - | - | - | |
| 49 | A7 | 37 | 37 | B2 | 24 | 24 | PA14 | I/O | FT | - | SWCLK, USART2_TX | |
| 50 | A6 | 38 | 38 | A2 | 25 | 25 | PA15 | I/O | FT | - | SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 | - |
| 51 | B7 | - | - | - | - | - | PC10 | I/O | FT | - | LPUART1_TX | - |
| 52 | B6 | - | - | - | - | - | PC11 | I/O | FT | - | LPUART1_RX | - |
| 53 | C5 | - | - | - | - | - | PC12 | I/O | FT | - | - | - |
| 54 | B5 | - | - | - | - | - | PD2 | I/O | FT | - | LPUART1_RTS/ LPUART1_DE | - |
| 55 | A5 | 39 | 39 | B3 | 26 | 26 | PB3 | I/O | FT | - | SPI1_SCK, TIM2_CH2, EVENTOUT | COMP2_INN |
| 56 | A4 | 40 | 40 | A3 | 27 | 27 | PB4 | I/O | FT | - | SPI1_MISO, EVENTOUT, TIM22_CH1 | COMP2_INP |
Table 15. STM32L051x6/8 pin definitions (continued)
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Table 15. STM32L051x6/8 pin definitions (continued)
| Pin Number - LQFP64 | Pin Number - TFBGA64 | Pin Number - LQFP48 | Pin Number - UFQFPN48 | Pin Number - WLCSP36 (1) | Pin Number - LQFP32 | Pin Number - UFQFPN32 | Pin name (function after reset) | Pin type | I/O structure | Notes | Alternate functions | Additional functions |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 57 | C4 | 41 | 41 | C4 | 28 | 28 | PB5 | I/O | FT | - | SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM22_CH2 | COMP2_INP |
| 58 | D3 | 42 | 42 | B4 | 29 | 29 | PB6 | I/O | FTf | - | USART1_TX, I2C1_SCL, LPTIM1_ETR | COMP2_INP |
| 59 | C3 | 43 | 43 | A4 | 30 | 30 | PB7 | I/O | FTf | - | USART1_RX, I2C1_SDA, LPTIM1_IN2 | COMP2_INP, PVD_IN |
| 60 | B4 | 44 | 44 | C5 | 31 | 31 | BOOT0 | B | - | - | - | |
| 61 | B3 | 45 | 45 | B5 | - | 32 | PB8 | I/O | FTf | - | I2C1_SCL | - |
| 62 | A3 | 46 | 46 | - | - | - | PB9 | I/O | FTf | - | EVENTOUT, I2C1_SDA, SPI2_NSS/I2S2_WS | - |
| 63 | D4 | 47 | 47 | D6 | 32 | - | VSS | S | - | - | - | - |
| 64 | E4 | 48 | 48 | A5 | 1 | 1 | VDD | S | - | - | - | - |
Table 15. STM32L051x6/8 pin definitions (continued)
Table 16. Alternate function port A
| Port | AF0 - SPI1/TIM21/SYS_A F/EVENTOUT/ | AF1 - - | AF2 - TIM2/ EVENTOUT/ | AF3 - EVENTOUT | AF4 - USART1/2/3 TIM2/21/22 | AF5 AF6 - EVENTOUT | AF7 - COMP1/2 |
|---|---|---|---|---|---|---|---|
| PA0 | - | - | TIM2_CH1 | - | USART2_CTS TIM2_ETR | - | COMP1_OUT |
| PA1 | EVENTOUT | - | TIM2_CH2 | - | USART2_RTS/ USART2_DE TIM21_ETR | - | - |
| PA2 | TIM21_CH1 | - | TIM2_CH3 | - | USART2_TX - | - | COMP2_OUT |
| PA3 | TIM21_CH2 | - | TIM2_CH4 | - | USART2_RX - | - | - |
| PA4 | SPI1_NSS | - | - | - | USART2_CK TIM22_ETR | - | - |
| PA5 | SPI1_SCK | - | TIM2_ETR | - | - TIM2_CH1 | - | - |
| PA6 | SPI1_MISO | - | - | - | LPUART1_CTS TIM22_CH1 | EVENTOUT | COMP1_OUT |
| PA7 | SPI1_MOSI | - | - | - | - TIM22_CH2 | EVENTOUT | COMP2_OUT |
| PA8 | MCO | - | - | EVENTOUT | USART1_CK - | - | - |
| PA9 | MCO | - | - | - | USART1_TX - | - | - |
| PA10 | - | - | - | - | USART1_RX - | - | - |
| PA11 | SPI1_MISO | - | EVENTOUT | - | USART1_CTS - | - | COMP1_OUT |
| PA12 | SPI1_MOSI | - | EVENTOUT | - | USART1_RTS/ USART1_DE - | - | COMP2_OUT |
| PA13 | SWDIO | - | - | - | - - | - | - |
| PA14 | SWCLK | - | - | - | USART2_TX - | - | - |
| PA15 | SPI1_NSS | - | TIM2_ETR | EVENTOUT | USART2_RX TIM2_CH1 | - | - |
Table 16. Alternate function port A
Table 17. Alternate function port B
| Port | Port | AF0 - SPI1/SPI2/I2S2/ USART1/ EVENTOUT/ | AF1 - I2C1 | AF2 - LPUART1/LPTIM /TIM2/SYS_AF/ EVENTOUT | AF3 - I2C1 | AF4 - I2C1/TIM22/ EVENTOUT/ LPUART1 | AF5 - SPI2/I2S2/I2C2 | AF6 - I2C2/TIM21/ EVENTOUT |
|---|---|---|---|---|---|---|---|---|
| PB0 | EVENTOUT | - | - | - | - | - | - | |
| PB1 | - | - | - | - | LPUART1_RTS/ LPUART1_DE | - | - | |
| PB2 | - | - | LPTIM1_OUT | - | - | - | - | |
| PB3 | SPI1_SCK | - | TIM2_CH2 | - | EVENTOUT | - | - | |
| PB4 | SPI1_MISO | - | EVENTOUT | - | TIM22_CH1 | - | - | |
| PB5 | SPI1_MOSI | - | LPTIM1_IN1 | I2C1_SMBA | TIM22_CH2 | - | - | |
| PB6 | USART1_TX | I2C1_SCL | LPTIM1_ETR | - | - | - | - | |
| PB7 | USART1_RX | I2C1_SDA | LPTIM1_IN2 | - | - | - | - | |
| PB8 | - | - | - | - | I2C1_SCL | - | - | |
| PB9 | - | - | EVENTOUT | - | I2C1_SDA | SPI2_NSS/I2S2_ WS | - | |
| PB10 | - | - | TIM2_CH3 | - | LPUART1_TX | SPI2_SCK | I2C2_SCL | |
| PB11 | EVENTOUT | - | TIM2_CH4 | - | LPUART1_RX | - | I2C2_SDA | |
| PB12 | SPI2_NSS/I2S2_WS | - | LPUART1_RTS/ LPUART1_DE | - | - | - | EVENTOUT | |
| PB13 | SPI2_SCK/I2S2_CK | - | - | - | LPUART1_CTS | I2C2_SCL | TIM21_CH1 | |
| PB14 | SPI2_MISO/I2S2_MCK | - | RTC_OUT | - | LPUART1_RTS/ LPUART1_DE | I2C2_SDA | TIM21_CH2 | |
| PB15 | SPI2_MOSI/I2S2_SD | - | RTC_REFIN | - | - | - |
STM32L051T8 Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 26 and Table 56 , respectively.
Unless otherwise specified, the parameters given in Table 56 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 21 .
Table 56. I/O AC characteristics (1)
| OSPEEDRx[1:0] bit value (1) | Symbol | Parameter | Conditions | Min | Max (2) | Unit |
|---|---|---|---|---|---|---|
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 400 | kHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 100 | kHz |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 125 | ns |
| 00 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 320 | ns |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 2 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 0.6 | MHz |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 30 | ns |
| 01 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 65 | ns |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 10 | MHz |
| 10 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 2 | MHz |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 2.7 V to 3.6 V | - | 13 | ns |
| 10 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 28 | ns |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 35 | MHz |
| 11 | F max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 10 | MHz |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 30 pF, V DD = 2.7 V to 3.6 V | - | 6 | ns |
| 11 | t f(IO)out t r(IO)out | Output rise and fall time | C L = 50 pF, V DD = 1.65 V to 2.7 V | - | 17 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 1 | MHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 10 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 30 | ns |
| Fm+ configuration (4) | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 350 | KHz |
| Fm+ configuration (4) | t f(IO)out | Output fall time | C L = 50 pF, V DD = 1.65 V to 3.6 V | - | 15 | ns |
| Fm+ configuration (4) | t r(IO)out | Output rise time | C L = 50 pF, V DD = 2.5 V to 3.6 V | - | 60 | ns |
| - | t EXTIpw | Pulse width of external signals detected by the EXTI controller | - | 8 | - | ns |
- The maximum frequency is defined in Figure 26 .
- When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the line reference manual for a detailed description of Fm+ I/O configuration.
Figure 26. I/O AC characteristics definition
STM32L051T8 Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 18: Voltage characteristics , Table 19: Current characteristics , and Table 20: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard. Extended mission profiles are available on demand.
Table 18. Voltage characteristics
| Symbol | Definition | Min | Max | Unit |
|---|---|---|---|---|
| V DD -V SS | External main supply voltage (including V DDA , V DDIO2 , V DD ) (1) | -0.3 | 4.0 | V |
| V IN (2) | Input voltage on FT and FTf pins | V SS - 0.3 | V DD +4.0 | V |
| V IN (2) | Input voltage on TC pins | V SS - 0.3 | 4.0 | V |
| V IN (2) | Input voltage on BOOT0 | V SS | V DD + 4.0 | V |
| V IN (2) | Input voltage on any other pin | V SS - 0.3 | 4.0 | V |
| | ∆ V DD | | Variations between different V DDx power pins | - | 50 | mV |
| |V DDA -V DDx | | Variations between any V DDx and V DDA power pins (3) | - | 300 | mV |
| | ∆ V SS | | Variations between all different ground pins | - | 50 | mV |
| V REF+ -V DDA | Allowed voltage difference for V REF+ > V DDA | - | 0.4 | V |
| V ESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 6.3.11 | see Section 6.3.11 |
Table 19. Current characteristics
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| Σ I VDD (2) | Total current into sum of all V DD power lines (source) (1) | 105 | mA |
| Σ I VSS (2) | Total current out of sum of all V SS ground lines (sink) (1) | 105 | mA |
| Σ I VDDIO2 | Total current into V DDIO2 power line (source) | 25 | mA |
| I VDD(PIN) | Maximum current into each V DD power pin (source) (1) | 100 | mA |
| I VSS(PIN) | Maximum current out of each V SS ground pin (sink) (1) | 100 | mA |
| I IO | Output current sunk by any I/O and control pin except FTf pins | 16 | mA |
| I IO | Output current sunk by FTf pins | 22 | mA |
| I IO | Output current sourced by any I/O and control pin | -16 | mA |
| Σ I IO(PIN) | Total output current sunk by sum of all IOs and control pins except PA11 and PA12 (2) | 90 | mA |
| Σ I IO(PIN) | Total output current sunk by PA11 and PA12 | 25 | mA |
| Σ I IO(PIN) | Total output current sourced by sum of all IOs and control pins (2) | -90 | mA |
| I INJ(PIN) | Injected current on FT, FTf, RST and B pins | -5/+0 (3) | mA |
| I INJ(PIN) | Injected current on TC pin | ± 5 (4) | mA |
| Σ I INJ(PIN) | Total injected current (sum of all I/O and control pins) (5) | ± 25 | mA |
- This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count LQFP packages.
- Positive current injection is not possible on these I/Os. A negative injection is induced by V IN <V SS . I INJ(PIN) must never be exceeded. Refer to Table 18 for maximum allowed input voltage values.
- A positive injection is induced by V IN > V DD while a negative injection is induced by V IN < V SS . I INJ(PIN) must never be exceeded. Refer to Table 18: Voltage characteristics for the maximum allowed input voltage values.
- When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
Table 20. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
99
STM32L051T8 Thermal Information
The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:
T J max = T A max + (P D max × Θ JA )
STM32L051T8 Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark.
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32L051 | STMicroelectronics | — |
| STM32L051C6 | STMicroelectronics | — |
| STM32L051C8 | STMicroelectronics | — |
| STM32L051K6 | STMicroelectronics | — |
| STM32L051K8 | STMicroelectronics | — |
| STM32L051K8T6 | STMicroelectronics | 32-LQFP |
| STM32L051R6 | STMicroelectronics | — |
| STM32L051R8 | STMicroelectronics | — |
| STM32L051T6 | STMicroelectronics | — |
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