NRF9151
Cellular IoT System-in-PackageThe NRF9151 is a cellular iot system-in-package from Nordic Semiconductor. View the full NRF9151 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
NRF9151 shares its datasheet with NRF9151-LACA-R7, whose page lists every part number it covers.
Official NRF9151 datasheet (PDF) — the source this page was extracted from.
NRF9151 Key Specifications
| Parameter | Value |
|---|---|
| RAM | 256 KB |
| Processor | Arm Cortex-M33 |
| Flash Memory | 1 MB |
| ADC Resolution | 12-bit |
| Supply Voltage | 3.0 V to 5.5 V |
| ADC Sampling Rate | 200 ksps |
| PSM Floor Current | 2.7 μA |
| Wireless Protocols | LTE Cat-M1/NB1/NB2/NTN, DECT NR+, GPS, QZSS |
| Max LTE Output Power | 23 dBm |
| Communication Interfaces | UART, SPI, I2C, I2S, PDM, PWM |
NRF9151 Overview
Part: nRF9151
Type: LTE-M/NB-IoT/DECT NR+ and GNSS System-in-Package with ARM Cortex-M33 MCU
Description: Low-power cellular IoT SiP integrating an Arm Cortex-M33 microcontroller with 1 MB flash and 256 KB RAM, LTE-M/NB-IoT modem, DECT NR+, and GPS receiver operating from 3.0 V to 5.5 V.
Operating Conditions:
- Supply voltage: 3.0 V to 5.5 V
Absolute Maximum Ratings:
- Max junction/storage temperature: -40 to 95 °C (Storage temperature)
Key Specs:
- LTE Cat-M1 sensitivity: -108 dBm (low band), -107 dBm (mid band)
- RF output power: Up to 23 dBm (Power Class 3), up to 20 dBm (Power Class 5)
- DECT NR+ transmit power: 21 dBm (Class II) on bands 1, 2, 9, 22; 19 dBm (Class III) on band 4
- LTE PSM floor current: 2.7 μA (at 3.7 V)
- eDRX current @ 81.92 s: 18 μA (Cat-M1), 32 μA (Cat-NB1) at 3.7 V (UICC included)
- Antenna input level: 10 dBm max (ANT), -15 dBm max (GPS, LNA turned on, max gain)
- ADC: 12-bit, 200 ksps, 8 configurable channels
- Flash endurance / retention: 10,000 write/erase cycles; 10 years at 85 °C
Features:
- Arm Cortex-M33 application processor with Arm TrustZone and Arm CryptoCell 310
- Multimode LTE-M, NB-IoT (3GPP Rel 14), and IoT NTN (3GPP Rel 17) modem
- Integrated GPS receiver supporting GPS L1 C/A and QZSS L1 C/A
- Support for DECT NR+
- Peripheral set including EasyDMA-supported SPI, I2C, UART, PDM, I2S, and PWM
- Single 50 Ω antenna interface
- 32 general-purpose I/O pins
Applications:
- Sensor networks
- Logistics and asset tracking
- Smart energy
- Smart building automation
- Smart agriculture
Package:
- LGA package (12.1 × 11.1 × 1.2 mm)
NRF9151 Features
-
Peripheral tasks can subscribe to channels
-
Peripheral events can be published on channels
-
Publish/subscribe pattern enabling multiple connection options that include the following:
-
One-to-one
-
One-to-many
-
Many-to-one
-
Many-to-many
The DPPI consists of several PPIBus modules, which are connected to a fixed number of DPPI channels and a DPPI configuration (DPPIC).
Figure 18: DPPI overview
NRF9151 Applications
- Sensor networks
- Logistics and asset tracking
- Smart energy
- Smart building automation
- Smart agriculture
NRF9151 Pin Configuration
The GPIO port peripheral implements up to 32 pins, PIN0 through PIN31 . Each of these pins can be individually configured in the PIN_CNF[n] registers (n=0..31).
The following parameters can be configured through these registers:
- Direction
- Drive strength
- Enabling of pull-up and pull-down resistors
- Pin sensing
- Input buffer disconnect
- Analog input (for selected pins)
Note: All write-capable registers are retained registers, see POWER - Power control on page 67 for more information.
The input buffer of a GPIO pin can be disconnected from the pin to enable power savings when the pin is not used as an input, see GPIO port and the GPIO pin details on page 163. Inputs must be connected to get a valid input value in the IN register, and for the sense mechanism to get access to the pin.
Other peripherals in the system can connect to GPIO pins and override their output value and configuration, or read their analog or digital input value. See GPIO port and the GPIO pin details on page 163.
Selected pins also support analog input signals, see ANAIN in GPIO port and the GPIO pin details on page 163. The assignment of the analog pins can be found in Pin assignments on page 518.
The following delays should be taken into considerations:
- There is a delay of 2 CPU clock cycles from the GPIO pad to the IN register.
- The GPIO pad must be low (or high depending on the SENSE polarity) for 3 CPU clock cycles after DETECT has gone high to generate a new DETECT signal.
Note: When a pin is configured as digital input, care has been taken to minimize increased current consumption when the input voltage is between VIL and VIH. However, it is a good practice to ensure that the external circuitry does not drive that pin to levels between VIL and VIH for a long period of time.
NRF9151 Electrical Characteristics
NRF9151 Absolute Maximum Ratings
Maximum ratings are the extreme limits to which the chip can be exposed for a limited amount of time without permanently damaging it. Exposure to absolute maximum ratings for prolonged periods of time may affect the reliability of the device.
| Note | Min. | Max. Unit | |
|---|---|---|---|
| VDD | -0.3 | 5.5 | |
| VDD_GPIO | -0.3 | 3.9 | |
| SIM_1V8 | 1.65 | 1.95 | |
| VSS | 0 |
Table 62: Supply voltage
| Note | Min. | Max. | Unit | |
|---|---|---|---|---|
| V I/O , VDD_GPIO ≤ 3.6 V | -0.3 | VDD_GPIO + 0.3 | V | |
| V I/O , VDD_GPIO > 3.6 V | -0.3 | 3.9 | V |
Table 63: I/O pin voltage
| Note | Min. | Max. | Unit | |
|---|---|---|---|---|
| ANT antenna input level | 10 | dBm | ||
| GPS antenna input level | LNA turned on, max gain | -15 | dBm | |
| RF port ruggedness | Maximum deviation from 50 Ω without damaging the module | 10:1 | VSWR |
Table 64: Radio
Table 65: Environmental (LGA package)
| Note | Min. | Max. | Unit | |
|---|---|---|---|---|
| Storage temperature | -40 | 95 | °C | |
| Reflow conditions | The recommended reflow profile is JEDEC J-STD-020D with 3 maximum reflow cycles. | |||
| MSL | Moisture Sensitivity Level | 3 | ||
| ESD HBM AUX | AUX pin Human Body Model 1 | 500 | V | |
| ESD HBM AUX Class | AUX pin Human Body Model Class 1 | 1B | ||
| ESD HBM | Human Body Model 2 | 1.5 | kV | |
| ESD HBM Class | Human Body Model Class 2 | 1C | ||
| ESD CDM | Charged Device Model | 250 | V | |
| ESD CDM Class | Charged Device Model Class | C1 |
2 AUX pin excluded.
| Note | Min. Max. | Unit | |
|---|---|---|---|
| Endurance | 10,000 | Write/ erase cycles | |
| Retention | 10 years at 85°C | y | |
| No internal voltage boost converters |
Variants on the same datasheet
These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.
| Part Number | Manufacturer | Package |
|---|---|---|
| NRF9151-LACA-R | Nordic Semiconductor | LGA-12.1x11.1mm |
| NRF9151-LACA-R7 | Nordic Semiconductor | 113-LFLGA |
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- CH32H417QEU6 – WCH, Dual-Core RISC-V Microcontroller
All Microcontrollers (MCU) datasheetsAll Nordic Semiconductor datasheets (76)
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