GD25Q16CSJG

Part: GD25Q16C

Type: Serial NOR Flash Memory

Description: 16 Mbit (2 MB), 2.7–3.6 V uniform sector serial NOR flash memory supporting standard, dual, and quad SPI up to 120 MHz.

Operating Conditions:

• Supply voltage: 2.7 to 3.6 V
• Operating temperature: -40 to 85 °C
• Maximum clock frequency: 120 MHz (fast read with 30 pF load)

Absolute Maximum Ratings:

• Max supply voltage: 4.2 V (-0.6 to 4.2 V)
• Max junction/storage temperature: 150 °C (storage: -65 to 150 °C)

Key Specs:

• Memory density: 16 Mbit (2,097,152 bytes)
• Page program time: 0.6 ms (typical)
• Sector erase time: 45 ms (typical, 4 KB)
• Block erase time: 0.15 s (typical, 32 KB) / 0.25 s (typical, 64 KB)
• Chip erase time: 7 s (typical)
• Deep power-down current: 1 μA (typical)
• Standby current: 1 μA (typical)
• Endurance: 100,000 program/erase cycles (minimum)

Features:

• Standard SPI, Dual SPI, and Quad SPI operation (SPI Mode 0 and Mode 3)
• Flexible memory architecture with 4 KB uniform sectors and 32/64 KB uniform blocks
• Software and hardware write protection via WP# pin and status register bits
• 128-bit unique ID and 4x256-byte security registers with OTP locks
• Serial Flash Discoverable Parameters (SFDP) support
• Typical data retention of 20 years

Applications:

• Code storage and execute-in-place (XIP) applications
• Embedded microcontrollers and consumer electronics
• Low-power connected devices

Package:

• SOP8 150mil
• SOP8 208mil
• VSOP8 208mil
• DIP8 300mil
• USON8 (3x2 mm, 0.45 mm thickness)
• USON8 (3x4 mm)
• USON8 (4x4 mm, 0.45 mm thickness)
• WSON8 (6x5 mm)
• TFBGA-24 (6x4 ball array)

• ◆ 16M-bit Serial Flash
• ◆ Fast Program/Erase Speed
• -2048K-Byte
• -Page Program time: 0.6ms typical
• -256 Bytes per programmable page
• -Sector Erase time: 45ms typical
• ◆ Standard, Dual, Quad SPI
• -Block Erase time: 0.15/0.25s typical
• -Chip Erase time: 7s typical
• -Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
• -Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#
• -Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
• ◆ High Speed Clock Frequency
• -120MHz for fast read with 30PF load
• ◆ Flexible Architecture -Uniform Sector of 4K-Byte -Uniform Block of 32/64K-Byte
• ◆
• -Dual I/O Data transfer up to 240Mbits/s
• -Quad I/O Data transfer up to 480Mbits/s
• ◆ Software/Hardware Write Protection -Write protect all/portion of memory via software -Enable/Disable protection with WP# Pin -Top/Bottom Block protection
• Low Power Consumption -1μA typical deep power down current -1μA typical standby current
• ◆ Advanced Security Features -128-Bit Unique ID for each device -4x256-Byte security registers with OTP locks -Discoverable parameters (SFDP) register
• ◆ Minimum 100,000 Program/Erase Cycles
• ◆ Data Retention -20-year data retention typical
• ◆ Allows XIP (execute in place) Operation
• ◆ Single Power Supply Voltage -Full voltage range:2.7~3.6V
• ◆ Package Information
• -SOP8 (150mil)
• -SOP8 (208mil)
• -Continuous Read With 8/16/32/64-Byte Wrap
• -VSOP8 (208mil)
• -DIP8 (300mil)
• -USON8 (3*2mm)
• -USON8 (3*4mm)
• -USON8 (4*4mm)
• -WSON8 (6*5mm)
• -TFBGA-24(6*4 ball array)

Note: CS# must be driven high if chip is not selected. Please don't leave CS# floating any time after power is on.

(T= -40 °C 85 °C , VCC=2.73.6V)

1. Typical values given for TA=25° C.
2. Value guaranteed by design and/or characterization, not 100% tested in production.

(T= -40 °C 105 °C , VCC=2.73.6V)

1. Typical values given for TA=25° C.
2. Value guaranteed by design and/or characterization, not 100% tested in production.

(T= -40 °C 125 °C , VCC=2.73.6V)

1. Typical values given for TA=25° C.
2. Value guaranteed by design and/or characterization, not 100% tested in production.