STM32F103C8T6

Part: STM32F103x6 STM32F103x8 STM32F103xB — STMicroelectronics

Type: ARM-based 32-bit MCU

Description: Performance line ARM Cortex-M3 32-bit RISC core MCU operating at 72 MHz, with up to 128 Kbytes Flash, up to 20 Kbytes SRAM, two 12-bit ADCs, seven 16-bit timers, USB, and CAN interfaces.

Operating Conditions:

• Supply voltage: 2.0 to 3.6 V
• Operating temperature: -40 to 85 °C (suffix-dependent — see Table 2 for grade-specific ranges)
• Internal AHB clock frequency: 0 to 72 MHz

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V
• Max continuous current: 150 mA (Total current into VDD power lines)
• Max junction/storage temperature: +150 °C (Storage temperature range)

Key Specs:

• CPU: ARM 32-bit Cortex™-M3
• Max CPU frequency: 72 MHz
• Flash memory: 32 to 128 Kbytes
• SRAM: 6 to 20 Kbytes
• ADC resolution: 12-bit
• ADC channels: 16-channel (2 x 12-bit ADCs)
• ADC conversion range: 0 to 3.6 V
• I/O ports: Up to 80 fast I/O ports, 5 V-tolerant (except analog inputs)
• SPI speed: 18 Mbit/s

Features:

• Single-cycle multiplication and hardware division
• POR, PDR, and programmable voltage detector (PVD)
• 4-to-16 MHz crystal oscillator
• Internal 8 MHz factory-trimmed RC
• Internal 40 kHz RC
• PLL for CPU clock
• 32 kHz oscillator for RTC with calibration
• Sleep, Stop and Standby low power modes
• VBAT supply for RTC and backup registers
• Temperature sensor
• 7-channel DMA controller
• Serial wire debug (SWD) & JTAG interfaces
• Up to 7 timers (general purpose, advanced control, watchdog, SysTick)
• Up to 9 communication interfaces (I2C, USART, SPI, CAN, USB)

Applications:

• Motor drive and application control
• Medical and handheld equipment
• PC peripherals gaming and GPS platforms
• Industrial applications: PLC, inverters, printers, and scanners
• Alarm systems, Video intercom, and HVAC

Package:

• VFQFPN36 6 × 6 mm
• LQFP48 7 x 7 mm
• LQFP64 10 x 10 mm
• LQFP100 14 x 14 mm
• BGA100 10 x 10 mm

• ■ Core: ARM 32-bit Cortex™-M3 CPU
• -72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
• -Single-cycle multiplication and hardware division
• ■ Memories
• -32 to 128 Kbytes of Flash memory
• -6 to 20 Kbytes of SRAM
• ■ Clock, reset and supply management
• -2.0 to 3.6 V application supply and I/Os
• -POR, PDR, and programmable voltage detector (PVD)
• -4-to-16 MHz crystal oscillator
• -Internal 8 MHz factory-trimmed RC
• -Internal 40 kHz RC
• -PLL for CPU clock
• -32 kHz oscillator for RTC with calibration
• ■ Low power
• -Sleep, Stop and Standby modes
• -VBAT supply for RTC and backup registers
• ■ 2 x 12-bit, 1 μs A/D converters (16-channel)
• -Conversion range: 0 to 3.6 V
• -Dual-sample and hold capability
• -Temperature sensor
• ■ DMA
• -7-channel DMA controller
• -Peripherals supported: timers, ADC, SPIs, I 2 Cs and USARTs
• ■ Up to 80 fast I/O ports
• -26/37/51/80 I/Os, all mappable on 16 external interrupt vectors, all 5 V-tolerant except for analog inputs

LQFP100 14 x 14 mm

LQFP48 7 x 7 mm

VFQFPN36 6 × 6 mm

• ■ Debug mode
• -Serial wire debug (SWD) & JTAG interfaces
• ■ Up to 7 timers
• -Up to three 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter
• -16-bit, 6-channel advanced control timer: up to 6 channels for PWM output, deadtime generation and emergency stop
• -2 watchdog timers (Independent and Window)
• -SysTick timer: a 24-bit downcounter
• ■ Up to 9 communication interfaces
• -Up to 2 x I 2 C interfaces (SMBus/PMBus)
• -Up to 3 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
• -Up to 2 SPIs (18 Mbit/s)
• -CAN interface (2.0B Active)
• -USB 2.0 full speed interface
• ■ Packages are ECOPACK® (RoHS compliant)

Pin	Name	Type	Description
1	VBAT	P
2	PC13-TAMPER-RTC	I/O	alt: RTC_OUT, RTC_TAMPER
3	PC14-OSC32_IN	I/O	alt: RCC_OSC32_IN
4	PC15-OSC32_OUT	I/O	alt: ADC1_EXTI15, ADC2_EXTI15, RCC_OSC32_OUT
5	PD0-OSC_IN	I/O	alt: RCC_OSC_IN
6	PD1-OSC_OUT	I/O	alt: RCC_OSC_OUT
7	NRST	RST
8	VSSA	P
9	VDDA	P
10	PA0-WKUP	I/O	alt: ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS
11	PA1	I/O	alt: ADC1_IN1, ADC2_IN1, TIM2_CH2, USART2_RTS
12	PA2	I/O	alt: ADC1_IN2, ADC2_IN2, TIM2_CH3, USART2_TX
13	PA3	I/O	alt: ADC1_IN3, ADC2_IN3, TIM2_CH4, USART2_RX
14	PA4	I/O	alt: ADC1_IN4, ADC2_IN4, SPI1_NSS, USART2_CK
15	PA5	I/O	alt: ADC1_IN5, ADC2_IN5, SPI1_SCK
16	PA6	I/O	alt: ADC1_IN6, ADC2_IN6, SPI1_MISO, TIM1_BKIN, TIM3_CH1
17	PA7	I/O	alt: ADC1_IN7, ADC2_IN7, SPI1_MOSI, TIM1_CH1N, TIM3_CH2
18	PB0	I/O	alt: ADC1_IN8, ADC2_IN8, TIM1_CH2N, TIM3_CH3
19	PB1	I/O	alt: ADC1_IN9, ADC2_IN9, TIM1_CH3N, TIM3_CH4
20	PB2	I/O
21	PB10	I/O	alt: I2C2_SCL, TIM2_CH3, USART3_TX
22	PB11	I/O	alt: ADC1_EXTI11, ADC2_EXTI11, I2C2_SDA, TIM2_CH4, USART3_RX
23	VSS	P
24	VDD	P
25	PB12	I/O	alt: I2C2_SMBA, SPI2_NSS, TIM1_BKIN, USART3_CK
26	PB13	I/O	alt: SPI2_SCK, TIM1_CH1N, USART3_CTS
27	PB14	I/O	alt: SPI2_MISO, TIM1_CH2N, USART3_RTS
28	PB15	I/O	alt: ADC1_EXTI15, ADC2_EXTI15, SPI2_MOSI, TIM1_CH3N
29	PA8	I/O	alt: RCC_MCO, TIM1_CH1, USART1_CK
30	PA9	I/O	alt: TIM1_CH2, USART1_TX
31	PA10	I/O	alt: TIM1_CH3, USART1_RX
32	PA11	I/O	alt: ADC1_EXTI11, ADC2_EXTI11, CAN_RX, TIM1_CH4, USART1_CTS, USB_DM
33	PA12	I/O	alt: CAN_TX, TIM1_ETR, USART1_RTS, USB_DP
34	PA13	I/O	alt: SYS_JTMS-SWDIO
35	VSS	P
36	VDD	P
37	PA14	I/O	alt: SYS_JTCK-SWCLK
38	PA15	I/O	alt: ADC1_EXTI15, ADC2_EXTI15, SPI1_NSS, SYS_JTDI, TIM2_CH1, TIM2_ETR
39	PB3	I/O	alt: SPI1_SCK, SYS_JTDO-TRACESWO, TIM2_CH2
40	PB4	I/O	alt: SPI1_MISO, SYS_NJTRST, TIM3_CH1
41	PB5	I/O	alt: I2C1_SMBA, SPI1_MOSI, TIM3_CH2
42	PB6	I/O	alt: I2C1_SCL, TIM4_CH1, USART1_TX
43	PB7	I/O	alt: I2C1_SDA, TIM4_CH2, USART1_RX
44	BOOT0	I
45	PB8	I/O	alt: CAN_RX, I2C1_SCL, TIM4_CH3
46	PB9	I/O	alt: CAN_TX, I2C1_SDA, TIM4_CH4
47	VSS	P
48	VDD	P

The definition and values of input/output AC characteristics are given in Figure 21 and Table 35 , respectively.

Unless otherwise specified, the parameters given in Table 35 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 7 .

Table 35. I/O AC characteristics (1)

MODEx[1:0] bit value (1)	Symbol	Parameter	Conditions	Min	Max	Unit
10	f max(IO)out	Maximum frequency (2)	C L = 50 pF, V DD = 2 V to 3.6 V		2	MHz
10	t f(IO)out	Output high to low level fall time	C L = 50 pF, V DD = 2 V to 3.6 V		125 (3)	ns
10	t r(IO)out	Output low to high level rise time	C L = 50 pF, V DD = 2 V to 3.6 V		125 (3)	ns
01	f max(IO)out	Maximum frequency (2)	C L = 50 pF, V DD = 2 V to 3.6 V		10	MHz
01	t f(IO)out	Output high to low level fall time	C L = 50 pF, V DD = 2 V to 3.6 V		25 (3)	ns
01	t r(IO)out	Output low to high level rise time	C L = 50 pF, V DD = 2 V to 3.6 V		25 (3)	ns
11	F max(IO)out	Maximum frequency (2)	C L = 30 pF, V DD = 2.7 V to 3.6 V		50	MHz
11	F max(IO)out	Maximum frequency (2)	C L = 50 pF, V DD = 2.7 V to 3.6 V		30	MHz
11	F max(IO)out	Maximum frequency (2)	C L = 50 pF, V DD = 2 V to 2.7 V		20	MHz
11	t f(IO)out	Output high to low level fall time	C L = 30 pF, V DD = 2.7 V to 3.6 V		5 (3)	ns
11	t f(IO)out	Output high to low level fall time	C L = 50 pF, V DD = 2.7 V to 3.6 V		8 (3)	ns
11	t f(IO)out	Output high to low level fall time	C L = 50 pF, V DD = 2 V to 2.7 V		12 (3)	ns
11	t r(IO)out	Output low to high level rise time	C L = 30 pF, V DD = 2.7 V to 3.6 V		5 (3)	ns
11	t r(IO)out	Output low to high level rise time	C L = 50 pF, V DD = 2.7 V to 3.6 V		8 (3)	ns
11	t r(IO)out	Output low to high level rise time	C L = 50 pF, V DD = 2 V to 2.7 V		12 (3)	ns
-	t EXTIpw	Pulse width of external signals detected by the EXTI controller		10		ns

1. The maximum frequency is defined in Figure 21 .
2. Values based on design simulation and validated on silicon, not tested in production.

Figure 21. I/O AC characteristics definition

Figure 21. I/O AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 4: Voltage characteristics , Table 5: Current characteristics , and Table 6: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 4. Voltage characteristics

Symbol	Ratings	Min	Max	Unit
V DD -V SS	External main supply voltage (including V DDA and V DD ) (1)	-0.3	4.0	V
V IN	Input voltage on five volt tolerant pin (2)	V SS - 0.3	+5.5	V
V IN	Input voltage on any other pin (2)	V SS - 0.3	V DD +0.3	V
\	∆ V DDx \		Variations between different power pins	50
\	V SSX - V SS \		Variations between all the different ground pins	50
V ESD(HBM)	Electrostatic discharge voltage (human body model)	see Section 5.3.11: Absolute maximum ratings (electrical sensitivity)	see Section 5.3.11: Absolute maximum ratings (electrical sensitivity)

Symbol	Ratings	Max.	Unit
I VDD	Total current into V DD power lines (source) (1)	150	mA
I VSS	Total current out of V SS ground lines (sink) (1)	150	mA
I IO	Output current sunk by any I/O and control pin	25	mA
I IO	Output current source by any I/Os and control pin	- 25	mA
I INJ(PIN) (2)(3)	Injected current on NRST pin	± 5	mA
I INJ(PIN) (2)(3)	Injected current on HSE OSC_IN and LSE OSC_IN pins	± 5	mA
I INJ(PIN) (2)(3)	Injected current on any other pin (4)	± 5	mA
Σ I INJ(PIN) (2)	Total injected current (sum of all I/O and control pins) (4)	± 25	mA

1. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values). These results are based on characterization with Σ I INJ(PIN) maximum current injection on four I/O port pins of the device.

Table 6. Thermal characteristics

Symbol	Ratings	Value	Unit
T STG	Storage temperature range	-65 to +150	°C
T J	Maximum junction temperature (see Thermal characteristics)	Maximum junction temperature (see Thermal characteristics)	Maximum junction temperature (see Thermal characteristics)

The average chip-junction temperature, T J , in degrees Celsius, may be calculated using the following equation:

Where:

• T A is the Ambient Temperature in ° C,
• Θ JA is the Package Junction-to-Ambient Thermal Resistance, in ° C/W,
• PD is the sum of P INT and P I/O (P D = P INT + P I/O ),
• PINT is the product of I DD and VDD , expressed in Watts. This is the Chip Internal Power.

PI/O represents the Power Dissipation on Input and Output Pins;

Most of the time for the application P I/O < PINT and can be neglected. On the other hand, P I/O may be significant if the device is configured to drive continuously external modules and/or memories.

An approximate relationship between P D and T J (if P I/O is neglected) is given by:

Therefore (solving equations 1 and 2):

where:

K is a constant for the particular part, which may be determined from equation (3) by measuring P D (at equilibrium) for a known T A. Using this value of K, the values of P D and T J may be obtained by solving equations (1) and (2) iteratively for any value of T A .

Table 53. Thermal characteristics

Symbol	Parameter	Value	Unit
Θ JA	Thermal resistance junction-ambient LFBGA100 - 10 x 10 mm/ 0.5 mm pitch	41	°C/W
Θ JA	Thermal resistance junction-ambient LQFP100 - 14 x 14 mm/ 0.5 mm pitch	46	°C/W
Θ JA	Thermal Resistance Junction-Ambient LQFP64 - 10 x 10 mm/ 0.5 mm pitch	45	°C/W
Θ JA	Thermal resistance junction-ambient LQFP48 - 7 x 7 mm / 0.5 mm pitch	55	°C/W
Θ JA	Thermal resistance junction-ambient VFQFPN 36 - 6 x 6 mm / 0.5 mm pitch	18	°C/W

Table 53. Thermal characteristics