Part: STM32F103xC, STM32F103xD, STM32F103xE

Type: ARM Cortex-M3 MCU

Description: ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces, and up to 72 MHz maximum frequency.

Operating Conditions:

• Supply voltage: 2.0 to 3.6 V
• Operating temperature: -40 to +125 °C (Junction temperature)
• Max CPU frequency: 72 MHz
• ADC conversion range: 0 to 3.6 V

Absolute Maximum Ratings:

• Max supply voltage: 4.0 V
• Max continuous current: 200 mA (VDD)
• Max junction/storage temperature: -65 to +150 °C (Storage temperature)

Key Specs:

• CPU: ARM 32-bit Cortex-M3
• Max CPU frequency: 72 MHz
• Flash memory: 256 to 512 Kbytes
• SRAM: up to 64 Kbytes
• ADC resolution: 12-bit
• DAC resolution: 12-bit
• SPI speed: 18 Mbit/s
• DMIPS/MHz: 1.25 DMIPS/MHz (Dhrystone 2.1)

Features:

• Single-cycle multiplication and hardware division
• Flexible static memory controller (FSMC)
• LCD parallel interface (8080/6800 modes)
• Power-on reset (POR), Power-down reset (PDR), Programmable voltage detector (PVD)
• Low-power modes: Sleep, Stop, Standby
• 12-channel DMA controller
• Serial wire debug (SWD) & JTAG interfaces
• CRC calculation unit, 96-bit unique ID
• ECOPACK® packages

Package:

• LFBGA144 (144-ball)
• LFBGA100 (100-ball)
• WLCSP64 (64-ball)
• LQFP144 (144-pin)
• LQFP64 (64-pin)

• Core: ARM ® 32-bit Cortex ® -M3 CPU
• -72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
• -Single-cycle multiplication and hardware division
• Memories
• -256 to 512 Kbytes of Flash memory
• -up to 64 Kbytes of SRAM
• -Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM, PSRAM, NOR and NAND memories
• -LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
• -2.0 to 3.6 V application supply and I/Os
• -POR, PDR, and programmable voltage detector (PVD)
• -4-to-16 MHz crystal oscillator
• -Internal 8 MHz factory-trimmed RC
• -Internal 40 kHz RC with calibration
• -32 kHz oscillator for RTC with calibration
• Low power
• -Sleep, Stop and Standby modes
• -VBAT supply for RTC and backup registers
• 3 × 12-bit, 1 μs A/D converters (up to 21 channels)
• -Conversion range: 0 to 3.6 V
• -Triple-sample and hold capability
• -Temperature sensor
• 2 × 12-bit D/A converters
• DMA: 12-channel DMA controller
• -Supported peripherals: timers, ADCs, DAC, SDIO, I 2 Ss, SPIs, I 2 Cs and USARTs
• Debug mode
• -Serial wire debug (SWD) & JTAG interfaces
• -Cortex ® -M3 Embedded Trace Macrocell™
• Up to 112 fast I/O ports
• -51/80/112 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant

STM32F103XX Pinout

Based on the datasheet provided, the STM32F103XX family includes multiple package variants (LQFP64, LQFP100, LQFP144, BGA100, BGA144, WLCSP64). Since you requested STM32F103XX without specifying a package, I am providing the LQFP144 pinout (the highest pin-count variant shown in Table 5), which is the most complete representation of the family.

LQFP144 Pinout

Notes

• Package: LQFP144 (144-pin Low-Profile Quad Flat Package)
• FT designation: 5V-tolerant pins
• PC13, PC14, PC15: Limited output capability (2 MHz max, 30 pF max load, 3 mA max sink current) due to power-switch supply
• Alternate functions: Many pins support remappable alternate functions via software configuration in the RCC peripheral clock enable registers
• FSMC pins: Ports F and G are not available in 100-pin packages; see Table 6 for detailed FSMC pin assignments
• PD0/PD1: In LQFP64, these pins are configured as OSC_IN/OSC_OUT after reset; in LQFP100/144, they are available by default
• JTAG/SWD: PA13 (JTMS-SWDIO), PA14 (JTCK-SWCLK), PA15 (JTDI), PB3 (JTDO), PB4 (NJTRST) are debug pins

The definition and values of input/output AC characteristics are given in Figure 46 and Table 48 , respectively.

Unless otherwise specified, the parameters given in Table 48 are derived from tests performed under ambient temperature and V DD supply voltage conditions summarized in Table 10 .

Table 48. I/O AC characteristics (1)

1. The maximum frequency is defined in Figure 46 .
2. Guaranteed by design.

Figure 46. I/O AC characteristics definition

Figure 46. I/O AC characteristics definition

Stresses above the absolute maximum ratings listed in Table 7: Voltage characteristics , Table 8: Current characteristics , and Table 9: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Table 7. Voltage characteristics

Table 8. Current characteristics

Table 8. Current characteristics

1. Positive injection is not possible on these I/Os. A negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer to Table 7: Voltage characteristics for the maximum allowed input voltage values.
2. A positive injection is induced by V IN >VDD while a negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer to Table 7: Voltage characteristics for the maximum allowed input voltage values.
3. When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

136

Table 9. Thermal characteristics

The maximum chip junction temperature (T J max) must never exceed the values given in Table 10: General operating conditions on page 44 .

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.