STM32F446RCT6
ARM Cortex-M4 MCUThe STM32F446RCT6 is a arm cortex-m4 mcu from STMicroelectronics. View the full STM32F446RCT6 datasheet below including key specifications, pinout, electrical characteristics, absolute maximum ratings.
Official STM32F446RCT6 datasheet (PDF) — the source this page was extracted from.
Manufacturer
STMicroelectronicsCategory
Integrated CircuitsPackage
LQFP64, LQFP100, LQFP144, UFBGA144, WLCSP81
Lifecycle
Active
STM32F446RCT6 Key Specifications
| Parameter | Value |
|---|---|
| Connectivity | CANbus, EBI/EMI, I2C, IrDA, LINbus, SAI, SD, SPDIF-Rx, SPI, UART/USART, USB, USB OTG |
| Core Processor | ARM® Cortex®-M4 |
| Core Size | 32-Bit |
| Data Converters | A/D 16x12b; D/A 2x12b |
| DigiKey Programmable | Not Verified |
| Mounting Type | Surface Mount |
| Number of I/O | 50 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | Internal |
| Package / Case | 64-LQFP |
| Packaging | Tray |
| Peripherals | Brown-out Detect/Reset, DMA, I2S, LVD, POR, PWM, WDT |
| Flash Memory Size | 256KB (256K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 128K x 8 B |
| Clock Speed | 180MHz |
| Standard Pack Qty | 960 |
| Supplier Device Package | 64-LQFP (10x10) |
| Supply Voltage | 1.7V ~ 3.6V |
STM32F446RCT6 Overview
Part: STM32F446RCT6 — STMicroelectronics
Type: ARM Cortex-M4 32-bit MCU with FPU
Description: Arm Cortex-M4 MCU with FPU at up to 180 MHz (225 DMIPS), 256 KB Flash (RC variant) / up to 512 KB in the family, 128+4 KB RAM, 1.7–3.6 V supply, USB OTG HS/FS, three 12-bit ADCs and 20 communication interfaces.
Operating Conditions:
- Supply voltage (VDD): 1.7–3.6 V
- Operating temperature: -40 to 85 °C (suffix 6 version, maximum power dissipation; up to 105 °C at low power dissipation)
- Max HCLK: 180 MHz (Power Scale 1, over-drive ON); 168 MHz with over-drive OFF
- VDDA: 1.7–3.6 V (2.4–3.6 V for ADC up to 2.4 MSPS); VBAT: 1.65–3.6 V
Absolute Maximum Ratings:
- Max external supply voltage (VDD–VSS): 4.0 V (min -0.3 V)
- Input voltage on FT/FTf pins: VDD + 4.0 V max; on TTa and other pins: 4.0 V max; BOOT0: 9.0 V max
- Total current into all VDD lines: 240 mA; per VDD pin: 100 mA
- Output current per I/O pin: 25 mA sunk / -25 mA sourced; total all I/Os: 120 mA sunk / -120 mA sourced
- Max junction temperature: 125 °C
- Storage temperature: -65 to +150 °C
Key Specs:
- VDD standard operating voltage: 1.7–3.6 V
- fHCLK: up to 180 MHz (Scale 1, over-drive ON); 168 MHz (Scale 1/2, over-drive OFF/ON); 144 MHz (Scale 2, over-drive OFF); 120 MHz (Scale 3)
- fPCLK1: up to 45 MHz; fPCLK2: up to 90 MHz (over-drive ON)
- Input voltage on RST/FT/FTf pins: -0.3 to 5.5 V (2 V ≤ VDD ≤ 3.6 V); 5.2 V max for 1.7 V ≤ VDD ≤ 2 V
- Power dissipation (TA = 85 °C, suffix 6): 345 mW (LQFP64)
- VDDUSB: 3–3.6 V when USB is used
- Internal 1.2 V regulator output (VCAP): 1.26–1.40 V in Power Scale 1
Features:
- Arm Cortex-M4 with FPU, MPU, DSP instructions and ART Accelerator for 0-wait-state Flash execution
- Flexible memory controller (SRAM, PSRAM, SDRAM, NOR/NAND) and dual-mode QuadSPI
- 3× 12-bit 2.4 MSPS ADCs (7.2 MSPS interleaved), 2× 12-bit DACs
- Up to 17 timers, 16-stream DMA
- Up to 4× I2C, 4 USARTs + 2 UARTs, 4 SPIs (3 with I2S), 2× SAI, 2× CAN 2.0B, SDIO, HDMI-CEC, SPDIF-Rx
- USB 2.0 OTG FS and HS (with ULPI), 8–14-bit camera interface
- POR, PDR, PVD, BOR; RTC with VBAT supply and backup SRAM
- SWD, JTAG and Cortex-M4 ETM trace
- 96-bit unique ID, CRC unit
Applications:
Package:
- LQFP64 (10 × 10 mm) — the RC/T6 variant
STM32F446RCT6 Features
- Core: Arm ® 32-bit Cortex ® -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Memories
- -512 Kbytes of Flash memory
- -128 Kbytes of SRAM
- -Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash memories
- -Dual mode QuadSPI interface
- LCD parallel interface, 8080/6800 modes
- Clock, reset and supply management
- -1.7 V to 3.6 V application supply and I/Os
- -POR, PDR, PVD and BOR
- -4 to 26 MHz crystal oscillator
- -Internal 16 MHz factory-trimmed RC (1% accuracy)
- -32 kHz oscillator for RTC with calibration
- -Internal 32 kHz RC with calibration
- Low power
- -Sleep, Stop and Standby modes
- -VBAT supply for RTC, 20×32 bit backup registers plus optional 4 KB backup SRAM
- 3× 12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
- 2× 12-bit D/A converters
- General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
- Up to 17 timers: 2x watchdog, 1x SysTick timer and up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to four IC/OC/PWM or pulse counter
- Debug mode
- -SWD and JTAG interfaces
- -Cortex ® -M4 Trace Macrocell™
| Reference | Part numbers |
|---|---|
| STM32F446xC/E | STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, STM32F446ZE. |
DS10693 Rev 10
STM32F446RCT6 Pin Configuration
| Pin | Name | Type | Description |
|---|---|---|---|
| 1 | VBAT | S | |
| 2 | PC13 | I/O | FT (alt: EVENTOUT) |
| 3 | PC14-OSC32_IN(PC14) | I/O | FT (alt: EVENTOUT) |
| 4 | PC15-OSC32_OUT(PC15) | I/O | FT (alt: EVENTOUT) |
| 5 | PH0-OSC_IN(PH0) | I/O | FT (alt: EVENTOUT) |
| 6 | PH1-OSC_OUT(PH1) | I/O | FT (alt: EVENTOUT) |
| 7 | NRST | I/O | RST |
| 8 | PC0 | I/O | FT (alt: SAI1_MCLK_B, OTG_HS_ULPI_STP, FMC_SDNWE, EVENTOUT) |
| 9 | PC1 | I/O | FT (alt: SPI3_MOSI/I2S3_SD, SAI1_SD_A, SPI2_MOSI/I2S2_SD, EVENTOUT) |
| 10 | PC2 | I/O | FT (alt: SPI2_MISO, OTG_HS_ULPI_DIR, FMC_SDNE0, EVENTOUT) |
| 11 | PC3 | I/O | FT (alt: SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, FMC_SDCKE0, EVENTOUT) |
| 12 | VSSA | S | |
| 13 | VDDA | S | |
| 14 | PA0-WKUP(PA0) | I/O | FT (alt: TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, EVENTOUT) |
| 15 | PA1 | I/O | FT (alt: TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, EVENTOUT) |
| 16 | PA2 | I/O | FT (alt: TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, EVENTOUT) |
| 17 | PA3 | I/O | alt: TIM2_CH4, TIM5_CH4, TIM9_CH2, SAI1_FS_A, USART2_RX, OTG_HS_ULPI_D0, EVENTOUT |
| 18 | VSS | S | |
| 19 | VDD | S | |
| 20 | PA4 | I/O | alt: SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, EVENTOUT |
| 21 | PA5 | I/O | alt: TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, OTG_HS_ULPI_CK, EVENTOUT |
| 22 | PA6 | I/O | alt: TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S2_MCK, TIM13_CH1, DCMI_PIXCLK, EVENTOUT |
| 23 | PA7 | I/O | alt: TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, TIM14_CH1, FMC_SDNWE, EVENTOUT |
| 24 | PC4 | I/O | alt: I2S1_MCK, SPDIFRX_IN2, FMC_SDNE0, EVENTOUT |
| 25 | PC5 | I/O | alt: USART3_RX, SPDIFRX_IN3, FMC_SDCKE0, EVENTOUT |
| 26 | PB0 | I/O | FT (alt: TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI3_MOSI/I2S3_SD, UART4_CTS, OTG_HS_ULPI_D1, SDIO_D1, EVENTOUT) |
| 27 | PB1 | I/O | FT (alt: TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, SDIO_D2, EVENTOUT) |
| 28 | PB2-BOOT1 | I/O | FT (alt: TIM2_CH4, SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK, OTG_HS_ULPI_D4, SDIO_CK, EVENTOUT) |
| 29 | PB10 | I/O | alt: TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, SAI1_SCK_A, USART3_TX, OTG_HS_ULPI_D3, EVENTOUT |
| 30 | VCAP_1 | S | |
| 31 | VSS | S | |
| 32 | VDD | S | |
| 33 | PB12 | I/O | alt: TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, SAI1_SCK_B, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, OTG_HS_ID, EVENTOUT |
| 34 | PB13 | I/O | FT (alt: TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, EVENTOUT) |
| 35 | PB14 | - | |
| 36 | PB15 | - | |
| 37 | PC6 | - | |
| 38 | PC7 | - | |
| 39 | PC8 | - | |
| 40 | PC9 | - | |
| 41 | PA8 | - | |
| 42 | PA9 | - | |
| 43 | PA10 | - | |
| 44 | PA11 | - | |
| 45 | PA12 | - | |
| 46 | PA13 | - | |
| 47 | VSS | - | |
| 48 | VDD | - | |
| 49 | PA14 | - | |
| 50 | PA15 | - | |
| 51 | PC10 | - | |
| 52 | PC11 | - | |
| 53 | PC12 | - | |
| 54 | PD2 | - | |
| 55 | PB3 | - | |
| 56 | PB4 | - | |
| 57 | PB5 | - | |
| 58 | PB6 | - | |
| 59 | PB7 | - | |
| 60 | BOOT0 | - | |
| 61 | PB8 | - | |
| 62 | PB9 | - | |
| 63 | VSS | - | |
| 64 | VDD | - |
STM32F446RCT6 Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 32 and Table 58 , respectively.
Unless otherwise specified, the parameters given in Table 58 are derived from tests performed under the ambient temperature and V DD supply voltage conditions summarized in Table 16 .
Table 58. I/O AC characteristics (1)(2)
| OSPEEDR y[1:0] bit value (1) | Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|---|
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD ≥ 2.7 V | - | - | 4 | MHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD ≥ 1.7 V | - | - | 2 | MHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 2.7 V | - | - | 8 | MHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.8 V | - | - | 4 | MHz |
| 00 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.7 V | - | - | 3 | MHz |
| 00 | t f(IO)out / t r(IO)out | Output high to low level fall time and output low to high level rise time | C L = 50 pF, V DD = 1.7 V to 3.6 V | - | - | 100 | ns |
Table 58. I/O AC characteristics (1)(2)
171
Table 58. I/O AC characteristics (1)(2) (continued)
| OSPEEDR y[1:0] bit value (1) | Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|---|
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD ≥ 2.7 V | - | - | 25 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD ≥ 1.8 V | - | - | 12.5 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 50 pF, V DD ≥ 1.7 V | - | - | 10 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 2.7 V | - | - | 50 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.8 V | - | - | 20 | MHz |
| 01 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.7 V | - | - | 12.5 | MHz |
| 01 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 50 pF, V DD ≥ 2.7 V | - | - | 10 | ns |
| 01 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 2.7 V | - | - | 6 | ns |
| 01 | t f(IO)out / t r(IO)out | time and output low to high level rise time | C L = 50 pF, V DD ≥ 1.7 V | - | - | 20 | ns |
| 01 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 1.7 V | - | - | 10 | ns |
| 10 | f max(IO)out | Maximum frequency (3) | C L = 40 pF, V DD ≥ 2.7 V | - | - | 50 (4) | MHz |
| 10 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 2.7 V | - | - | 100 (4) | MHz |
| 10 | f max(IO)out | Maximum frequency (3) | C L = 40 pF, V DD ≥ 1.7 V | - | - | 25 | MHz |
| 10 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.8 V | - | - | 50 | MHz |
| 10 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.7 V | - | - | 42.5 | MHz |
| 10 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 40 pF, V DD ≥ 2.7 V | - | - | 6 | ns |
| 10 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 2.7 V | - | - | 4 | ns |
| 10 | t f(IO)out / t r(IO)out | time and output low to high level rise time | C L = 40 pF, V DD ≥ 1.7 V | - | - | 10 | ns |
| 10 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 1.7 V | - | - | 6 | ns |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD ≥ 2.7 V | - | - | 100 (4) | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD ≥ 1.8 V | - | - | 50 | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 30 pF, V DD ≥ 1.7 V | - | - | 42.5 | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 2.7 V | - | - | 180 (4) | MHz |
| 11 | f max(IO)out | Maximum frequency (3) | C L = 10 pF, V DD ≥ 1.8 V | - | - | 100 | MHz |
| 11 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 1.7 V | - | - | 72.5 | |
| 11 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 30 pF, V DD ≥ 2.7 V | - | - | 4 6 | ns |
| 11 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 30 pF, V DD ≥ 1.8 V | - - | - - | 7 | ns |
| 11 | t f(IO)out / t r(IO)out | time and output low to high level rise time | C L = 30 pF, V DD ≥ 1.7 V C L = 10 pF, V DD ≥ 2.7 V | - | - | 2.5 | ns |
| 11 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 1.8 V | - | - | 3.5 | ns |
| 11 | t f(IO)out / t r(IO)out | Output high to low level fall | C L = 10 pF, V DD ≥ 1.7 V | - | - | 4 | ns |
| - | t EXTIpw | Pulse width of external signals detected by the EXTI controller | - | 10 | - | - | ns |
Table 58. I/O AC characteristics (1)(2) (continued)
- Guaranteed by design.
- The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F4xx reference manual for a description of the GPIOx_SPEEDR GPIO port output speed register.
- The maximum frequency is defined in Figure 32 .
- For maximum frequencies above 50 MHz and V DD > 2.4 V, the compensation cell should be used.
Figure 32. I/O AC characteristics definition
STM32F446RCT6 Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 13 , Table 14 , and Table 15 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.
Table 13. Voltage characteristics
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD -V SS | External main supply voltage (including V DDA , V DD, V DDUSB andV BAT ) (1) | -0.3 | 4.0 | |
| V IN | Input voltage on FT & FTf pins (2) | V SS -0.3 | V DD +4.0 | |
| Input voltage on TTa pins | V SS -0.3 | 4.0 | V | |
| Input voltage on any other pin | V SS -0.3 | 4.0 | ||
| Input voltage on BOOT0 pin | V SS | 9.0 | ||
| | V DDx | | Variations between different V DD power pins | - | 50 | mV |
| |V SSX V SS | | Variations between all the different ground pins | - | 50 | |
| V ESD(HBM) | Electrostatic discharge voltage (human body model) | see Section 6.3.15 | see Section 6.3.15 | - |
VIN maximum value must always be respected. Refer to
injected current.
Table 14
for the values of the maximum allowed
Table 14. Current characteristics
| Symbol | Ratings | Max. | Unit |
|---|---|---|---|
| I VDD | Total current into sum of all V DD power lines (source) (1) | 240 | mA |
| I VSS | Total current out of sum of all V SS ground lines (sink) (1) | - 240 | mA |
| IV DDUSB | Total current into V DDUSB power line (source) | 25 | mA |
| I VDD | Maximum current into each V DD power pin (source) (1) | 100 | mA |
| I VSS | Maximum current out of each V SS ground pin (sink) (1) | - 100 | mA |
| I IO | Output current sunk by any I/O and control pin | 25 | mA |
| I IO | Output current sourced by any I/Os and control pin | - 25 | mA |
| I IO | Total output current sunk by sum of all I/Os and control pins (2) | 120 | mA |
| I IO | Total output current sunk by sum of all USB I/Os | 25 | mA |
| I IO | Total output current sourced by sum of all I/Os and control pins (2) | -120 | mA |
| I INJ(PIN) | Injected current on FT, FTf, RST and B pins | -5/+0 (3) | mA |
| I INJ(PIN) | Injected current on TTa pins | ±5 (4) | mA |
| I INJ(PIN) | Total injected current (sum of all I/O and control pins) (5) | ±25 | mA |
-
A positive injection is induced by V IN >V DDA while a negative injection is induced by V IN <V SS . IINJ(PIN) must never be exceeded. Refer to Table 13 for the maximum allowed input voltage value.
-
When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).
Table 15. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 125 | °C |
171
STM32F446RCT6 Thermal Information
The maximum chip-junction temperature, T J max, in degrees Celsius, can be calculated using the following equation:
T J max = T A max + (P D max x JA )
STM32F446RCT6 Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com .
STM32F446RCT6 Ordering Information
| MPN | Package | Temperature Range | Packing |
|---|---|---|---|
| STM32F446RCT6 | — | — | — |
Note: The datasheet section provided does not include an ordering information table. The only part-number information present is the Reference/Part numbers table listing the family members STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, and STM32F446ZE, with no package-to-suffix mapping, temperature range, or packing codes. The specific ordering code STM32F446RCT6 does not appear in the provided text.
Package types referenced in the document (not tied to ordering codes): LQFP64 (10 × 10 mm), LQFP100 (14 × 14 mm), LQFP144 (20 × 20 mm), UFBGA144 (7 × 7 mm), UFBGA144 (10 × 10 mm), WLCSP81.
More part numbers on this datasheet
Their pages show this same datasheet. Some are linked through their part family rather than checked part by part, so confirm the exact part in the ordering information.
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