STM32F446VE

ARM Cortex-M4 MCU

The STM32F446VE is a arm cortex-m4 mcu from STMicroelectronics. View the full STM32F446VE datasheet below including electrical characteristics, absolute maximum ratings.

Manufacturer

STMicroelectronics

Overview

Part: STM32F446xC/E

Type: ARM Cortex-M4 32-bit MCU

Description: Arm® Cortex®-M4 32-bit MCU+FPU with 225 DMIPS, up to 512 KB Flash, 128+4 KB RAM, and a maximum frequency of 180 MHz.

Operating Conditions:

Supply voltage: 1.7 V to 3.6 V
Operating temperature: -40 to +125 °C
Max CPU frequency: 180 MHz

Absolute Maximum Ratings:

Max supply voltage (VDD): 4.0 V
Max total current into VDD: 150 mA
Max storage temperature: -65 to +150 °C

Key Specs:

Core: Arm® 32-bit Cortex®-M4 CPU with FPU
Max CPU frequency: 180 MHz
Flash memory: Up to 512 Kbytes
SRAM: 128 Kbytes + 4 KB backup SRAM
ADC: 3x 12-bit, 2.4 MSPS (up to 7.2 MSPS in triple interleaved mode)
DAC: 2x 12-bit converters
Communication interfaces: Up to 4x I2C, 4x SPI (45 Mbits/s), 4x USART, 2x UART (11.25 Mbit/s), 2x CAN
USB: USB 2.0 full-speed/high-speed device/host/OTG controller
Run mode current (typ): 30.5 mA (VDD=3.3V, fHCLK=180MHz, ART accelerator enabled)
Standby mode current (typ): 1.5 μA (VDD=3.3V)

Features:

Adaptive real-time accelerator (ART Accelerator)
Flexible external memory controller (SRAM,

Features

Core: Arm ® 32-bit Cortex ® -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
Memories
-512 Kbytes of Flash memory
-128 Kbytes of SRAM
-Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash memories
-Dual mode QuadSPI interface
LCD parallel interface, 8080/6800 modes
Clock, reset and supply management
-1.7 V to 3.6 V application supply and I/Os
-POR, PDR, PVD and BOR
-4 to 26 MHz crystal oscillator
-Internal 16 MHz factory-trimmed RC (1% accuracy)
-32 kHz oscillator for RTC with calibration
-Internal 32 kHz RC with calibration
Low power
-Sleep, Stop and Standby modes
-VBAT supply for RTC, 20×32 bit backup registers plus optional 4 KB backup SRAM
3× 12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
2× 12-bit D/A converters
General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
Up to 17 timers: 2x watchdog, 1x SysTick timer and up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to four IC/OC/PWM or pulse counter
Debug mode
-SWD and JTAG interfaces
-Cortex ® -M4 Trace Macrocell™

Reference	Part numbers
STM32F446xC/E	STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, STM32F446ZE.

DS10693 Rev 10

Pin Configuration

Figure 10. STM32F446xC/xE LQFP64 pinout

The above figure shows the package top view.

Figure 11. STM32F446xC/xE LQFP100 pinout

The above figure shows the package top view.

Figure 12. STM32F446xC LQFP144 pinout

Figure 12. STM32F446xC LQFP144 pinout

The above figure shows the package top view.

Figure 13. STM32F446xC/xE WLCSP81 ballout

Figure 14. STM32F446xC/xE UFBGA144 ballout

The above picture shows the package top view.

Table 9. Legend/abbreviations used in the pinout table

Name	Abbreviation	Definition
Pin name	Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name	Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name
Pin type	S	Supply pin
Pin type	I	Input only pin
Pin type	I/O	Input / output pin
I/O structure	FT	5 V tolerant I/O
I/O structure	FTf	5V tolerant IO, I2C FM+ option
I/O structure	TTa	3.3 V tolerant I/O directly connected toADC
I/O structure	B	Dedicated BOOT0 pin
I/O structure	RST	Bidirectional reset pin with weak pull-up resistor
Notes	Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset	Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset
Alternate functions	Functions selected through GPIOx_AFR registers	Functions selected through GPIOx_AFR registers
Additional functions	Functions directly selected/enabled through peripheral registers	Functions directly selected/enabled through peripheral registers

Table 10. STM32F446xx pin and ball descriptions

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
-	1	D7	A3	1
-	2	D6	A2	2
-	3	A9	B2	3
-	4	-	B3	4

Table 10. STM32F446xx pin and ball descriptions

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
-	5	-	B4	5
1	6	B9	C2	6
2	7	C8	A1	7
3	8	C9	B1	8
4	9	D9	C1	9
-	-	-	C3	10
-	-	-	C4	11
-	-	-	D4	12
-	-	-	E2	13
-	-	-	E3	14
-	-	-	E4	15
-	10	-	D2	16
-	11	-	D3	17
-	-	-	F3	18
-	-	-	F2	19
-	-	-	G3	20
-	-	-	G2	21
-	-	-	G1	22
5	12	E9	D1	23

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
6	13	F9	E1	24
7	14	D8	F1	25
8	15	G9	H1	26
9	16	-	H2	27
10	17	E8	H3	28
11	18	F8	H4	29
-	19	H9	-	30
-	-	G8	-	-
12	20	F7	J1	31
-	-	-	K1	-
-	21	-	L1	32
13	22	H8	M1	33
14	23	J9	J2	34
15	24	G7	K2	35
16	25	E7	L2	36

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
17	26	E6	M2	37
18	27	-	G4	38
-	-	J8	H5	-
19	28	-	F4	39
20	29	H7	J3	40
21	30	F6	K3	41
22	31	G6	L3	42
23	32	E5	M3	43
24	33	J7	J4	44
25	34	-	K4	45

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
26	35	F5	L4	46
27	36	H6	M4	47
28	37	J6	J5	48
-	-	-	M5	49
-	-	-	L5	50
-	-	-	-	51
-	-	-	G5	52
-	-	-	K5	53
-	-	-	M6	54
-	-	-	L6	55
-	-	-	K6	56
-	-	-	J6	57
-	38	J5	M7	58
-	39	H5	L7	59
-	40	G5	K7	60

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
-	-	-	H6	61
-	-	-	G6	62
-	41	J4	J7	63
-	42	-	H8	64
-	43	-	J8	65
-	44	-	K8	66
-	45	-	L8	67
-	46	-	M8	68
29	47	H4	M9	69
-	-	-	M10	70
30	48	J3	H7	71
31	49	H3	-	-
32	50	J2	G7	72
33	51	G4	M11	73

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
34	52	H2	M12	74
35	53	J1	L11	75
36	54	G3	L12	76
-	55	-	L9	77
-	56	-	K9	78
-	57	-	J9	79
-	58	H1	H9	80
-	59	G2	L10	81
-	60	G1	K10	82
-	-	-	G8	83
-	-	-	F8	84

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
-	61	-	K11	85
-	62	-	K12	86
-	-	-	J12	87
-	-	-	J11	88
-	-	-	J10	89
-	-	-	H12	90
-	-	-	H11	91
-	-	-	H10	92
-	-	-	G11	93
-	-	-	-	94
-	-	-	F10	-
-	-	E1	C11	95
37	63	F1	G12	96
38	64	F2	F12	97
39	65	F3	F11	98

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
40	66	D1	E11	99
41	67	E2	E12	100
42	68	F4	D12	101
43	69	E3	D11	102
44	70	C1	C12	103
45	71	E4	B12	104
46	72	D2	A12	105
-	73	C2	G9	106
47	74	B1	G10	107
48	75	A1	F9	108
49	76	C3	A11	109
50	77	B2	A10	110

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
51	78	D3	B11	111
52	79	D4	B10	112
53	80	A2	C10	113
-	81	B3	E10	114
-	82	C4	D10	115
54	83	D5	E9	116
-	84	-	D9	117
-	85	A3	C9	118
-	86	-	B9	119
-	-	-	E7	120
-	-	-	F7	121

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
-	87	B4	A8	122
-	88	A4	A9	123
-	-	-	E8	124
-	-	-	D8	125
-	-	-	C8	126
-	-	-	B8	127
-	-	-	D7	128
-	-	-	C7	129
-	-	-	-	130
-	-	-	F6	131
-	-	-	B7	132
55	89	A5	A7	133

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
56	90	B5	A6	134
57	91	A6	B6	135
58	92	C5	C6	136
59	93	B6	D6	137
60	94	A7	D5	138
61	95	C6	C5	139
62	96	C7	B5	140
-	97	-	A5	141
-	98	-	A4	142

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin number	Pin number	Pin number	Pin number	Pin number
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
63	99	B7	E6	-
-	-	B8	E5	143
64	100	A8	F5	144

Table 10. STM32F446xx pin and ball descriptions (continued)

Electrical Characteristics

The definition and values of input/output AC characteristics are given in Figure 32 and Table 58 , respectively.

Unless otherwise specified, the parameters given in Table 58 are derived from tests performed under the ambient temperature and V DD supply voltage conditions summarized in Table 16 .

Table 58. I/O AC characteristics (1)(2)

Symbol	Parameter	Conditions	Min	Typ	Max	Unit
f max(IO)out	Maximum frequency (3)	C L = 50 pF, V DD ≥ 2.7 V	-	-	4	MHz
f max(IO)out	Maximum frequency (3)	C L = 50 pF, V DD ≥ 1.7 V	-	-	2	MHz
f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 2.7 V	-	-	8	MHz
f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.8 V	-	-	4	MHz
f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.7 V	-	-	3	MHz
t f(IO)out / t r(IO)out	Output high to low level fall time and output low to high level rise time	C L = 50 pF, V DD = 1.7 V to 3.6 V	-	-	100	ns

Table 58. I/O AC characteristics (1)(2)

171

Table 58. I/O AC characteristics (1)(2) (continued)

OSPEEDR y[1:0] bit value (1)	Symbol	Parameter	Conditions	Min	Typ	Max	Unit
01	f max(IO)out	Maximum frequency (3)	C L = 50 pF, V DD ≥ 2.7 V	-	-	25	MHz
01	f max(IO)out	Maximum frequency (3)	C L = 50 pF, V DD ≥ 1.8 V	-	-	12.5	MHz
01	f max(IO)out	Maximum frequency (3)	C L = 50 pF, V DD ≥ 1.7 V	-	-	10	MHz
01	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 2.7 V	-	-	50	MHz
01	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.8 V	-	-	20	MHz
01	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.7 V	-	-	12.5	MHz
01	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 50 pF, V DD ≥ 2.7 V	-	-	10	ns
01	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 2.7 V	-	-	6	ns
01	t f(IO)out / t r(IO)out	time and output low to high level rise time	C L = 50 pF, V DD ≥ 1.7 V	-	-	20	ns
01	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 1.7 V	-	-	10	ns
10	f max(IO)out	Maximum frequency (3)	C L = 40 pF, V DD ≥ 2.7 V	-	-	50 (4)	MHz
10	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 2.7 V	-	-	100 (4)	MHz
10	f max(IO)out	Maximum frequency (3)	C L = 40 pF, V DD ≥ 1.7 V	-	-	25	MHz
10	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.8 V	-	-	50	MHz
10	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.7 V	-	-	42.5	MHz
10	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 40 pF, V DD ≥ 2.7 V	-	-	6	ns
10	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 2.7 V	-	-	4	ns
10	t f(IO)out / t r(IO)out	time and output low to high level rise time	C L = 40 pF, V DD ≥ 1.7 V	-	-	10	ns
10	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 1.7 V	-	-	6	ns
11	f max(IO)out	Maximum frequency (3)	C L = 30 pF, V DD ≥ 2.7 V	-	-	100 (4)	MHz
11	f max(IO)out	Maximum frequency (3)	C L = 30 pF, V DD ≥ 1.8 V	-	-	50	MHz
11	f max(IO)out	Maximum frequency (3)	C L = 30 pF, V DD ≥ 1.7 V	-	-	42.5	MHz
11	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 2.7 V	-	-	180 (4)	MHz
11	f max(IO)out	Maximum frequency (3)	C L = 10 pF, V DD ≥ 1.8 V	-	-	100	MHz
11	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 1.7 V	-	-	72.5
11	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 30 pF, V DD ≥ 2.7 V	-	-	4 6	ns
11	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 30 pF, V DD ≥ 1.8 V	- -	- -	7	ns
11	t f(IO)out / t r(IO)out	time and output low to high level rise time	C L = 30 pF, V DD ≥ 1.7 V C L = 10 pF, V DD ≥ 2.7 V	-	-	2.5	ns
11	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 1.8 V	-	-	3.5	ns
11	t f(IO)out / t r(IO)out	Output high to low level fall	C L = 10 pF, V DD ≥ 1.7 V	-	-	4	ns
-	t EXTIpw	Pulse width of external signals detected by the EXTI controller	-	10	-	-	ns

Table 58. I/O AC characteristics (1)(2) (continued)

Guaranteed by design.
The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F4xx reference manual for a description of the GPIOx_SPEEDR GPIO port output speed register.
The maximum frequency is defined in Figure 32 .
For maximum frequencies above 50 MHz and V DD > 2.4 V, the compensation cell should be used.

Figure 32. I/O AC characteristics definition

Absolute Maximum Ratings

Stresses above the absolute maximum ratings listed in Table 13 , Table 14 , and Table 15 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Table 13. Voltage characteristics

Symbol	Ratings	Min	Max	Unit
V DD -V SS	External main supply voltage (including V DDA , V DD, V DDUSB andV BAT ) (1)	-0.3	4.0
V IN	Input voltage on FT & FTf pins (2)	V SS -0.3	V DD +4.0
	Input voltage on TTa pins	V SS -0.3	4.0	V
	Input voltage on any other pin	V SS -0.3	4.0
	Input voltage on BOOT0 pin	V SS	9.0
\	V DDx \		Variations between different V DD power pins	-
\	V SSX V SS \		Variations between all the different ground pins	-
V ESD(HBM)	Electrostatic discharge voltage (human body model)	see Section 6.3.15	see Section 6.3.15	-

VIN maximum value must always be respected. Refer to Table 14 for the values of the maximum allowed injected current.

Table 14. Current characteristics

Table 14. Current characteristics

Symbol	Ratings	Max.	Unit
I VDD	Total current into sum of all V DD power lines (source) (1)	240	mA
I VSS	Total current out of sum of all V SS ground lines (sink) (1)	- 240	mA
IV DDUSB	Total current into V DDUSB power line (source)	25	mA
I VDD	Maximum current into each V DD power pin (source) (1)	100	mA
I VSS	Maximum current out of each V SS ground pin (sink) (1)	- 100	mA
I IO	Output current sunk by any I/O and control pin	25	mA
I IO	Output current sourced by any I/Os and control pin	- 25	mA
I IO	Total output current sunk by sum of all I/Os and control pins (2)	120	mA
I IO	Total output current sunk by sum of all USB I/Os	25	mA
I IO	Total output current sourced by sum of all I/Os and control pins (2)	-120	mA
I INJ(PIN)	Injected current on FT, FTf, RST and B pins	-5/+0 (3)	mA
I INJ(PIN)	Injected current on TTa pins	±5 (4)	mA
I INJ(PIN)	Total injected current (sum of all I/O and control pins) (5)	±25	mA

A positive injection is induced by V IN >V DDA while a negative injection is induced by V IN <V SS . IINJ(PIN) must never be exceeded. Refer to Table 13 for the maximum allowed input voltage value.
When several inputs are submitted to a current injection, the maximum Σ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 15. Thermal characteristics

Symbol	Ratings	Value	Unit
T STG	Storage temperature range	-65 to +150	°C
T J	Maximum junction temperature	125	°C

171

Thermal Information

The maximum chip-junction temperature, T J max, in degrees Celsius, can be calculated using the following equation:

T J max = T A max + (P D max x JA )

Package Information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com .

Related Variants

The following components are covered by the same datasheet.

Part Number	Manufacturer	Package
STM32F446	STMicroelectronics	—
STM32F446MC	STMicroelectronics	—
STM32F446ME	STMicroelectronics	—
STM32F446RC	STMicroelectronics	—
STM32F446RCT6	STMicroelectronics	64-LQFP
STM32F446RE	STMicroelectronics	—
STM32F446VC	STMicroelectronics	—
STM32F446XC	STMicroelectronics	—
STM32F446XC/E	STMicroelectronics	—
STM32F446XC/XE	STMicroelectronics	—
STM32F446XC/XV	STMicroelectronics	—
STM32F446XX	STMicroelectronics	—
STM32F446ZC	STMicroelectronics	—
STM32F446ZE	STMicroelectronics	—
STM32F446ZET6	STMicroelectronics	144-LQFP

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