CH32V307R

Part: CH32V307RCT6 — WCH (Nanjing Qinheng Microelectronics)

Type: 32-bit RISC-V Microcontroller (QingKe V4F core)

Description: Interconnectivity-class CH32V307 MCU with QingKe V4F RISC-V core (hardware floating point), 256 KB Flash, 64 KB SRAM, USB OTG_FS/USBHS, 1000M Ethernet MAC with 10M PHY, 2×CAN, SDIO, FSMC and DVP.

Operating Conditions:

• Supply voltage (VDD): 2.4–3.6 V (chips with FEATURE_SIGN VLEVEL bit 1); 1.8 V minimum for chips with VLEVEL bit 0
• VDDA/VSSA must be connected to VDD/VSS; VBAT backup supply for RTC and backup registers

Key Specs:

• Core: QingKe V4F, IMAFC instruction set, hardware floating-point
• Memory: 256 KB Flash, 64 KB SRAM
• Interrupts: 8-level nesting, 3-level hardware stack, 4 fast interrupt channels
• Integer division: 5 cycles
• Memory protection: standard
• Peripherals: 2×ADC (TKey), 2×DAC, 4×ADTM, 4×GPTM, 2×BCTM, 8×U(S)ART, 3×SPI (2×I2S), 2×I2C, 2×CAN, 4×OPA, RNG, SDIO, FSMC, DVP
• Connectivity: OTG_FS, USBHS (with PHY), ETH 1000M MAC with 10M PHY
• Boot modes: program Flash, system memory (bootloader), internal SRAM, selected via BOOT0/BOOT1

Features:

• Hardware interrupt stack and fast interrupt response
• Hardware floating-point operations
• Clock tree hierarchical management for lower peripheral power
• Clock security system and data protection mechanisms
• General DMA controller to reduce CPU load
• Backup domain (RTC and backup registers) powered from VBAT
• Internal voltage regulator for core supply

Applications:

• Control systems
• Connectivity and communication
• General embedded applications

Package:

• Package suffix "RCT6" (not detailed in the provided text)

• Several types of reset
• Several clock sources, bus clock management
• Built-in external crystal oscillation monitor and clock security system
• Independent management of each peripheral clock: reset, enable, disable
• Internal clock output