ATTINY3216/3217

Part: ATtiny3216/3217 Automotive

Type: 8-bit AVR Microcontroller

Description: 8-bit AVR MCU operating at up to 16 MHz with 32 KB Flash, 2 KB SRAM, 256 bytes EEPROM, and Core Independent Peripherals in 20- or 24-pin packages.

Operating Conditions:

• Supply voltage: 2.7 to 5.5 V
• Operating temperature: -40 to 105 °C
• Max clock frequency: 16 MHz (at 4.5V - 5.5V), 8 MHz (at 2.7V - 5.5V)

Features:

• 8-bit AVR CPU with two-cycle hardware multiplier and running up to 16 MHz
• 32 KB in-system self-programmable Flash, 2 KB SRAM, and 256 bytes EEPROM
• Core Independent Peripherals and Event System (EVSYS) for inter-peripheral signaling
• Two 10-bit 115 ksps Analog-to-Digital Converters (ADCs)
• Three 8-bit Digital-to-Analog Converters (DACs) with one external channel
• Peripheral Touch Controller (PTC) supporting Driven Shield+ and Boost Mode
• One 16-bit Timer/Counter Type A, two 16-bit Type B, and one 12-bit Type D
• One USART, one SPI, and one TWI (I2C-compatible up to 1 MHz Fast Mode Plus)

Applications:

• Automotive applications
• Capacitive touch user interfaces
• Sensor nodes and embedded control

Package:

• 20-pin SOIC300
• 24-pin VQFN (4x4 mm with wettable flanks)

• CPU
• -AVR ® CPU
• -Running at up to 16 MHz
• -Single-cycle I/O access
• -Two-level interrupt controller
• -Two-cycle hardware multiplier
• Memories
• -32 KB In-system self-programmable Flash memory
• -256 bytes EEPROM
• -2 KB SRAM
• -Write/erase endurance:
• Flash 10,000 cycles
• EEPROM 100,000 cycles
• -Data retention:
• 40 years at 55°C
• System
• -Power-on Reset (POR)
• -Brown-out Detector (BOD)
• -Clock options:
• 16 MHz low-power internal RC oscillator
• 32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
• 32.768 kHz external crystal oscillator
• External clock input
• -Single-Pin Unified Program and Debug Interface (UPDI)
• -Three sleep modes:
• Idle with all peripherals running for immediate wake-up
• Standby
• -Configurable operation of selected peripherals
• Power-Down with full data retention
• Peripherals

This bit field selects the Reset/UPDI pin configuration.

Note: When configuring the RESET pin as GPIO, there is a potential conflict between the GPIO actively driving the output, and a high-voltage UPDI enable sequence initiation. To avoid this, the GPIO output driver is disabled for 768 OSC32K cycles after a System Reset. Enable any interrupts for this pin only after this period.