ATTINY3216
tinyAVR® 1-series
Overview
Part: ATtiny3216/3217 Automotive (tinyAVR® 1-series)
Type: Microcontroller
Key Specs:
- CPU Speed: up to 16 MHz
- Flash Memory: 32 KB
- SRAM: 2 KB
- EEPROM: 256 bytes
- I/O Lines: Up to 22 programmable
- Operating Temperature: -40°C to 105°C, -40°C to 125°C
Features:
- AVR® CPU with hardware multiplier
- Single-cycle I/O access
- Two-level interrupt controller
- 10,000 Flash write/erase cycles
- 100,000 EEPROM write/erase cycles
- 40 years data retention at 55°C
- Power-on Reset (POR)
- Brown-out Detector (BOD)
- Multiple clock options including 16 MHz internal RC oscillator and 32.768 kHz ULP internal RC oscillator
- Single-Pin Unified Program and Debug Interface (UPDI)
- Three sleep modes: Idle, Standby, Power-Down
- One 16-bit Timer/Counter type A (TCA) with dedicated period register and three compare channels
- Two 16-bit Timer/Counter type B (TCB) with input capture
Features
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CPU
- AVR® CPU
- Running at up to 16 MHz
- Single-cycle I/O access
- Two-level interrupt controller
- Two-cycle hardware multiplier
-
Memories
- 32 KB In-system self-programmable Flash memory
- 256 bytes EEPROM
- 2 KB SRAM
- Write/erase endurance:
- Flash 10,000 cycles
- EEPROM 100,000 cycles
- Data retention:
- 40 years at 55°C
-
System
- Power-on Reset (POR)
- Brown-out Detector (BOD)
- Clock options:
- 16 MHz low-power internal RC oscillator
- 32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
- 32.768 kHz external crystal oscillator
- External clock input
- Single-Pin Unified Program and Debug Interface (UPDI)
- Three sleep modes:
- Idle with all peripherals running for immediate wake-up
- Standby
- Configurable operation of selected peripherals
- Power-Down with full data retention
-
Peripherals
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One 16-bit Timer/Counter type A (TCA) with a dedicated period register and three compare channels
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Two 16-bit Timer/Counter type B (TCB) with input capture
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One 12-bit Timer/Counter type D (TCD) optimized for control applications
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One 16-bit Real-Time Counter (RTC) running from an external crystal, external clock, or internal RC oscillator
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Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator
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One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
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One master/slave Serial Peripheral Interface (SPI)
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One Two-Wire Interface (TWI) with dual address match
- Philips I2C compatible
- Standard mode (Sm, 100 kHz)
- Fast mode (Fm, 400 kHz)
- Fast mode plus (Fm+, 1 MHz)
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Three Analog Comparators (AC) with a low propagation delay
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Two 10-bit 115 ksps Analog-to-Digital Converters (ADCs)
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Three 8-bit Digital-to-Analog Converters (DACs) with one external channel
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Multiple voltage references (VREF):
- 0.55V
- 1.1V
- 1.5V
- 2.5V
- 4.3V
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Event System (EVSYS) for CPU independent and predictable inter-peripheral signaling
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Configurable Custom Logic (CCL) with two programmable look-up tables
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Automated CRC memory scan
-
Peripheral Touch Controller (PTC)
- Capacitive touch buttons, sliders, wheels and 2D surfaces
- Wake-up on touch
- Driven shield for improved moisture and noise handling performance
- Up to 14 self-capacitance channels
- Up to 49 mutual capacitance channels
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External interrupt on all general purpose pins
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I/O and Packages:
- Up to 22 programmable I/O lines
- 20-pin SOIC300
- 24-pin VQFN 4x4 mm with wettable flanks
-
Temperature Ranges:
- -40°C to 105°C
- -40°C to 125°C
-
Speed Grades:
- 0-8 MHz @ 2.7V 5.5V
- 0-16 MHz @ 4.5V 5.5V
-
Introduction1
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Features 1
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- Silicon Errata and Data Sheet Clarification Document10
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- tinyAVR® 1-series Overview11
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2.1. Configuration Summary11
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- Block Diagram13
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- Pinout14
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4.1. 20-Pin SOIC 14
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4.2. 24-Pin VQFN15
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- I/O Multiplexing and Considerations 16
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5.1. Multiplexed Signals 16
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- Automotive Quality Grade 17
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- Memories 18
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7.1. Overview 18
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7.2. Memory Map 19
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7.3. In-System Reprogrammable Flash Program Memory19
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7.4. SRAM Data Memory 20
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7.5. EEPROM Data Memory 20
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7.6. User Row20
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7.7.
7.8. Signature Bytes20
I/O Memory21 -
7.9. Memory Section Access from CPU and UPDI on Locked Device23
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7.10. Configuration and User Fuses (FUSE)24
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- Peripherals and Architecture40
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8.1. Peripheral Address Map40
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8.2. Interrupt Vector Mapping41
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8.3. System Configuration (SYSCFG)42
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- AVR® CPU 45
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9.1. Features 45
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9.2. Overview 45
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9.3. Architecture 45
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9.4. Arithmetic Logic Unit (ALU)47
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9.5. Functional Description47
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9.6. Register Summary52
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9.7. Register Description52
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- NVMCTRL - Nonvolatile Memory Controller 56
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10.1. Features 56
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10.2. Overview 56
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10.3. Functional Description57
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10.4. Register Summary62
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10.5. Register Description62
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- CLKCTRL - Clock Controller 70
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11.1. Features 70
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11.2. Overview 70
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11.3. Functional Description72
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11.4. Register Summary76
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11.5. Register Description76
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- SLPCTRL - Sleep Controller 86
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12.1. Features 86
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12.2. Overview 86
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12.3. Functional Description86
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12.4. Register Summary89
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12.5. Register Description89
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- RSTCTRL - Reset Controller 91
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13.1. Features 91
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13.2. Overview 91
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13.3. Functional Description92
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13.4.
13.5. Register Summary96
Register Description96 -
- CPUINT - CPU Interrupt Controller 99
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14.1. Features 99
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14.2. Overview 99
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14.3. Functional Description100
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14.4. Register Summary 105
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14.5. Register Description105
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- EVSYS - Event System 110
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15.1. Features 110
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15.2. Overview110
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15.3. Functional Description112
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15.4. Register Summary114
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15.5. Register Description 114
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- PORTMUX - Port Multiplexer 121
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16.1. Overview 121
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16.2. Register Summary122
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16.3. Register Description122
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- PORT - I/O Pin Configuration127
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17.1. Features 127
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17.2. Overview 127
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17.3. Functional Description129
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17.6.
Register Summary - VPORTx 144 -
17.7.
Register Description - VPORTx144 -
- BOD - Brown-out Detector 149
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18.1.
Features 149 -
18.2.
Overview 149 -
18.3.
Functional Description150 -
18.4.
Register Summary152 -
18.5.
Register Description152 -
- VREF - Voltage Reference159
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19.1.
Features 159 -
19.2.
Overview 159 -
19.3.
Functional Description159 -
19.4.
Register Summary 160 -
19.5.
Register Description160 -
- WDT - Watchdog Timer165
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20.1.
Features 165 -
20.2.
Overview 165 -
20.3.
Functional Description166 -
20.4.
Register Summary - WDT 169 -
20.5.
Register Description169 -
- TCA - 16-bit Timer/Counter Type A172
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21.1.
Features 172 -
21.2.
Overview 172 -
21.3.
Functional Description174 -
21.4.
Register Summary - Normal Mode184 -
21.5.
Register Description - Normal Mode 184 -
21.6.
Register Summary - Split Mode 203 -
21.7.
Register Description - Split Mode203 -
- TCB - 16-bit Timer/Counter Type B219
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22.1.
Features 219 -
22.2.
Overview 219 -
22.3.
Functional Description221 -
22.4.
Register Summary229
22.5.
Register Description229 -
- TCD - 12-Bit Timer/Counter Type D240
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23.1.
Features 240 -
23.2.
Overview 240 -
23.3.
Functional Description242 -
23.4.
Register Summary265
23.5.
Register Description265 -
24.1.
Features 290
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24.2.
Overview 290 -
24.3.
Clocks291 -
24.4.
RTC Functional Description 291 -
24.5.
PIT Functional Description 292 -
24.6.
Events 293 -
24.7.
Interrupts 294 -
24.8.
Sleep Mode Operation 295 -
24.9.
Synchronization295 -
24.10. Debug Operation295
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24.11. Register Summary296
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24.12. Register Description296
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- USART - Universal Synchronous and Asynchronous Receiver and Transmitter312
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25.1.
Features 312 -
25.2.
Overview 312 -
25.3.
Functional Description313 -
25.4.
Register Summary328 -
25.5.
Register Description328 -
- SPI - Serial Peripheral Interface345
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26.1.
Features 345 -
26.2.
Overview 345 -
26.3.
Functional Description346 -
26.4.
Register Summary353 -
26.5.
Register Description353 -
- TWI - Two-Wire Interface 360
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27.1.
Features 360 -
27.2.
Overview 360 -
27.3.
Functional Description361 -
27.4.
Register Summary372 -
27.5.
Register Description372 -
- CRCSCAN - Cyclic Redundancy Check Memory Scan 389
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28.1.
Features 389 -
28.2.
Overview 389 -
28.3.
Functional Description390 -
28.4.
Register Summary - CRCSCAN393 -
28.5.
Register Description393 -
- CCL - Configurable Custom Logic 397
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29.1.
Features 397 -
29.2.
Overview 397 -
29.3.
Functional Description399 -
29.4.
Register Summary407 -
29.5.
Register Description407 -
- AC - Analog Comparator415
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30.1. Features 415
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30.2. Overview 415
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30.3. Functional Description417
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30.4. Register Summary419
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30.5. Register Description419
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- ADC - Analog-to-Digital Converter 424
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31.1. Features 424
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31.2. Overview 424
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31.3. Functional Description427
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31.4. Register Summary - ADCn434
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31.5. Register Description434
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- DAC - Digital-to-Analog Converter 452
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32.1. Features 452
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32.2. Overview 452
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32.3. Functional Description453
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32.4. Register Summary455
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32.5. Register Description455
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- PTC - Peripheral Touch Controller 458
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33.1. Overview 458
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33.2. Features 458
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33.3. Block Diagram459
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33.4. Signal Description 459
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33.5. System Dependencies 460
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33.6. Functional Description461
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- UPDI - Unified Program and Debug Interface462
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34.1. Features 462
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34.2. Overview 462
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34.3. Functional Description464
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34.4. Register Summary485
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34.5. Register Description485
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- Instruction Set Summary496
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- Conventions 497
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36.1. Numerical Notation497
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36.2. Memory Size and Type497
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36.3. Frequency and Time497
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36.4. Registers and Bits 498
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36.5. ADC Parameter Definitions 499
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- Electrical Characteristics502
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37.1. Disclaimer502
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37.2. Absolute Maximum Ratings 502
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37.3. General Operating Ratings 503
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37.4.
37.5. Power Consumption503
Wake-Up Time504 -
37.6. Peripherals Power Consumption505
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37.7. BOD and POR Characteristics506
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37.8. External Reset Characteristics507
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37.9. Oscillators and Clocks507
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37.10. I/O Pin Characteristics 508
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37.11. TCD509
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37.12. USART510
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37.13. SPI511
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37.14. TWI512
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37.15. VREF515
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37.16. ADC516
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37.17. DAC518
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37.18. AC 519
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37.19. PTC520
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37.20. UPDI Timing520
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37.21. Programming Time521
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- Typical Characteristics 523
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38.1. Power Consumption523
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38.2. GPIO 530
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38.3. VREF Characteristics536
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38.4. BOD Characteristics538
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38.5. ADC Characteristics540
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38.6. AC Characteristics550
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38.7. OSC20M Characteristics554
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38.8. OSCULP32K Characteristics 556
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38.9. TWI SDA Hold Timing 557
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- Ordering Information 558
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39.1. Product Information558
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39.2. Product Identification System558
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- Package Drawings 559
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40.1. Online Package Drawings559
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40.2. 20-Pin SOIC 560
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40.3. 24-Pin VQFN Wettable Flanks 563
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40.4. Thermal Considerations 566
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- Errata 567
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41.1. Errata - ATtiny3216/3217 Automotive 567
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- Data Sheet Revision History 568
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42.1. Rev. A - 05/2020568
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The Microchip Website569
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Product Change Notification Service569
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Customer Support 569
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Microchip Devices Code Protection Feature570
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Legal Notice 570
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Trademarks 570
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Quality Management System 571
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Worldwide Sales and Service572
Pin Configuration
This bit field selects the Reset/UPDI pin configuration. Value Description 0x0 GPIO 0x1 UPDI 0x2 RESET Other Reserved
Note: When configuring the RESET pin as GPIO, there is a potential conflict between the GPIO actively driving the output, and a high-voltage UPDI enable sequence initiation. To avoid this, the GPIO output driver is disabled for 768 OSC32K cycles after a System Reset. Enable any interrupts for this pin only after this period.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| ATTINY3216/3217 | — | — |
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