SI8261BCD-AS

Part: Si826x family (e.g., SI8261BCC-C-IS) — Silicon Laboratories

Type: Isolated Gate Driver (LED emulator input)

Description: 5 kV RMS isolated gate driver with LED-emulator input, up to 4.0 A peak output drive, 6.5–30 V VDD, and 60 ns max propagation delay.

Operating Conditions:

• Supply voltage (VDD): 6.5–30 V
• Operating temperature (ambient): -40 to +125 °C
• Input current IF(ON): 6–30 mA

Absolute Maximum Ratings:

• The Absolute Maximum Ratings table is not included in the provided text; only IEC safety limiting values are given (case temperature TS 140 °C, output power PS 1 W)

Key Specs:

• Supply current, output high (IF = 10 mA): 1.8 mA typ / 2.4 mA max at VDD = 15 V; 2.0 mA typ / 2.7 mA max at VDD = 30 V
• Input current threshold IF(TH): 3.6 mA max; hysteresis 0.34 mA typ
• Input forward voltage (ON): 1.6–2.8 V
• Si826xBxx peak source current: 1.8 A typ (0.5 A min); peak sink current: 4.0 A typ (1.2 A min)
• Si826xBxx output resistance: ROH 2.6 Ω typ (5.1 Ω max) at IOH = -1 A; ROL 0.8 Ω typ (2.0 Ω max) at IOL = 2 A
• Propagation delay (CL = 200 pF): tPLH 20–60 ns; tPHL 10–50 ns; pulse width distortion 28 ns max
• Rise/fall time (CL = 200 pF): 5.5 ns / 8.5 ns typ
• CMTI: 35 kV/μs min, 50 kV/μs typ (VCM = 1500 V)
• UVLO thresholds (rising): 5.6 V typ (A option), 8.4 V typ (B option), 12 V typ (C option)

Features:

• Pin-compatible, drop-in upgrade for popular opto-coupled gate drivers
• Low-power diode emulator input
• 0.6 A and 4.0 A peak output drive options, rail-to-rail output
• Up to 5000 V RMS isolation; 10 kV surge capability
• Multiple UVLO options (5, 8, 12 V) with hysteresis
• AEC-Q100 qualified; automotive-grade OPNs available
• UL 1577, CSA 5A, VDE 0884-10, CQC approvals

Applications:

• IGBT/MOSFET gate drives
• Industrial, HEV and renewable energy inverters
• AC, brushless and DC motor controls and drives
• Variable speed motor control in consumer white goods
• Isolated switch mode and UPS power supplies

Package:

• SOIC-8 (narrow body)
• DIP8 (gull-wing)
• SDIP6 (stretched SO-6)

• Pin-compatible, drop-in upgrades for popular high speed opto-coupled gate drivers
• Low power diode emulator simplifies design-in process
• 0.6 and 4.0 Amp peak output drive current
• Rail-to-rail output voltage
• Performance and reliability advantages vs. opto-drivers
• Resistant to temperature and age
• 10x lower FIT rate for longer service life
• 14x tighter part-to-part matching
• Higher common-mode transient immunity: >50 kV/μs typical
• Robust protection features
• Multiple UVLO ordering options (5, 8, and 12 V) with hysteresis

• IGBT/ MOSFET gate drives
• Industrial, HEV and renewable energy inverters
• AC, Brushless, and DC motor controls and drives

Figure 17. Pin Configuration

Table 11. Pin Descriptions (SOIC-8, DIP8)

*Note: No Connect. These pins are not internally connected. To maximize CMTI performance, these pins should be connected to the ground plane.

Table 11. Pin Descriptions (SOIC-8, DIP8)

Table 1. Recommended Operating Conditions

Figure 19 illustrates the package details for the Si826x in an 8- pin narrow-body SOIC pack age. Table 15 lists the values for the dimensions shown in the illustration.

Figure 19. 8-Pin Narrow Body SOIC Package Table 15. 8-Pin Narrow Body SOIC Package Diagram Dimensions

Figure 19. 8-Pin Narrow Body SOIC Package Table 15. 8-Pin Narrow Body SOIC Package Diagram Dimensions