PIC18F47Q43

Part: PIC18F47Q43-I/PT — Microchip Technology

Type: 8-bit PIC18 Microcontroller with XLP Technology

Description: 8-bit PIC18 MCU with 64 MHz clock input, 128 KB Flash, 8 KB SRAM, 1024 B data EEPROM, 36 I/O pins and a 12-bit ADC with computation (up to 140 ksps), operating from 1.8–5.5 V.

Operating Conditions:

• Supply voltage: 1.8–5.5 V
• Operating temperature: -40 to 85 °C (Industrial grade; the Extended grade is -40 to 125 °C)
• Clock: DC to 64 MHz, 62.5 ns minimum instruction cycle

Absolute Maximum Ratings:

• Max supply voltage (VDD pin): 6.5 V (-0.3 to +6.5 V)
• MCLR pin voltage: -0.3 to +9.0 V
• Voltage on all other pins: -0.3 V to (VDD + 0.3 V)
• Max current on VSS pin: 350 mA (-40 °C ≤ TA ≤ +85 °C)
• Max current on VDD pin (40-pin devices): 350 mA (-40 °C ≤ TA ≤ +85 °C); 120 mA (85 °C < TA ≤ +125 °C)
• Max current on any standard I/O pin: ±50 mA
• Clamp current: ±20 mA
• Total power dissipation: 800 mW
• Ambient temperature under bias: -40 to +125 °C
• Storage temperature: -65 to +150 °C

Key Specs:

• Program Flash: 128 KB; Data SRAM: 8 KB; Data EEPROM: 1024 bytes
• Sleep current: < 800 nA typical at 1.8 V
• Operating current: 48 μA typical at 32 kHz, 3 V
• ADCC: 12-bit, up to 140 ksps, up to 35 external channels on this device
• HFINTOSC: up to 64 MHz, ±1% at calibration
• 36 I/O pins with Peripheral Pin Select
• Six DMA controllers; 127-level hardware stack
• Fixed Voltage Reference outputs: 1.024 V, 2.048 V, 4.096 V

Features:

• Vectored interrupt controller with fixed 3-cycle latency and selectable priority
• Memory Access Partition (Application, Boot and Storage Area Flash blocks) and Device Information Area
• Three 16-bit PWM modules with dual outputs, three CCP modules, three CWG modules and three NCOs
• Four 16-bit timers and three 8-bit timers with HLT
• Eight Configurable Logic Cells, Signal Measurement Timer and Data Signal Modulator
• Five UARTs (UART1 supports LIN, DMX and DALI), two SPI modules, one I2C/SMBus/PMBus module
• 8-bit DAC, two comparators, zero-cross detect and hardware CVD support for capacitive touch
• Windowed Watchdog Timer, BOR/LPBOR, CRC with memory scan
• Peripheral Module Disable and Doze/Idle/Sleep power-saving modes
• ICSP and in-circuit debug via two pins

Applications:

• Real-time control
• Capacitive touch and proximity sensing

Package:

• PT suffix: TQFP (40-pin device with 36 I/O pins; package details are not given in the provided text)

• C Compiler Optimized RISC Architecture
• Operating Speed:
• -DC - 64 MHz clock input
• -62.5 ns minimum instruction cycle
• Six Direct Memory Access (DMA) Controllers:
• -Data transfers to SFR/GPR spaces from either Program Flash Memory, Data EEPROM or SFR/GPR spaces
• -User programmable source and destination sizes
• -Hardware and software triggered data transfers
• Vectored Interrupt Capability:
• -Selectable high/low priority
• -Fixed interrupt latency of three instruction cycles
• -Programmable vector table base address
• -Backwards compatible with previous interrupt capabilities
• 127-Level Deep Hardware Stack
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
• -Watchdog Reset on too long or too short interval between watchdog clear events
• -Variable prescaler selection
• -Variable window size selection

In many applications, it is desirable to detect a drop below, or rise above, a particular voltage threshold. For example, the HLVD module could be periodically enabled to detect Universal Serial Bus (USB) attach or detach. This assumes the device is powered by a lower voltage source than the USB when detached. An attach would indicate a HighVoltage Detect from, for example, 3.3V to 5V (the voltage on USB) and vice versa for a detach. This feature could save a design a few extra components and an attach signal (input pin).

For general battery applications, the figure below shows a possible voltage curve. Over time, the device voltage decreases. When the device voltage reaches voltage, VA, the HLVD logic generates an interrupt at time, TA. The interrupt could cause the execution of an Interrupt Service Routine (ISR), which would allow the application to perform 'housekeeping tasks' and a controlled shutdown before the device voltage exits the valid operating range at TB. This would give the application a time window, represented by the difference between TA and TB, to safely exit.

Figure 37-4. Typical Low-Voltage Detect Application

Legend:

VA = HLVD trip point VB = Minimum valid device operating voltage

In order for each PORT pin, a rising edge detector and a falling edge detector are present. To enable a pin to detect a rising edge, the associated bit of the IOCxP register must be set. To enable a pin to detect a falling edge, the associated bit of the IOCxN register must be set. A PORT pin can be configured to detect rising and falling edges simultaneously by setting both associated bits of the IOCxP and IOCxN registers, respectively.

1. Maximum current rating requires even load distribution across I/O pins. Maximum current rating may be limited by the device package power dissipation characterizations, see Thermal Characteristics section to calculate device specifications.
2. Power dissipation is calculated as follows:

$$P_{DIS} = V_{DD} \times {I_{DD} - \Sigma\ I_{OH}} + \Sigma\ {(V_{DD} - V_{OH}) \times I_{OH}} + \Sigma\ (V_{OI} \times I_{OL})$$

† NOTICE: Stresses above those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure above maximum rating conditions for extended periods may affect device reliability.

• Dimensioning and tolerancing per ASME Y14.5M 1.
• BSC: Basic Dimension. Theoretically exact value shown without tolerances.
• For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process 2.

Microchip Technology Drawing C04-2073 Rev B

© 2017 Microchip Technology Inc.