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WM8960GEFL/RV

Stereo CODEC

The WM8960GEFL/RV is a stereo codec from Wolfson Microelectronics. View the full WM8960GEFL/RV datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

WM8960GEFL/RV shares its datasheet with WM8960, whose page lists every part number it covers.

Official WM8960GEFL/RV datasheet (PDF) — the source this page was extracted from.

WM8960GEFL/RV Key Specifications

ParameterValue
ADC SNR94dB (A-weighted)
ADC THD-82dB at 48kHz, 3.3V
DAC SNR98dB (A-weighted)
DAC THD-84dB at 48kHz, 3.3V
Sample Rates8kHz to 48kHz
Control Interface2-wire (I2C)
Package Dimensions5x5x0.9mm
Speaker Output Power1W per channel into 8 ohm (5V supply)
Operating Temperature-40°C to +85°C
Digital Supply Voltage1.71V to 3.6V
Headphone Output Power40mW into 16 ohm at 3.3V
Speaker Supply Voltageup to 5.5V
Analogue Supply Voltage2.7V to 3.6V
Audio Interface FormatsLeft justified, Right justified, I2S, DSP mode
Speaker Driver Efficiency87% at 1W

WM8960GEFL/RV Overview

Part: WM8960CGEFL/V — Cirrus Logic

Type: Stereo Audio CODEC with Class-D Speaker Drivers and Headphone Drivers

Description: Low-power stereo CODEC with 24-bit sigma-delta ADCs/DACs, 1 W per channel stereo Class-D speaker drivers (8 Ω, 5 V supply), headphone drivers, and an on-chip PLL, with 2.7–3.6 V analogue supply, in a 5x5 mm QFN.

Operating Conditions:

  • Analogue supply (AVDD): 2.7–3.6 V
  • Digital core (DCVDD) and buffer (DBVDD) supplies: 1.71–3.6 V
  • Speaker supply (SPKVDD1, SPKVDD2): 2.7–5.5 V
  • Operating temperature: -40 to +85 °C

Absolute Maximum Ratings:

  • Max supply voltage (excluding SPKVDD1/SPKVDD2): -0.3 V to +4.5 V
  • Max SPKVDD1, SPKVDD2: -0.3 V to +7 V
  • Digital input voltage range: DGND -0.3 V to DBVDD +0.3 V
  • Analogue input voltage range: AGND -0.3 V to AVDD +0.3 V
  • Storage temperature after soldering: -65 to +150 °C

Key Specs:

  • DAC SNR 98 dB ('A' weighted), THD -84 dB at 48 kHz, 3.3 V
  • ADC SNR 94 dB ('A' weighted), THD -82 dB at 48 kHz, 3.3 V
  • Class-D speaker output: 1 W per channel into 8 Ω BTL at 5 V, <0.1% THD
  • Speaker driver efficiency: 87% at 1 W output; PSRR 70 dB at 217 Hz
  • Headphone output: 40 mW into 16 Ω at 3.3 V; THD -75 dB at 20 mW, SNR 90 dB into 16 Ω
  • Sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48 kHz
  • Control interface: 2-wire serial

Features:

  • Stereo Class-D speaker drivers with flexible speaker boost settings
  • On-chip headphone driver with capless mode support
  • Pseudo-differential microphone interface with integrated low-noise MICBIAS
  • Programmable ALC / limiter and noise gate
  • Input configuration for up to three stereo sources
  • Pop and click suppression
  • 3D enhancement
  • On-chip PLL for flexible clocking
  • Headphone jack detect and thermal shutdown
  • Software control to disable unused functions

Applications:

  • Games consoles
  • Portable media / DVD players
  • Mobile multimedia

Package:

  • 32-lead QFN, 5x5x0.9 mm (Pb-free, tray), MSL3, peak soldering temperature 260 °C
  • WM8960CGEFL/RV: same package, tape and reel

WM8960GEFL/RV Features

  • DAC SNR 98dB ('A' weighted), THD -84dB at 48kHz, 3.3V
  • ADC SNR 94dB ('A' weighted), THD -82dB at 48kHz, 3.3V
  • Pop and click suppression
  • 3D Enhancement
  • Stereo Class D Speaker Driver
  • ­ <0.1% THD with 1W per channel into 8 BTL speakers
  • ­ 70dB PSRR @217Hz
  • ­ 87% efficiency (1W output)
  • ­ Flexible internal switching clock
  • On-chip Headphone Driver
  • ­ 40mW output power into 16 at 3.3V
  • ­ Capless mode support
  • ­ THD -75dB at 20mW, SNR 90dB with 16 load
  • Microphone Interface
  • ­ Pseudo differential for high noise immunity
  • ­ Integrated low noise MICBIAS
  • ­ Programmable ALC / Limiter and Noise Gate
  • Low Power Consumption
  • Low Supply Voltages
  • ­ Analogue 2.7V to 3.6V (Speaker supply up to 5.5V)
  • ­ Digital core and I/O: 1.71V to 3.6V
  • On-chip PLL provides flexible clocking scheme
  • Sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48
  • 5x5x0.9mm QFN package

WM8960GEFL/RV Applications

  • Games consoles
  • Portable media / DVD players
  • Mobile multimedia

WM8960GEFL/RV Pin Configuration

WM8960GEFL/RV Electrical Characteristics

DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3)
Full-scale Input Signal Level - note this changes in proportion to AVDDV INFSL/RINPUT1,2,3 Single-ended1.0 0Vrms dBV
Full-scale Input Signal Level - note this changes in proportion to AVDDV INFSL/RINPUT1,2,3 Differential MIC0.5 -6Vrms dBV
Mic PGA equivalent input noise0 to 20kHz, +30dB gain150μV
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT1+30dB PGA gain Differential or single- ended MIC configuration3k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT10dB PGA gain Differential or single- ended MIC configuration49k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT1-17.25dB PGA gain Differential or single- ended MIC configuration87k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT2, L/R INPUT3(Constant for all gains) Differential MIC configuration85k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT2, L/R INPUT3Max boost gain L/RINPUT2/3 to boost7.5k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT2, L/R INPUT30dB boost gain L/RINPUT2/3 to boost13k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT2, L/R INPUT3Min boost gain L/RINPUT2/3 to boost37k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT3Max bypass gain L/RINPUT3 to bypass17k
Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled)L/R INPUT3Min bypass gain L/RINPUT3 to bypass70k
Input capacitance10pF
MIC Programmable Gain Amplifier (PGA)MIC Programmable Gain Amplifier (PGA)MIC Programmable Gain Amplifier (PGA)MIC Programmable Gain Amplifier (PGA)MIC Programmable Gain Amplifier (PGA)MIC Programmable Gain Amplifier (PGA)MIC Programmable Gain Amplifier (PGA)
Programmable Gain Min-17.25dB
Programmable Gain Max30dB
Programmable Gain Step SizeGuaranteed monotonic0.75dB
Mute AttenuationLMIC2B = 0 and RMIC2B = 085dB
Selectable Input Gain BoostSelectable Input Gain BoostSelectable Input Gain BoostSelectable Input Gain BoostSelectable Input Gain BoostSelectable Input Gain BoostSelectable Input Gain Boost
Gain Boost StepsInput from PGA0, 13, 20, 29, mutedB
Gain Boost StepsInput from L/RINPUT2 or L/RINPUT3-12, -9, -6, -3, 0, 3, 6, mutedB

DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGAAnalogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGAAnalogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGAAnalogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGAAnalogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGAAnalogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGAAnalogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA
Signal to Noise RatioSNRAVDD = 3.3V94dB
(A-weighted)SNRAVDD = 2.7V93dB
Total Harmonic Distortion Plus NoiseTHD+N-3dBFs input, AVDD = 3.3V-86 0.005dB %
THD+N-3dBFs input, AVDD = 2.7V-80 0.01dB %
Total Harmonic DistortionTHD-3dBFs input, AVDD = 3.3V-89 0.004dB %
THD-3dBFs input, AVDD = 2.7V-81 0.009dB %
Analogue Inputs (LINPUT2, RINPUT2) to ADC outAnalogue Inputs (LINPUT2, RINPUT2) to ADC outAnalogue Inputs (LINPUT2, RINPUT2) to ADC outAnalogue Inputs (LINPUT2, RINPUT2) to ADC outAnalogue Inputs (LINPUT2, RINPUT2) to ADC outAnalogue Inputs (LINPUT2, RINPUT2) to ADC outAnalogue Inputs (LINPUT2, RINPUT2) to ADC out
Signal to Noise RatioSNRAVDD = 3.3V8494dB
(A-weighted)SNRAVDD = 2.7V93dB
Total Harmonic Distortion Plus NoiseTHD+N-3dBFs input, AVDD = 3.3V-86 0.005-80dB %
THD+N-3dBFs input, AVDD = 2.7V-80 0.01dB %
Total Harmonic DistortionTHD-3dBFs input, AVDD = 3.3V-89 0.004-80dB %
THD-3dBFs input, AVDD = 2.7V-81 0.009dB %
Analogue Inputs (LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT3, RINPUT3) to ADC out
Signal to Noise RatioSNRAVDD = 3.3V94dB
(A-weighted)SNRAVDD = 2.7V93
Total Harmonic Distortion Plus NoiseTHD+N-3dBFs input, AVDD = 3.3V-86 0.005dB %
THD+N-3dBFs input, AVDD = 2.7V-80 0.01dB %
Total Harmonic DistortionTHD-3dBFs input, AVDD = 3.3V-89 0.004dB %
THD-3dBFs input, AVDD = 2.7V-81 0.009dB %

DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC outAnalogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out
ADC Channel Separation1kHz full scale signal into ADC via L/RINPUT1, MIC amp (single-ended) and boost95dB
ADC Channel Separation1kHz full scale signal into ADC via L/RINPUT1/2, MIC amp (pseudo- differential) and boost85dB
ADC Channel Separation1kHz full scale signal into ADC via L/RINPUT2 and boost85dB
ADC Channel Separation1kHz full scale signal into ADC via L/RINPUT3 and boost92dB
Line Input / MIC Separation (Quiescent input to ADC via boost; Output on ADC;Single-ended MIC input on L/RINPUT198dB
1kHz on L/RINPUT3 to HP out via bypass path)Differential MIC input using L/RINPUT290dB
Boost / Bypass Separation (Quiescent L/RINPUT3 to HP outputs via bypass)1kHz on LINPUT2 to ADC via boost only96dB
Boost / Bypass Separation (Quiescent L/RINPUT3 to HP outputs via bypass)1kHz on LINPUT1 to ADC via single-ended MIC PGA & boost116dB
Channel Matching1kHz signal0.2dB
Headphone Outputs (HP_L, HP_R)Headphone Outputs (HP_L, HP_R)Headphone Outputs (HP_L, HP_R)Headphone Outputs (HP_L, HP_R)Headphone Outputs (HP_L, HP_R)Headphone Outputs (HP_L, HP_R)Headphone Outputs (HP_L, HP_R)
0dB Full scale output voltageAVDD/3.3Vrms
Mute attenuation1kHz, full scale signal86dB
Channel SeparationL/RINPUT3 to headphone outputs via bypass110dB
DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)DAC to Line-Out (HP_L or HP_R with 10k / 50pF load)
Signal to Noise RatioSNRAVDD=3.3V9099dB
(A-weighted)AVDD=2.7V98
Total Harmonic Distortion Plus NoiseTHD+NAVDD=3.3V AVDD=2.7V-85 -90-80dB
Total Harmonic DistortionTHDAVDD=3.3V-87-80dB
Channel Separation1kHz full scale signal110dB
DAC to Line-Out (OUT3 with 10k / 50pF load)DAC to Line-Out (OUT3 with 10k / 50pF load)DAC to Line-Out (OUT3 with 10k / 50pF load)DAC to Line-Out (OUT3 with 10k / 50pF load)DAC to Line-Out (OUT3 with 10k / 50pF load)DAC to Line-Out (OUT3 with 10k / 50pF load)DAC to Line-Out (OUT3 with 10k / 50pF load)
Signal to Noise RatioSNRAVDD=3.3V99dB
(A-weighted)AVDD=2.7V98
Total Harmonic Distortion Plus NoiseTHD+NAVDD=3.3V-85dB
Total Harmonic DistortionTHDAVDD=2.7V
AVDD=3.3V
AVDD=2.7V
-90
-87
-92
dB
Channel Separation1kHz full scale signal110dB

DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified)
Output Power per channel P O Output power is very closely correlated with THD; see below.Output Power per channel P O Output power is very closely correlated with THD; see below.Output Power per channel P O Output power is very closely correlated with THD; see below.Output Power per channel P O Output power is very closely correlated with THD; see below.Output Power per channel P O Output power is very closely correlated with THD; see below.Output Power per channel P O Output power is very closely correlated with THD; see below.Output Power per channel P O Output power is very closely correlated with THD; see below.
Total Harmonic Distortion Plus NoiseTHD+NAVDD=2.7V, RL=32 PO=5mW,-78 0.013 -75dB %
Total Harmonic Distortion Plus NoiseTHD+NAVDD=2.7V, RL=16 PO=5mW0.018 -72
Total Harmonic Distortion Plus NoiseTHD+NAVDD=3.3V, RL=32 PO=20mW0.025
Total Harmonic Distortion Plus NoiseTHD+NAVDD=3.3V, RL=16 , PO=20mW-70 0.032
Signal to Noise RatioSNRAVDD = 3.3V9299dB
(A-weighted)SNRAVDD = 2.7V98
Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load)
Output Power P O Output power is very closely correlated with THD; see belowOutput Power P O Output power is very closely correlated with THD; see belowOutput Power P O Output power is very closely correlated with THD; see belowOutput Power P O Output power is very closely correlated with THD; see belowOutput Power P O Output power is very closely correlated with THD; see belowOutput Power P O Output power is very closely correlated with THD; see belowOutput Power P O Output power is very closely correlated with THD; see below
Total Harmonic Distortion PlusTHD+NdB
Noise (DAC to speaker outputs)PO =200mW, RL = 8 SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V,-78 0.013 -72% dB
Noise (DAC to speaker outputs)PO =320mW, RL = 8 , SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V0.025 -75%
Noise (DAC to speaker outputs)PO =500mW, RL = 8 SPKVDD1=SPKVDD2 =5V; AVDD=3.3V
PO =1W, RL = 8 , SPKVDD1=SPKVDD2 =5V; AVDD=3.3V
,0.018
-70 0.032
dB %
dB %
Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs)THD+NPO =200mW, RL = 8 SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V,-78 0.013dB %
Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs)THD+NPO =320mW, RL = 8 SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V,-72 0.025dB %
Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs)THD+NPO =500mW, RL = 8 SPKVDD1=SPKVDD2 =5V; AVDD=3.3V,-75 0.018dB %
Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs)THD+NPO =1W, RL = 8 , SPKVDD1=SPKVDD2 =5V; AVDD=3.3V-70 0.032dB %
Signal to Noise Ratio (A-weighted) (DAC to speaker outputs)SNRSPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V; RL = 8 , ref=2.0Vrms90dB
Signal to Noise Ratio (A-weighted) (DAC to speaker outputs)SNRSPKVDD1=SPKVDD2 =5V; AVDD=3.3V; RL = 8 , ref=2.8Vrms92dB
Signal to Noise Ratio (A-weighted) (LINNPUT3 and RINPUT3 to speaker outputs)SNRSPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V; RL = 8 , ref=2.0Vrms90dB
Signal to Noise Ratio (A-weighted) (LINNPUT3 and RINPUT3 to speaker outputs)SNRSPKVDD1=SPKVDD2 =5V; AVDD=3.3V; RL = 8 , ref=2.8Vrms92dB

DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Speaker Supply Leakage currentI SPKVDDSPKVDD1=SPKVDD2 =5V; All other supplies disconnected1μA
Speaker Supply Leakage currentI SPKVDDSPKVDD1=SPKVDD2 =5V; All other supplies 0V1μA
Power Supply Rejection Ratio (100mV ripple on SPKVDD1/SPKVDD2 @217Hz)PSRRDAC to speaker playback80dB
Power Supply Rejection Ratio (100mV ripple on SPKVDD1/SPKVDD2 @217Hz)PSRRL/RINPUT3 to speaker playback80dB
Analogue Reference LevelsAnalogue Reference LevelsAnalogue Reference LevelsAnalogue Reference LevelsAnalogue Reference LevelsAnalogue Reference LevelsAnalogue Reference Levels
Midrail Reference VoltageVMID-3%AVDD/2+3%V
Microphone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone Bias
Bias VoltageV MICBIAS3mA load current MBSEL=0-5%0.9 AVDD+ 5%V
Bias VoltageV MICBIAS3mA load current MBSEL=1-5%0.65 AVDD+ 5%V
Bias Current SourceI MICBIAS3mA
Output Noise VoltageVn1kHz to 20kHz15nV/ Hz
Digital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / Output
Input HIGH LevelV IH0.7 DBVDDV
Input LOW LevelV IL0.3 DBVDDV
Output HIGH LevelV OHI OL =1mA0.9 DBVDDV
Output LOW LevelV OLI OH =-1mA0.1 DBVDDV
Input capacitance10pF
Input leakage-0.90.9μA

WM8960GEFL/RV Absolute Maximum Ratings

Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified.

ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device.

Cirrus Logic tests its package types according to IPC/JEDEC J-STD-020 for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are:

MSL1 = unlimited floor life at <30 C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30 C / 60% Relative Humidity. Supplied in moisture barrier bag.

MSL3 = out of bag storage for 168 hours at <30 C / 60% Relative Humidity. Supplied in moisture barrier bag.

The Moisture Sensitivity Level for each package type is specified in Ordering Information.

CONDITIONMINMAX
Supply voltages (excluding SPKVDD1 and SPKVDD2)-0.3V+4.5V
SPKVDD1, SPKVDD2-0.3V+7V
Voltage range digital inputsDGND -0.3VDBVDD +0.3V
Voltage range analogue inputsAGND -0.3VAVDD +0.3V
Operating temperature range, T A-40 C+85 C
Storage temperature after soldering-65 C+150 C
PARAMETERSYMBOLMINTYPMAXUNIT
Digital supply range (Core)DCVDD1.713.6V
Digital supply range (Buffer)DBVDD1.713.6V
Analogue supplies rangeAVDD2.73.6V
Speaker supply rangeSPKVDD1, SPKVDD22.75.5V
GroundDGND, AGND, SPKGND1, SPKGND20V

WM8960GEFL/RV Thermal Information

The speaker and headphone outputs can drive very large currents. To protect the WM8960 from overheating a thermal shutdown circuit is included and is enabled by default. If the device temperature reaches approximately 150 0 C and the thermal shutdown circuit is enabled (TSDEN = 1; TSENSEN = 1) the speaker and headphone amplifiers (HP_L, HP_R, SPK_LP, SPK_LN, SPK_RP, SPK_RN and OUT3) will be disabled. This feature can be disabled to save power when the device is in standby mode.

TSENSEN must be set to 1 to enable the temperature sensor when using the TSDEN thermal shutdown function. The output of the temperature sensor can also be output to the GPIO1 pin.

Table 31 Thermal Shutdown

REGISTER ADDRESSBITLABELDEFAULTDESCRIPTION
R23 (17h) Additional Control (1)8TSDEN1Thermal Shutdown Enable 0 = Thermal shutdown disabled 1 = Thermal shutdown enabled (TSENSEN must be enabled for this function to work)
R48 (30h) Additional Control (4)1TSENSEN1Temperature Sensor Enable 0 = Temperature sensor disabled 1 = Temperature sensor enabled

WM8960GEFL/RV Package Information

SymbolsMINDimensions (mm) - NOMDimensions (mm) - MAXDimensions (mm) - NOTE
A0.800.901.00
A100.020.05
A30.203 REF
b0.180.250.301
D5.00 BSC
D23.303.453.602
E5.00 BSC
E23.303.453.602
e0.50 BSC
G0.20
H0.1
L0.300.400.50
T0.103
W0.15
Tolerances of Form and PositionTolerances of Form and PositionTolerances of Form and PositionTolerances of Form and PositionTolerances of Form and Position
aaa0.150.150.15
bbb0.100.100.10
ccc0.100.100.10
REF:JEDEC, MO-220, VARIATION VHHD-5.JEDEC, MO-220, VARIATION VHHD-5.JEDEC, MO-220, VARIATION VHHD-5.JEDEC, MO-220, VARIATION VHHD-5.

Variants on the same datasheet

These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.

Part NumberManufacturerPackage
WM8960Wolfson Microelectronics—
WM8960CGEFL/2RVWolfson Microelectronics—
WM8960CGEFL/RVWolfson Microelectronics32-lead QFN (5x5x0.9mm) (Pb-free)
WM8960CGEFL/VWolfson MicroelectronicsQFN-32 (5x5x0.9mm)
WM8960GEFL/VWolfson Microelectronics—

Other Integrated Circuits

All Integrated Circuits datasheetsAll Wolfson Microelectronics datasheets (6)

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Ask your AI agent about the WM8960GEFL/RV

Connect SheetsData to Claude, Cursor, Codex or any MCP client and your agent reads this datasheet for you: pinout, limits, register maps and design checks, with the numbers taken from the PDF.

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Then ask: "Can the WM8960GEFL/RV run from my 12 V rail? Check it against the datasheet limits."

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