WM8960CGEFL/V
Stereo CODECThe WM8960CGEFL/V is a stereo codec from Wolfson Microelectronics. View the full WM8960CGEFL/V datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
Wolfson Microelectronics
Category
Stereo CODEC
Package
32-lead QFN (5x5x0.9mm) (Pb-free)
Key Specifications
| Parameter | Value |
|---|---|
| ADC THD | -82dB (at 48kHz) |
| DAC THD | -84dB (at 48kHz) |
| Audio Interface | Digital Audio Interface |
| Control Interface | 2-wire serial |
| Speaker Driver THD | <0.1% (1W into 8 Ohm) |
| ADC SNR (A-Weighted) | 94dB |
| DAC SNR (A-Weighted) | 98dB |
| Headphone Output Power | 40mW into 16 Ohm (at 3.3V supply) |
| Operating Temperature Range | -40°C to +85°C |
| Stereo Speaker Output Power | 1W per channel into 8 Ohm (at 5V supply) |
| Analog Supply Voltage Range (AVDD) | 2.7V to 3.6V |
| Speaker Supply Voltage Range (SPKVDD) | 2.7V to 5.5V |
| Digital I/O Supply Voltage Range (DBVDD) | 1.71V to 3.6V |
| Digital Core Supply Voltage Range (DCVDD) | 1.71V to 3.6V |
Overview
Part: WM8960CGEFL/V — Wolfson Microelectronics (now Cirrus Logic)
Type: Stereo CODEC with Class-D Speaker and Headphone Drivers
Description: A low power, high quality stereo CODEC designed for portable digital audio applications, featuring 24-bit ADCs/DACs, 1W per channel Class-D speaker drivers into 8Ω loads, and headphone drivers, all in a 5x5mm QFN package.
Operating Conditions:
- Supply voltage: Analogue 2.7V to 3.6V, Digital core and I/O 1.71V to 3.6V, Speaker supply up to 5.5V
- Operating temperature: -40 to +85 °C
- Sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48 kHz
Absolute Maximum Ratings:
- Max supply voltage: 6.0 V (SPKVDD1, SPKVDD2), 4.0 V (AVDD, DCVDD, DBVDD)
- Max junction/storage temperature: 150 °C
Key Specs:
- DAC SNR: 98dB ('A' weighted) at 48kHz, 3.3V
- DAC THD: -84dB at 48kHz, 3.3V
- ADC SNR: 94dB ('A' weighted) at 48kHz, 3.3V
- ADC THD: -82dB at 48kHz, 3.3V
- Speaker Driver Output Power: 1W per channel into 8Ω BTL speakers
- Headphone Driver Output Power: 40mW into 16Ω at 3.3V
- Speaker Driver Efficiency: 87% (1W output)
- Speaker Driver PSRR: 70dB @217Hz
Features:
- Pop and click suppression
- 3D Enhancement
- Flexible internal switching clock for Class D
- Capless mode support for headphone driver
- Pseudo differential microphone inputs for high noise immunity
- Integrated low noise MICBIAS
- Programmable ALC / Limiter and Noise Gate
- On-chip PLL provides flexible clocking scheme
Applications:
- Games consoles
- Portable media / DVD players
- Mobile multimedia
Package:
- 32-lead QFN (5x5x0.9mm)
Features
- DAC SNR 98dB ('A' weighted), THD -84dB at 48kHz, 3.3V
- ADC SNR 94dB ('A' weighted), THD -82dB at 48kHz, 3.3V
- Pop and click suppression
- 3D Enhancement
- Stereo Class D Speaker Driver
- <0.1% THD with 1W per channel into 8 BTL speakers
- 70dB PSRR @217Hz
- 87% efficiency (1W output)
- Flexible internal switching clock
- On-chip Headphone Driver
- 40mW output power into 16 at 3.3V
- Capless mode support
- THD -75dB at 20mW, SNR 90dB with 16 load
- Microphone Interface
- Pseudo differential for high noise immunity
- Integrated low noise MICBIAS
- Programmable ALC / Limiter and Noise Gate
- Low Power Consumption
- Low Supply Voltages
- Analogue 2.7V to 3.6V (Speaker supply up to 5.5V)
- Digital core and I/O: 1.71V to 3.6V
- On-chip PLL provides flexible clocking scheme
- Sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48
- 5x5x0.9mm QFN package
Applications
- Games consoles
- Portable media / DVD players
- Mobile multimedia
Pin Configuration
Electrical Characteristics
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
| PARAMETER | SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) |
| Full-scale Input Signal Level - note this changes in proportion to AVDD | V INFS | L/RINPUT1,2,3 Single-ended | 1.0 0 | Vrms dBV | ||
| Full-scale Input Signal Level - note this changes in proportion to AVDD | V INFS | L/RINPUT1,2,3 Differential MIC | 0.5 -6 | Vrms dBV | ||
| Mic PGA equivalent input noise | 0 to 20kHz, +30dB gain | 150 | μV | |||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT1 | +30dB PGA gain Differential or single- ended MIC configuration | 3 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT1 | 0dB PGA gain Differential or single- ended MIC configuration | 49 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT1 | -17.25dB PGA gain Differential or single- ended MIC configuration | 87 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT2, L/R INPUT3 | (Constant for all gains) Differential MIC configuration | 85 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT2, L/R INPUT3 | Max boost gain L/RINPUT2/3 to boost | 7.5 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT2, L/R INPUT3 | 0dB boost gain L/RINPUT2/3 to boost | 13 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT2, L/R INPUT3 | Min boost gain L/RINPUT2/3 to boost | 37 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT3 | Max bypass gain L/RINPUT3 to bypass | 17 | k | ||
| Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) | L/R INPUT3 | Min bypass gain L/RINPUT3 to bypass | 70 | k | ||
| Input capacitance | 10 | pF | ||||
| MIC Programmable Gain Amplifier (PGA) | MIC Programmable Gain Amplifier (PGA) | MIC Programmable Gain Amplifier (PGA) | MIC Programmable Gain Amplifier (PGA) | MIC Programmable Gain Amplifier (PGA) | MIC Programmable Gain Amplifier (PGA) | MIC Programmable Gain Amplifier (PGA) |
| Programmable Gain Min | -17.25 | dB | ||||
| Programmable Gain Max | 30 | dB | ||||
| Programmable Gain Step Size | Guaranteed monotonic | 0.75 | dB | |||
| Mute Attenuation | LMIC2B = 0 and RMIC2B = 0 | 85 | dB | |||
| Selectable Input Gain Boost | Selectable Input Gain Boost | Selectable Input Gain Boost | Selectable Input Gain Boost | Selectable Input Gain Boost | Selectable Input Gain Boost | Selectable Input Gain Boost |
| Gain Boost Steps | Input from PGA | 0, 13, 20, 29, mute | dB | |||
| Gain Boost Steps | Input from L/RINPUT2 or L/RINPUT3 | -12, -9, -6, -3, 0, 3, 6, mute | dB |
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
| PARAMETER | SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA | Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA | Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA | Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA | Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA | Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA | Analogue Inputs (LINPUT1/2 Differential, RINPUT1/2 Differential) to ADC out via MIC PGA |
| Signal to Noise Ratio | SNR | AVDD = 3.3V | 94 | dB | ||
| (A-weighted) | SNR | AVDD = 2.7V | 93 | dB | ||
| Total Harmonic Distortion Plus Noise | THD+N | -3dBFs input, AVDD = 3.3V | -86 0.005 | dB % | ||
| THD+N | -3dBFs input, AVDD = 2.7V | -80 0.01 | dB % | |||
| Total Harmonic Distortion | THD | -3dBFs input, AVDD = 3.3V | -89 0.004 | dB % | ||
| THD | -3dBFs input, AVDD = 2.7V | -81 0.009 | dB % | |||
| Analogue Inputs (LINPUT2, RINPUT2) to ADC out | Analogue Inputs (LINPUT2, RINPUT2) to ADC out | Analogue Inputs (LINPUT2, RINPUT2) to ADC out | Analogue Inputs (LINPUT2, RINPUT2) to ADC out | Analogue Inputs (LINPUT2, RINPUT2) to ADC out | Analogue Inputs (LINPUT2, RINPUT2) to ADC out | Analogue Inputs (LINPUT2, RINPUT2) to ADC out |
| Signal to Noise Ratio | SNR | AVDD = 3.3V | 84 | 94 | dB | |
| (A-weighted) | SNR | AVDD = 2.7V | 93 | dB | ||
| Total Harmonic Distortion Plus Noise | THD+N | -3dBFs input, AVDD = 3.3V | -86 0.005 | -80 | dB % | |
| THD+N | -3dBFs input, AVDD = 2.7V | -80 0.01 | dB % | |||
| Total Harmonic Distortion | THD | -3dBFs input, AVDD = 3.3V | -89 0.004 | -80 | dB % | |
| THD | -3dBFs input, AVDD = 2.7V | -81 0.009 | dB % | |||
| Analogue Inputs (LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT3, RINPUT3) to ADC out |
| Signal to Noise Ratio | SNR | AVDD = 3.3V | 94 | dB | ||
| (A-weighted) | SNR | AVDD = 2.7V | 93 | |||
| Total Harmonic Distortion Plus Noise | THD+N | -3dBFs input, AVDD = 3.3V | -86 0.005 | dB % | ||
| THD+N | -3dBFs input, AVDD = 2.7V | -80 0.01 | dB % | |||
| Total Harmonic Distortion | THD | -3dBFs input, AVDD = 3.3V | -89 0.004 | dB % | ||
| THD | -3dBFs input, AVDD = 2.7V | -81 0.009 | dB % |
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
| PARAMETER | SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out | Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, RINPUT2, LINPUT3, RINPUT3) to ADC out |
| ADC Channel Separation | 1kHz full scale signal into ADC via L/RINPUT1, MIC amp (single-ended) and boost | 95 | dB | |||
| ADC Channel Separation | 1kHz full scale signal into ADC via L/RINPUT1/2, MIC amp (pseudo- differential) and boost | 85 | dB | |||
| ADC Channel Separation | 1kHz full scale signal into ADC via L/RINPUT2 and boost | 85 | dB | |||
| ADC Channel Separation | 1kHz full scale signal into ADC via L/RINPUT3 and boost | 92 | dB | |||
| Line Input / MIC Separation (Quiescent input to ADC via boost; Output on ADC; | Single-ended MIC input on L/RINPUT1 | 98 | dB | |||
| 1kHz on L/RINPUT3 to HP out via bypass path) | Differential MIC input using L/RINPUT2 | 90 | dB | |||
| Boost / Bypass Separation (Quiescent L/RINPUT3 to HP outputs via bypass) | 1kHz on LINPUT2 to ADC via boost only | 96 | dB | |||
| Boost / Bypass Separation (Quiescent L/RINPUT3 to HP outputs via bypass) | 1kHz on LINPUT1 to ADC via single-ended MIC PGA & boost | 116 | dB | |||
| Channel Matching | 1kHz signal | 0.2 | dB | |||
| Headphone Outputs (HP_L, HP_R) | Headphone Outputs (HP_L, HP_R) | Headphone Outputs (HP_L, HP_R) | Headphone Outputs (HP_L, HP_R) | Headphone Outputs (HP_L, HP_R) | Headphone Outputs (HP_L, HP_R) | Headphone Outputs (HP_L, HP_R) |
| 0dB Full scale output voltage | AVDD/3.3 | Vrms | ||||
| Mute attenuation | 1kHz, full scale signal | 86 | dB | |||
| Channel Separation | L/RINPUT3 to headphone outputs via bypass | 110 | dB | |||
| DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) | DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) | DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) | DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) | DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) | DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) | DAC to Line-Out (HP_L or HP_R with 10k / 50pF load) |
| Signal to Noise Ratio | SNR | AVDD=3.3V | 90 | 99 | dB | |
| (A-weighted) | AVDD=2.7V | 98 | ||||
| Total Harmonic Distortion Plus Noise | THD+N | AVDD=3.3V AVDD=2.7V | -85 -90 | -80 | dB | |
| Total Harmonic Distortion | THD | AVDD=3.3V | -87 | -80 | dB | |
| Channel Separation | 1kHz full scale signal | 110 | dB | |||
| DAC to Line-Out (OUT3 with 10k / 50pF load) | DAC to Line-Out (OUT3 with 10k / 50pF load) | DAC to Line-Out (OUT3 with 10k / 50pF load) | DAC to Line-Out (OUT3 with 10k / 50pF load) | DAC to Line-Out (OUT3 with 10k / 50pF load) | DAC to Line-Out (OUT3 with 10k / 50pF load) | DAC to Line-Out (OUT3 with 10k / 50pF load) |
| Signal to Noise Ratio | SNR | AVDD=3.3V | 99 | dB | ||
| (A-weighted) | AVDD=2.7V | 98 | ||||
| Total Harmonic Distortion Plus Noise | THD+N | AVDD=3.3V | -85 | dB | ||
| Total Harmonic Distortion | THD | AVDD=2.7V AVDD=3.3V AVDD=2.7V | -90 -87 -92 | dB | ||
| Channel Separation | 1kHz full scale signal | 110 | dB |
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
| PARAMETER | SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) | Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) | Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) | Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) | Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) | Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) | Headphone Output (HP_L, HP_R, using capacitors unless otherwise specified) |
| Output Power per channel P O Output power is very closely correlated with THD; see below. | Output Power per channel P O Output power is very closely correlated with THD; see below. | Output Power per channel P O Output power is very closely correlated with THD; see below. | Output Power per channel P O Output power is very closely correlated with THD; see below. | Output Power per channel P O Output power is very closely correlated with THD; see below. | Output Power per channel P O Output power is very closely correlated with THD; see below. | Output Power per channel P O Output power is very closely correlated with THD; see below. |
| Total Harmonic Distortion Plus Noise | THD+N | AVDD=2.7V, RL=32 PO=5mW | , | -78 0.013 -75 | dB % | |
| Total Harmonic Distortion Plus Noise | THD+N | AVDD=2.7V, RL=16 PO=5mW | 0.018 -72 | |||
| Total Harmonic Distortion Plus Noise | THD+N | AVDD=3.3V, RL=32 PO=20mW | 0.025 | |||
| Total Harmonic Distortion Plus Noise | THD+N | AVDD=3.3V, RL=16 , PO=20mW | -70 0.032 | |||
| Signal to Noise Ratio | SNR | AVDD = 3.3V | 92 | 99 | dB | |
| (A-weighted) | SNR | AVDD = 2.7V | 98 | |||
| Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) | Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) | Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) | Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) | Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) | Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) | Speaker Outputs (DAC to SPK_LP, SPK_LN, SPK_RP, SPK_RN with 8 bridge tied load) |
| Output Power P O Output power is very closely correlated with THD; see below | Output Power P O Output power is very closely correlated with THD; see below | Output Power P O Output power is very closely correlated with THD; see below | Output Power P O Output power is very closely correlated with THD; see below | Output Power P O Output power is very closely correlated with THD; see below | Output Power P O Output power is very closely correlated with THD; see below | Output Power P O Output power is very closely correlated with THD; see below |
| Total Harmonic Distortion Plus | THD+N | dB | ||||
| Noise (DAC to speaker outputs) | PO =200mW, RL = 8 SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V | , | -78 0.013 -72 | % dB | ||
| Noise (DAC to speaker outputs) | PO =320mW, RL = 8 , SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V | 0.025 -75 | % | |||
| Noise (DAC to speaker outputs) | PO =500mW, RL = 8 SPKVDD1=SPKVDD2 =5V; AVDD=3.3V PO =1W, RL = 8 , SPKVDD1=SPKVDD2 =5V; AVDD=3.3V | , | 0.018 -70 0.032 | dB % dB % | ||
| Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs) | THD+N | PO =200mW, RL = 8 SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V | , | -78 0.013 | dB % | |
| Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs) | THD+N | PO =320mW, RL = 8 SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V | , | -72 0.025 | dB % | |
| Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs) | THD+N | PO =500mW, RL = 8 SPKVDD1=SPKVDD2 =5V; AVDD=3.3V | , | -75 0.018 | dB % | |
| Total Harmonic Distortion Plus Noise (LINPUT3 and RINPUT3 to speaker outputs) | THD+N | PO =1W, RL = 8 , SPKVDD1=SPKVDD2 =5V; AVDD=3.3V | -70 0.032 | dB % | ||
| Signal to Noise Ratio (A-weighted) (DAC to speaker outputs) | SNR | SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V; RL = 8 , ref=2.0Vrms | 90 | dB | ||
| Signal to Noise Ratio (A-weighted) (DAC to speaker outputs) | SNR | SPKVDD1=SPKVDD2 =5V; AVDD=3.3V; RL = 8 , ref=2.8Vrms | 92 | dB | ||
| Signal to Noise Ratio (A-weighted) (LINNPUT3 and RINPUT3 to speaker outputs) | SNR | SPKVDD1=SPKVDD2 =3.3V; AVDD=3.3V; RL = 8 , ref=2.0Vrms | 90 | dB | ||
| Signal to Noise Ratio (A-weighted) (LINNPUT3 and RINPUT3 to speaker outputs) | SNR | SPKVDD1=SPKVDD2 =5V; AVDD=3.3V; RL = 8 , ref=2.8Vrms | 92 | dB |
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 o C, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
| PARAMETER | SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|---|
| Speaker Supply Leakage current | I SPKVDD | SPKVDD1=SPKVDD2 =5V; All other supplies disconnected | 1 | μA | ||
| Speaker Supply Leakage current | I SPKVDD | SPKVDD1=SPKVDD2 =5V; All other supplies 0V | 1 | μA | ||
| Power Supply Rejection Ratio (100mV ripple on SPKVDD1/SPKVDD2 @217Hz) | PSRR | DAC to speaker playback | 80 | dB | ||
| Power Supply Rejection Ratio (100mV ripple on SPKVDD1/SPKVDD2 @217Hz) | PSRR | L/RINPUT3 to speaker playback | 80 | dB | ||
| Analogue Reference Levels | Analogue Reference Levels | Analogue Reference Levels | Analogue Reference Levels | Analogue Reference Levels | Analogue Reference Levels | Analogue Reference Levels |
| Midrail Reference Voltage | VMID | -3% | AVDD/2 | +3% | V | |
| Microphone Bias | Microphone Bias | Microphone Bias | Microphone Bias | Microphone Bias | Microphone Bias | Microphone Bias |
| Bias Voltage | V MICBIAS | 3mA load current MBSEL=0 | -5% | 0.9 AVDD | + 5% | V |
| Bias Voltage | V MICBIAS | 3mA load current MBSEL=1 | -5% | 0.65 AVDD | + 5% | V |
| Bias Current Source | I MICBIAS | 3 | mA | |||
| Output Noise Voltage | Vn | 1kHz to 20kHz | 15 | nV/ Hz | ||
| Digital Input / Output | Digital Input / Output | Digital Input / Output | Digital Input / Output | Digital Input / Output | Digital Input / Output | Digital Input / Output |
| Input HIGH Level | V IH | 0.7 DBVDD | V | |||
| Input LOW Level | V IL | 0.3 DBVDD | V | |||
| Output HIGH Level | V OH | I OL =1mA | 0.9 DBVDD | V | ||
| Output LOW Level | V OL | I OH =-1mA | 0.1 DBVDD | V | ||
| Input capacitance | 10 | pF | ||||
| Input leakage | -0.9 | 0.9 | μA |
Absolute Maximum Ratings
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device.
Cirrus Logic tests its package types according to IPC/JEDEC J-STD-020 for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30 C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30 C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30 C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
| CONDITION | MIN | MAX |
|---|---|---|
| Supply voltages (excluding SPKVDD1 and SPKVDD2) | -0.3V | +4.5V |
| SPKVDD1, SPKVDD2 | -0.3V | +7V |
| Voltage range digital inputs | DGND -0.3V | DBVDD +0.3V |
| Voltage range analogue inputs | AGND -0.3V | AVDD +0.3V |
| Operating temperature range, T A | -40 C | +85 C |
| Storage temperature after soldering | -65 C | +150 C |
Recommended Operating Conditions
| PARAMETER | SYMBOL | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|---|
| Digital supply range (Core) | DCVDD | 1.71 | 3.6 | V | |
| Digital supply range (Buffer) | DBVDD | 1.71 | 3.6 | V | |
| Analogue supplies range | AVDD | 2.7 | 3.6 | V | |
| Speaker supply range | SPKVDD1, SPKVDD2 | 2.7 | 5.5 | V | |
| Ground | DGND, AGND, SPKGND1, SPKGND2 | 0 | V |
Thermal Information
The speaker and headphone outputs can drive very large currents. To protect the WM8960 from overheating a thermal shutdown circuit is included and is enabled by default. If the device temperature reaches approximately 150 0 C and the thermal shutdown circuit is enabled (TSDEN = 1; TSENSEN = 1) the speaker and headphone amplifiers (HP_L, HP_R, SPK_LP, SPK_LN, SPK_RP, SPK_RN and OUT3) will be disabled. This feature can be disabled to save power when the device is in standby mode.
TSENSEN must be set to 1 to enable the temperature sensor when using the TSDEN thermal shutdown function. The output of the temperature sensor can also be output to the GPIO1 pin.
Table 31 Thermal Shutdown
| REGISTER ADDRESS | BIT | LABEL | DEFAULT | DESCRIPTION |
|---|---|---|---|---|
| R23 (17h) Additional Control (1) | 8 | TSDEN | 1 | Thermal Shutdown Enable 0 = Thermal shutdown disabled 1 = Thermal shutdown enabled (TSENSEN must be enabled for this function to work) |
| R48 (30h) Additional Control (4) | 1 | TSENSEN | 1 | Temperature Sensor Enable 0 = Temperature sensor disabled 1 = Temperature sensor enabled |
Package Information
| Symbols | Dimensions (mm) | Dimensions (mm) | Dimensions (mm) | |
|---|---|---|---|---|
| MIN | NOM | MAX | NOTE | |
| A | 0.80 | 0.90 | 1.00 | |
| A1 | 0 | 0.02 | 0.05 | |
| A3 | 0.203 REF | |||
| b | 0.18 | 0.25 | 0.30 | 1 |
| D | 5.00 BSC | |||
| D2 | 3.30 | 3.45 | 3.60 | 2 |
| E | 5.00 BSC | |||
| E2 | 3.30 | 3.45 | 3.60 | 2 |
| e | 0.50 BSC | |||
| G | 0.20 | |||
| H | 0.1 | |||
| L | 0.30 | 0.40 | 0.50 | |
| T | 0.103 | |||
| W | 0.15 | |||
| Tolerances of Form and Position | Tolerances of Form and Position | Tolerances of Form and Position | Tolerances of Form and Position | Tolerances of Form and Position |
| aaa | 0.15 | 0.15 | 0.15 | |
| bbb | 0.10 | 0.10 | 0.10 | |
| ccc | 0.10 | 0.10 | 0.10 | |
| REF: | JEDEC, MO-220, VARIATION VHHD-5. | JEDEC, MO-220, VARIATION VHHD-5. | JEDEC, MO-220, VARIATION VHHD-5. | JEDEC, MO-220, VARIATION VHHD-5. |
Ordering Information
| ORDER CODE | TEMPERATURE RANGE | PACKAGE | PACKING |
|---|---|---|---|
| WM8960CGEFL/V | -40 C to +85 C | 32-lead QFN (5x5x0.9mm) (Pb-free) | Tray |
| WM8960CGEFL/RV | -40 C to +85 C | 32-lead QFN (5x5x0.9mm) (Pb-free) | Tape and reel |
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| WM8960 | Wolfson Microelectronics | — |
| WM8960CGEFL/2RV | Wolfson Microelectronics | — |
| WM8960CGEFL/RV | Wolfson Microelectronics | 32-lead QFN (5x5x0.9mm) (Pb-free) |
| WM8960GEFL/RV | Wolfson Microelectronics | — |
| WM8960GEFL/V | Wolfson Microelectronics | — |
Data on this page is extracted from publicly available manufacturer datasheets using automated tools including AI. It may contain errors or omissions. Always verify specifications against the official manufacturer datasheet before making design or purchasing decisions. See our Terms of Service. Rights holders can submit a takedown request.
Get structured datasheet data via API
Get started free