TM4C129ENCPDT

Part: TM4C129ENCPDT — Texas Instruments

Type: ARM Cortex-M4F Microcontroller

Description: Tiva C Series 32-bit ARM Cortex-M4F microcontroller with Ethernet, crypto accelerators (AES, DES, SHA/MD5), CRC, and a Hibernation module.

Operating Conditions:

Absolute Maximum Ratings:

• Max supply voltage: 4 V (VDD, VDDA, and VBAT)
• Max VBAT ramp rate: 0.7 V/μs
• Input voltage on GPIO: -0.3 to 4 V
• Max current per output pin: 64 mA
• Max junction temperature: 125 °C
• Storage temperature (unpowered): -65 to 150 °C
• ESD: HBM 2.0 kV, CDM 500 V

Key Specs:

• VDD, VDDA, VBAT absolute maximum: 4 V
• GPIO input voltage range: -0.3 to 4 V
• Maximum current per output pin: 64 mA
• Maximum junction temperature: 125 °C
• Storage temperature: -65 to 150 °C
• ESD HBM: 2.0 kV; CDM: 500 V

Features:

• ARM Cortex-M4F processor core with FPU and MPU
• Cryptographic accelerators: AES, DES, SHA/MD5
• Cyclical Redundancy Check (CRC)
• Ethernet
• Hibernation module with real-time clock, tamper detection, and battery-backed memory
• JTAG and ARM Serial Wire Debug
• Serial communications peripherals
• Advanced motion control and analog peripherals

Applications:

Package:

The TM4C129ENCPDT microcontroller component features and general function are discussed in more detail in the following section.

The maximum ratings are the limits to which the device can be subjected without permanently damaging the device. Device reliability may be adversely affected by exposure to absolute-maximum ratings for extended periods.

Note: The device is not guaranteed to operate properly at the maximum ratings.

Table 30-1. Absolute Maximum Ratings

Important: This device contains circuitry to protect the I/Os against damage due to high-static voltages; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are connected to an appropriate logic voltage level (see 'Connections for Unused Signals' on page 1940).

Table 30-2. ESD Absolute Maximum Ratings

• ■ The Ethernet EN0RXIN , EN0TX0N , EN0RXIP , and EN0TXOP pins to each other.
• ■ The GPIO pins PM4 , PM5 , PM6 , and PM7 to other pins.

These exceptions are compliant to 500 V and do not require any special handling beyond typical ESD control procedures during assembly operations per JEDEC publication JEP155. Note that these pins do meet the 500 V CDM specification.

c. Level listed is the passing level per EIA-JEDEC JESD22-C101E. JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

The following sections describe the recommended DC operating conditions and GPIO operating characteristics for the device.

• d. T PCB is the temperature of the board acquired by following the steps listed in the EAI/JESD 51-8 standard summarized in the Semiconductor and IC Package Thermal Metrics Application Report (literature number SPRA953). P is the device power consumption.
• e. Because Θ JA is highly variable and based on factors such as board design, chip/pad size, altitude, and external ambient temperature, it is recommended that equations containing Ψ JT and Ψ JB be used for best results.

f. T B is temperature of the board.

• g. Θ JB is not a pure reflection of the internal resistance of the package because it includes the resistance of the testing board and environment. It is recommended that equations containing Ψ JT and Ψ JB be used for best results.

No ordering information table was found in the provided datasheet section. The text covers memory system ordering of memory accesses (Device and Strongly Ordered memory behavior) and contains no part numbers, ordering codes, package types, or temperature ranges.