STM8L151F2

Part: STM8L151C2/K2/F2 and STM8L151C3/K3/F3 (low-density STM8L151x2/3) — STMicroelectronics

Type: 8-bit ultra-low-power MCU (STM8 core)

Description: 8-bit ultra-low-power STM8 MCU running at up to 16 MHz (16 CISC MIPS peak) with up to 8 KB Flash, 256 bytes data EEPROM, 1 KB RAM, 12-bit ADC and a 1.65–3.6 V supply range.

Operating Conditions:

• Supply voltage: 1.65–3.6 V (VDD, without BOR); 1.8–3.6 V with BOR; VDDA 1.8–3.6 V when ADC1 is used
• Operating temperature: -40 to 85 °C (suffix 6); suffix 3 devices extend to 125 °C
• Max system clock: 16 MHz (1.65 V ≤ VDD < 3.6 V)
• Junction temperature range: -40 to 105 °C (suffix 6), -40 to 130 °C (suffix 3)

Absolute Maximum Ratings:

• Max supply voltage (VDD - VSS): 4.0 V (min -0.3 V)
• Input voltage on true open-drain pins (PC0, PC1): VDD + 4.0 V max
• Input voltage on any other pin: 4.0 V max
• Total current into VDD: 80 mA; total current out of VSS: 80 mA
• Output current sunk by any I/O: 25 mA (80 mA for IR_TIM pin); sourced: -25 mA
• Max junction temperature: 150 °C
• Storage temperature: -65 to +150 °C

Key Specs:

• System clock frequency: 0–16 MHz at 1.65 V ≤ VDD < 3.6 V
• VDD: 1.65–3.6 V; VDDA: 1.65–3.6 V (ADC1 not used), 1.8–3.6 V (ADC1 used)
• Power dissipation at TA = 85 °C: 288 mW (LQFP48, UFQFPN32), 250 mW (UFQFPN28), 196 mW (UFQFPN20), 181 mW (TSSOP20)
• Power dissipation at TA = 125 °C (suffix 3): 77 mW (LQFP48), 185 mW (UFQFPN32), 62 mW (UFQFPN28), 49 mW (UFQFPN20), 45 mW (TSSOP20)
• Ultra-low leakage per I/O: 50 nA
• Fast wakeup from Halt: 5 μs
• Active-halt mode current: 1 μA
• 12-bit ADC up to 1 Msps, 28 channels

Features:

• Advanced STM8 core, Harvard architecture, 3-stage pipeline
• Up to 8 KB Flash, 256 bytes data EEPROM with ECC, 1 KB RAM
• 5 low-power modes: Wait, Low power run, Low-power wait, Active-halt with RTC, Halt
• BOR with 5 selectable thresholds, POR/PDR, programmable voltage detector
• 32 kHz and 1–16 MHz crystal oscillators, internal 16 MHz RC, internal 38 kHz RC, clock security system
• Low-power RTC with BCD calendar and alarm, digital calibration
• 4-channel DMA plus 1 memory-to-memory channel
• 12-bit ADC with temperature sensor and internal reference voltage
• 2 ultra-low-power comparators
• Two 16-bit timers, one 8-bit timer, window and independent watchdogs, beeper
• SPI, fast I²C (400 kHz), USART
• Up to 41 I/Os, up to 20 capacitive sensing channels
• SWIM debug interface, USART bootloader, 96-bit unique ID

Applications:

• Ultra-low-power battery-powered embedded systems
• Touch-sensing user interfaces

Package:

• LQFP48 (7 x 7 mm)
• UFQFPN32 (5 x 5 mm, 0.5 mm pitch)
• UFQFPN28 (7 x 7 mm, 0.5 mm pitch)
• UFQFPN20 (3 x 3 mm, 0.5 mm pitch)
• TSSOP20 (6.5 x 4.4 mm, 0.65 mm pitch)

• Operating conditions
• -Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
• -Temperature range: -40 to 85 or 125 °C
• Low power features
• -5 low-power modes: Wait, Low power run, Low-power wait, Active-halt with RTC, Halt
• -Ultra-low leakage per I/0: 50 nA
• -Fast wakeup from Halt: 5 μs
• Advanced STM8 core
• -Harvard architecture and 3-stage pipeline
• -Max freq: 16 MHz, 16 CISC MIPS peak
• -Up to 40 external interrupt sources
• Reset and supply management
• -Low-power, ultra safe BOR reset with 5 selectable thresholds
• -Ultra-low power POR/PDR
• -Programmable voltage detector (PVD)
• Clock management
• -32 kHz and 1-16 MHz crystal oscillators
• -Internal 16 MHz factory-trimmed RC
• -Internal 38 kHz low consumption RC
• -Clock security system
• Low power RTC
• -BCD calendar with alarm interrupt
• -Digital calibration with +/- 0.5 ppm accuracy
• -LSE security system
• -Auto-wakeup from Halt w/ periodic interrupt
• Memories
• -Up to 8 Kbyte of Flash program memory plus 256 byte of data EEPROM with ECC
• -Flexible write/read protection modes
• -1 Kbyte of RAM

Figure 3. STM8L151Cx LQFP48 package pinout

Figure 4. STM8L151Kx UFQFPN32 package pinout

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Figure 5. STM8L151Gx UFQFPN28 package pinout

Figure 6. STM8L151Fx UFQFPN20 package pinout

Figure 7. STM8L151Fx TSSOP20 package pinout

Table 3. Legend/abbreviation for table 4

Table 4. Low-density STM8L151x2/3 pin description

Table 4. Low-density STM8L151x2/3 pin description

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Table 4. Low-density STM8L151x2/3 pin description (continued)

Table 4. Low-density STM8L151x2/3 pin description (continued)

Table 4. Low-density STM8L151x2/3 pin description (continued)

Table 4. Low-density STM8L151x2/3 pin description (continued)

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Table 4. Low-density STM8L151x2/3 pin description (continued)

Table 4. Low-density STM8L151x2/3 pin description (continued)

Table 4. Low-density STM8L151x2/3 pin description (continued)

1. Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the function).
2. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.
3. 20-pin and 28-pin packages only.
4. In the open-drain output column, 'T' defines a true open-drain I/O (P-buffer and protection diode to V DD are not implemented).
5. 20-pin packages only.
6. 28-pin packages only
7. The PA0 pin is in input pull-up during the reset phase and after reset release.
8. High Sink LED driver capability available on PA0.

Note:

The slope control of all GPIO pins, except true open drain pins, can be programmed. By default, the slope control is limited to 2 MHz.

Stresses above the absolute maximum ratings listed in Table 14: Voltage characteristics , Table 15: Current characteristics , and Table 16: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Table 14. Voltage characteristics

1. VIN maximum must always be respected. Refer to Table 15. for maximum allowed injected current values.

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Table 15. Current characteristics

Table 16. Thermal characteristics

Table 16. Thermal characteristics

The maximum chip junction temperature (T Jmax ) must never exceed the values given in Table 17: General operating conditions on page 57 .

The maximum chip-junction temperature, T Jmax , in degree Celsius, may be calculated using the following equation:

$$T_{Jmax} = T_{Amax} + (P_{Dmax} \times \Theta_{JA})$$

Figure 42. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline

1. Drawing is not to scale.

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Table 57. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data

Table 57. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data

Figure 43. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package recommended footprint

1. Dimensions are expressed in millimeters.

The following figure gives an example of topside marking orientation versus pin 1 identifier location.

Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below.

Figure 44. LQFP48 marking example (package top view)

1. Parts marked as 'ES', 'E' or accompanied by an Engineering Sample notification letter, are not yet

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qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering Samples to run qualification activity.