STM32H743XL/G

Part: STM32H743VIT6 — STMicroelectronics (STM32H742xI/G / STM32H743xI/G family)

Type: 32-bit Arm Cortex-M7 MCU

Description: 32-bit Arm Cortex-M7 MCU with double-precision FPU running at up to 480 MHz, with up to 2 MB flash, up to 1 MB RAM and a 1.62–3.6 V supply.

Operating Conditions:

• Supply voltage (VDD): 1.62–3.6 V
• Operating temperature: -40 to 85 °C (suffix 6 version ambient); junction -40 to 125 °C
• Max CPU frequency: 480 MHz
• VDDA: 1.62–3.6 V with ADC/COMP used (2.0 V min with OPAMP used)

Absolute Maximum Ratings:

• Max supply voltage (VDDX - VSS): 4.0 V
• Max current into each VDD pin: 100 mA; total into all VDD lines: 620 mA
• Max output current sunk by any I/O (except Px_C): 20 mA
• Max junction temperature: 125 °C
• Storage temperature: -65 to +150 °C

Key Specs:

• Core: Cortex-M7 with L1 cache (16 KB data and 16 KB instruction), up to 480 MHz, 1027 DMIPS
• Memory: up to 2 MB flash, up to 1 MB RAM (including 192 KB TCM RAM, up to 864 KB user SRAM, 4 KB backup SRAM)
• Standby mode current: 2.95 μA typical (backup SRAM off, RTC/LSE on)
• ADCs: 3× 16-bit, up to 3.6 MSPS, up to 36 channels
• DACs: 2× 12-bit (1 MHz)
• I/Os: up to 168 with interrupt capability
• Input voltage on FT_xxx pins: up to Min(VDD, VDDA, VDD33USB, VBAT) + 4.0 V, limited to 6 V
• Injected current on FT_xxx/TT_xx/RST/B pins (except PA4, PA5): -5/+0 mA

Features:

• 3 power domains (D1, D2, D3) with an embedded LDO regulator and 6 voltage scaling ranges
• Dual-mode Quad-SPI up to 133 MHz; flexible memory controller (FMC) with up to 32-bit bus
• Up to 35 communication peripherals: 4× I2C, 4× USART, 4× UART, 1× LPUART, 6× SPI, 2× FDCAN, 2× USB OTG, Ethernet MAC, 2× SDMMC, SPDIFRX, SWPMI, MDIO slave, HDMI-CEC
• LCD-TFT controller up to XGA, Chrom-ART accelerator, hardware JPEG codec
• 2× operational amplifiers, 2× ultra-low-power comparators, DFSDM
• Up to 22 timers and watchdogs, including a high-resolution timer (2.1 ns)
• Security: ROP, PC-ROP, active tamper, true random number generators
• SWD and JTAG debug with a 4 KB embedded trace buffer
• 96-bit unique ID; ECOPACK2 compliant

Applications:

Package:

• LQFP100 (14 × 14 mm), LQFP144 (20 × 20 mm), LQFP176 (24 × 24 mm), LQFP208 (28 × 28 mm)
• UFBGA169 (7 × 7 mm), UFBGA176+25 (10 × 10 mm)
• TFBGA100 (8 × 8 mm), TFBGA240+25 (14 × 14 mm)

Figure 5. LQFP100 pinout

100

Unless otherwise specified, the parameters given in Table 77 are derived from tests performed under the ambient temperature, f HCLK frequency and V DDA supply voltage conditions summarized in Table 14: General operating conditions .

Table 77. ADC characteristics (1)

Table 77. ADC characteristics (1)

Table 77. ADC characteristics (1) (continued)

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Table 78. ADC accuracy (1)(2)(3)

1. Guaranteed by characterization for BGA packages, the values for LQFP packages might differ.
2. ADC DC accuracy values are measured after internal calibration.
3. The above table gives the ADC performance in 16-bit mode.
4. ADC clock frequency ≤ 36 MHz, 2 V ≤ V DDA ≤ 3.3 V, 1.6 V ≤ V REF ≤ V DDA , BOOSTEN (for I/O) = 1.
5. ENOB, SINAD, SNR and THD are specified for V DDA = V REF = 3.3 V.

Note: ADC accuracy vs. negative injection current: injecting a negative current on any analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents.

Any positive injection current within the limits specified for I INJ(PIN) and Σ I INJ(PIN) in Section 6.3.14 does not affect the ADC accuracy.

Figure 38. ADC accuracy characteristics

Figure 39. Typical connection diagram when using the ADC with FT/TT pins featuring analog switch function

1. Refer to Section 6.3.20: 16-bit ADC characteristics for the values of R AIN and C ADC .
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 50: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value downgrades conversion accuracy. To remedy this, f ADC should be reduced.
3. Refer to Table 50: I/O static characteristics for the value of I lkg .
4. Refer to Figure 15: Power supply scheme .
5. The R ADC is used to compute the minimum sampling time, refer to Table 175: Minimum sampling time vs RAIN .

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Stresses above the absolute maximum ratings listed in Table 11: Voltage characteristics , Table 12: Current characteristics , and Table 13: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and the functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 Qualification Standard, extended mission profiles are available on demand.

Table 11. Voltage characteristics (1)

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1. This formula has to be applied on power supplies related to the IO structure described by the pin definition table.
2. To sustain a voltage higher than 4V the internal pull-up/pull-down resistors must be disabled.
3. When an FT_a pin is used by an analog peripheral such as an ADC, the maximum V IN is 4 V.
4. All main power (V DD , V DDA , V DD33USB ) and ground (V SS , V SSA ) pins must always be connected to the external power supplies, in the permitted range.
5. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages.
6. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
7. A positive injection is induced by V IN >VDD while a negative injection is induced by V IN <VSS . I INJ(PIN) must never be exceeded. Refer also to Table 11: Voltage characteristics for the maximum allowed input voltage values.
8. When several inputs are submitted to a current injection, the maximum ∑ I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values).

Table 12. Current characteristics

Table 13. Thermal characteristics

Table 13. Thermal characteristics

The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max × Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark.