STM32G070

Part: STM32G070CB/KB/RB

Type: Arm® Cortex®-M0+ 32-bit MCU

Key Specs:

• Core Frequency: up to 64 MHz
• Flash Memory: 128 Kbytes
• SRAM: 36 Kbytes
• Operating Voltage: 2.0 V to 3.6 V
• Operating Temperature: -40°C to 85°C
• ADC Resolution: 12-bit
• SPI Speed: 32 Mbit/s

Features:

• Arm® 32-bit Cortex®-M0+ CPU
• CRC calculation unit
• Power-on/Power-down reset (POR/PDR)
• Low-power modes: Sleep, Stop, Standby
• VBAT supply for RTC and backup registers
• 4 to 48 MHz crystal oscillator
• 32 kHz crystal oscillator with calibration
• Internal 16 MHz RC with PLL option
• Internal 32 kHz RC oscillator (±5 %)
• Up to 59 fast I/Os, multiple 5 V-tolerant
• 7-channel DMA controller
• 12-bit, 0.4 μs ADC (up to 16 external channels)
• 11 timers (advanced motor control, general-purpose, basic, watchdogs, SysTick)
• Calendar RTC with alarm and periodic wakeup
• Two I2C-bus interfaces (Fastmode Plus, one with SMBus/PMBus and wakeup)
• Four USARTs (master/slave synchronous SPI, ISO7816, LIN, IrDA, auto baud rate, wakeup)
• Two SPIs (32 Mbit/s, 4- to 16-bit programmable bitframe, one multiplexed with I2S)
• Serial wire debug (SWD)

• Includes ST state-of-the-art patented technology
• Core: Arm® 32-bit Cortex®-M0+ CPU, frequency up to 64 MHz
• -40°C to 85°C operating temperature
• Memories
  • 128 Kbytes of flash memory with protection – 36 Kbytes of SRAM (32 Kbytes with HW parity check)
• CRC calculation unit
• Reset and power management
  • Voltage range: 2.0 V to 3.6 V
    • Power-on/Power-down reset (POR/PDR)
    • Low-power modes: Sleep, Stop, Standby
    • VBAT supply for RTC and backup registers
• Clock management
  • 4 to 48 MHz crystal oscillator
  • 32 kHz crystal oscillator with calibration
  • Internal 16 MHz RC with PLL option
  • Internal 32 kHz RC oscillator (±5 %)
• Up to 59 fast I/Os
  • All mappable on external interrupt vectors – Multiple 5 V-tolerant I/Os
• 7-channel DMA controller with flexible mapping
• 12-bit, 0.4 μs ADC (up to 16 ext. channels)
  • Up to 16-bit with hardware oversampling
  • Conversion range: 0 to 3.6V
• 11 timers: 16-bit for advanced motor control, five 16-bit general-purpose, two basic 16-bit, two watchdogs, SysTick timer
• Calendar RTC with alarm and periodic wakeup from Stop/Standby

This is information on a product in full production.

Figure 3. STM32G070KxT LQFP32 pinout

Figure 5. STM32G070RxT LQFP64 pinout

Table 10. Terms and symbols used in Pin assignment and description table

Column	Symbol	Definition
Pin name	Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name.
Pin type	S	Supply pin
	I	Input only pin
	I/O	Input / output pin
	FT	5 V tolerant I/O
	TT	3.6 V tolerant I/O
	RST	Reset pin with embedded weak pull-up resistor
I/O structure	Options for TT or FT I/Os
	_f	I/O, Fm+ capable
	_a	I/O, with analog switch function
	_c	I/O, with specific electrical characteristics
	_d	I/O, with specific electrical characteristics
Note	Upon reset, all I/Os are set as analog inputs, unless otherwise specified.
Pin functions	Alternate functions	Functions selected through GPIOx_AFR registers
	Additional functions	Functions directly selected/enabled through peripheral registers

• LQFP32
• 2
• 3
• 4
• 5
• 6
• 7

Table 11. Pin assignment and description

	Pin Number
LQFP32	LQFP48
8	12
9	13
10	14
11	15
12	16
13	17
14	18
-	-
-	-
15	19
16	20
17	21
-	22

Table 11. Pin assignment and description (continued)

• 2
• 3
• 4
• 5
• 6
• 7

Table 11. Pin assignment and description (continued)

LQFP32	LQFP48	LQFP64
-	-	1
-	-	2
-	1	3
-	2	4
2	-	-
3	3	5
-	4	6
4	6	8
5	7	9
-	8	10
-	9	11
6	10	12
-	-	13
-	-	14
-	-	15
-	-	16
7	11	17

Table 11. Pin assignment and description (continued)

• LQFP32
• 30
• 31
• 32
• 1

Table 11. Pin assignment and description (continued)

1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: - The speed should not exceed 2 MHz with a maximum load of 30 pF - These GPIOs must not be used as current sources (for example to drive a LED).

2. After an RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers as they are not reset by the system reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the RM0444 reference manual.

3. Upon reset, a pull-down resistor might be present on PA8, PB15, PD0, or PD2, depending on the voltage level on PA9/PC6, PA10/PB0, PD1, and PD3, respectively. In order to disable this resistor, strobe the UCPDx_STROBE bit of the SYSCFG_CFGR1 register during start-up sequence.

4. Pins PA9/PA10 can be remapped in place of pins PA11/PA12 (default mapping), using SYSCFG_CFGR1 register.

5. Upon reset, these pins are configured as SW debug alternate functions, and the internal pull-up on PA13 pin and the internal pull-down on PA14 pin are activated.

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STM32G070CB/KB/RB

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DS12766 Rev 3 37/100

1. Based on characterization results, not tested in production.

Symbol	Parameter	Conditions	Typ		Max(1)		Unit
		VDD	25°C	85°C	25°C	85°C
IDD(Stop 0)	Supply current in Stop 0 mode	2.4 V	110	160	150	264	μA
		3 V	110	160	150	288
		3.6 V	116	165	156	300

Stresses above the absolute maximum ratings listed in Table 17, Table 18 and Table 19 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. The device mission profile (application conditions) is compliant with the JEDEC JESD47 qualification standard.

All voltages are defined with respect to VSS.

Symbol	Ratings	Min	Max	Unit
VDD	External supply voltage	-0.3	4.0	V
VBAT	External supply voltage on VBAT pin	-0.3	4.0	V
VREF+	External voltage on VREF+ pin	-0.3	Min(VDD + 0.4, 4.0)	V
VIN(1)	Input voltage on FT_xx pins except FT_c	-0.3	VDD + 4.0(2)(3)	V
	Input voltage on FT_c pins	-0.3	5.5	V
	Input voltage on any other pin	-0.3	4.0	V

1. Refer to Table 18 for the maximum allowed injected current values.

2. To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.

3. When an FT_a pin is used by an analog peripheral such as ADC, the maximum VIN is 4 V.

Table 18. Current characteristics

Symbol	Ratings	Max	Unit
IVDD/VDDA	Current into VDD/VDDA power pin (source)(1)	100	mA
IVSS/VSSA	Current out of VSS/VSSA ground pin (sink)(2)	100	mA
IIO(PIN)	Output current sunk by any I/O and control pin except FT_f	15	mA
	Output current sunk by any FT_f pin	20	mA
	Output current sourced by any I/O and control pin	15	mA

Symbol	Ratings	Max	Unit
IVDD/VDDA	Current into VDD/VDDA power pin (source)$^{(1)}$	100	mA
IVSS/VSSA	Current out of VSS/VSSA ground pin (sink)$^{(2)}$	100	mA
IO(PIN)	Output current sunk by any I/O and control pin except FT_f	15	mA
	Output current sunk by any FT_f pin	20	mA
	Output current sourced by any I/O and control pin	15	mA

Table 18. Current characteristics (continued)

1. All main power (VDD/VDDA, VBAT) and ground (VSS/VSSA) pins must always be connected to the external power supplies, in the permitted range.

2. A positive injection is induced by VIN > VDDIO1 while a negative injection is induced by VIN < VSS. IINJ(PIN) must never be exceeded. Refer also to Table 17: Voltage characteristics for the maximum allowed input voltage values.

1. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.

2. On these I/Os, any current injection disturbs the analog performances of the device.

3. When several inputs are submitted to a current injection, the maximum ∑|IINJ(PIN)| is the absolute sum of the negative injected currents (instantaneous values).

Table 19. Thermal characteristics

Symbol	Ratings	Value	Unit
TSTG	Storage temperature range	-65 to +150	°C
TJ	Maximum junction temperature	150	°C

Symbol	Ratings	Value	Unit
TSTG	Storage temperature range	-65 to +150	°C
TJ	Maximum junction temperature	150	°C