STM32F446XV

Part: STM32F446xx from STMicroelectronics

Type: ARM Cortex-M4 32b MCU+FPU

Key Specs:

• Core Frequency: Up to 180 MHz
• Flash Memory: Up to 512 kB
• SRAM: 128 KB + 4 KB backup SRAM
• Performance: 225 DMIPS
• Supply Voltage: 1.7 V to 3.6 V
• ADC: 3x 12-bit, 2.4 MSPS (up to 24 channels, 7.2 MSPS in triple interleaved mode)
• DAC: 2x 12-bit
• I/O Ports: Up to 114

Features:

• ARM 32-bit Cortex-M4 CPU with FPU, ART Accelerator, MPU, and DSP instructions
• Flexible external memory controller with up to 16-bit data bus
• Dual mode Quad SPI interface
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management (POR, PDR, PVD, BOR, multiple oscillators)
• Low power modes (Sleep, Stop, Standby, VBAT supply for RTC, backup registers)
• General-purpose DMA: 16-stream controller with FIFOs and burst support
• Up to 17 timers (watchdog, SysTick, 16-bit, 32-bit)
• Debug mode with SWD & JTAG interfaces and Cortex-M4 Trace Macrocell
• Up to 114 I/O ports with interrupt capability, fast I/Os, and 5 V-tolerant I/Os
• Up to 20 communication interfaces (SPDIF-Rx, I2C, USART/UART, SPI, SAI, CAN, SDIO, CEC)
• Advanced connectivity: USB 2.0 full-speed/high-speed device/host/OTG controllers with on-chip PHYs and dedicated USB power rail
• 8- to 14-bit parallel camera interface up to 54 Mbytes/s
• CRC calculation unit
• RTC with subsecond accuracy and hardware calendar
• 96-bit unique ID

Applications:

• null

Package:

• LQFP64: 10x10 mm
• LQFP100: 14x14 mm
• LQFP144: 20x20 mm
• UFBGA144: 7x7x0.60 mm (R12x12 P 0.5mm), 10x10x0.6 mm (0.8 pitch)
• WLCSP81: 0.4 mm pitch

• Core: ARM® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Fl ash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories
  • 512 kB of Flash memory
  • 128 KB of SRAM
  • Flexible external memory controller with up to 16-bit data bus: SRAM,PSRAM,SDRAM/LPSDR SDRAM, Flash NOR/NAND memories
  • Dual mode Quad SPI interface
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
  • 1.7 V to 3.6 V application supply and I/Os
  • POR, PDR, PVD and BOR
  • 4-to-26 MHz crystal oscillator
  • Internal 16 MHz factory-trimmed RC (1% accuracy)
  • 32 kHz oscillator for RTC with calibration
  • Internal 32 kHz RC with calibration
• Low power
  • Sleep, Stop and Standby modes
  • VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
• 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
• 2×12-bit D/A converters
• General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
• Up to 17 timers: 2x watchdog, 1x SysTick timer and up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter
• Debug mode
  • SWD & JTAG interfaces
  • Cortex®-M4 Trace Macrocell™

• Up to 114 I/O ports with interrupt capability
  • Up to 111 fast I/Os up to 90 MHz
  • Up to 112 5 V-tolerant I/Os
• Up to 20 communication interfaces
  • SPDIF-Rx
  • Up to 4 × I2C interfaces (SMBus/PMBus)
  • Up to 4 USARTs/2 UARTs (11.25 Mbit/s, ISO7816 interface, LIN, IrDA, modem control)
  • Up to 4 SPIs (45 Mbits/s), 3 with muxed I2S for audio class accuracy via internal audio PLL or external clock
  • 2 x SAI (serial audio interface)
  • 2 × CAN (2.0B Active)
  • SDIO interface
  • Consumer electronics control (CEC) I/F
• Advanced connectivity
  • USB 2.0 full-speed device/host/OTG controller with on-chip PHY
  • USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
  • Dedicated USB power rail enabling on-chip PHYs operation throughout the entire MCU power supply range
• 8- to 14-bit parallel camera interface up to 54 Mbytes/s
• CRC calculation unit
• RTC: subsecond accuracy, hardware calendar
• 96-bit unique ID

Table 1. Device summary

Reference	Part number
STM32F446xx	STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, STM32F446ZE.

For further information contact your local STMicroelectronics sales office.

1. The above figure shows the package top view.

Figure 10. STM32F446xC/xE LQFP100 pinout

Pinout and pin description STM32F446xx

Figure 11. STM32F446xC LQFP144 pinout

1. The above figure shows the package top view.

Figure 12. STM32F446xC/xE WLCSP81 ballout

1. The above figure shows the package top view.

Figure 13. STM32F446xC/xE UFBGA144 ballout

1. The above picture shows the package top view.

Name	Abbreviation	Definition
Pin name		Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name
Pin type	S	Supply pin
Pin type	I	Input only pin
Pin type	I/O	Input / output pin
I/O structure	FT	5 V tolerant I/O
I/O structure	TTa	3.3 V tolerant I/O directly connected to ADC
I/O structure	B	Dedicated BOOT0 pin
I/O structure	RST	Bidirectional reset pin with weak pull-up resistor
Notes		Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset
Alternate functions		Functions selected through GPIOx_AFR registers
Additional functions		Functions directly selected/enabled through peripheral registers

Table 9. Legend/abbreviations used in the pinout table

Table 10. STM32F446xx pin and ball descriptions

Pin Number					Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
---	---	---	---	---	---	---	---	---	---	---
-	1	D7	A3	1	PE2	I/O	FT		TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, FMC_A23, EVENTOUT
-	2	D6	A2	2	PE3	I/O	FT		TRACED0, SAI1_SD_B, FMC_A19, EVENTOUT
-	3	A9	B2	3	PE4	I/O	FT		TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, EVENTOUT
-	4	-	B3	4	PE5	I/O	FT		TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, EVENTOUT

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
-	5	-	B4	5	PE6	I/O	FT		TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, EVENTOUT
1	6	B9	C2	6	VBAT	S
2	7	C8	A1	7	PC13	I/O	FT		EVENTOUT	TAMP_1/WKUP1
3	8	C9	B1	8	PC14-OSC32_IN(PC14)	I/O	FT		EVENTOUT	OSC32_IN
4	9	D9	C1	9	PC15-OSC32_OUT(PC15)	I/O	FT		EVENTOUT	OSC32_OUT
-	-	-	C3	10	PF0	I/O	FT		I2C2_SDA, FMC_A0, EVENTOUT
-	-	-	C4	11	PF1	I/O	FT		I2C2_SCL, FMC_A1, EVENTOUT
-	-	-	D4	12	PF2	I/O	FT		I2C2_SMBA, FMC_A2, EVENTOUT
-	-	-	E2	13	PF3	I/O	FT		FMC_A3, EVENTOUT	ADC3_IN9
-	-	-	E3	14	PF4	I/O	FT		FMC_A4, EVENTOUT	ADC3_IN14
-	-	-	E4	15	PF5	I/O	FT		FMC_A5, EVENTOUT	ADC3_IN15
-	10	-	D2	16	VSS	S
-	11	-	D3	17	VDD	S
-	-	-	F3	18	PF6	I/O	FT		TIM10_CH1, SAI1_SD_B, QUADSPI_BK1_IO3, EVENTOUT	ADC3_IN4
-	-	-	F2	19	PF7	I/O	FT		TIM11_CH1, SAI1_MCLK_B, QUADSPI_BK1_IO2, EVENTOUT	ADC3_IN5
-	-	-	G3	20	PF8	I/O	FT		SAI1_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, EVENTOUT	ADC3_IN6
-	-	-	G2	21	PF9	I/O	FT		SAI1_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, EVENTOUT	ADC3_IN7
-	-	-	G1	22	PF10	I/O	FT		DCMI_D11, EVENTOUT	ADC3_IN8
5	12	E9	D1	23	PH0-OSC_IN(PH0)	I/O	FT		EVENTOUT	OSC_IN

Pin	Name	Type	Description	Alternate functions
A1	PC13	I/O	Tamper, RTC output, LSE drive	RTC_OUT, RTC_TAMP1, RTC_TS, LSE_IN, LSE_OUT
A2	PC14	I/O	OSC32_IN	OSC32_IN
A3	PC15	I/O	OSC32_OUT	OSC32_OUT
A4	PH0	I/O	OSC_IN	OSC_IN
A5	PH1	I/O	OSC_OUT	OSC_OUT

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
6	13	F9	E1	24	PH1-OSC_OUT(PH1)	I/O	FT		EVENTOUT	OSC_OUT
7	14	D8	F1	25	NRST	I/O	RST
8	15	G9	H1	26	PC0	I/O	FT		SAI1_MCLK_B, OTG_HS_ULPI_STP, FMC_SDNWE, EVENTOUT	ADC123_IN10
9	16	-	H2	27	PC1	I/O	FT		SPI3_MOSI/I2S3_SD, SAI1_SD_A, SPI2_MOSI/I2S2_SD, EVENTOUT	ADC123_IN11
10	17	E8	H3	28	PC2	I/O	FT		SPI2_MISO, OTG_HS_ULPI_DIR, FMC_SDNE0, EVENTOUT	ADC123_IN12
11	18	F8	H4	29	PC3	I/O	FT		SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, FMC_SDCKE0, EVENTOUT	ADC123_IN13
-	19	H9	-	30	VDD	S
-	-	G8	-	-	VSS	S
12	20	F7	J1	31	VSSA	S
-	-	-	K1	-	VREF-	S
-	21	H8	L1	32	VREF+	S
13	22	-	M1	33	VDDA	S
14	23	J9	J2	34	PA0-WKUP(PA0)	I/O	FT		TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, EVENTOUT	ADC123_IN0, WKUP0/TAMP_2
15	24	G7	K2	35	PA1	I/O	FT		TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, EVENTOUT	ADC123_IN1
16	25	E7	L2	36	PA2	I/O	FT		TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, EVENTOUT	ADC123_IN2

Pin	Ball	Type	Alternate function	Description
1	A1	I/O	PC13-TAMPER-RTC	PC13, PC14 and PC15 are supplied through the power switch (which is controlled by PC12) and are not available in the BGA package.
2	B1	I/O	PC14-OSC32_IN	PC13, PC14 and PC15 are supplied through the power switch (which is controlled by PC12) and are not available in the BGA package.
3	C1	I/O	PC15-OSC32_OUT

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
17	26	E6	M2	37	PA3	I/O	FT		TIM2_CH4, TIM5_CH4, TIM9_CH2, SAI1_FS_A, USART2_RX, OTG_HS_ULPI_D0, EVENTOUT	ADC123_IN3
18	27	-	G4	38	VSS	S
		J8	H5		BYPASS_REG	I	FT
19	28	-	F4	39	VDD	S
20	29	H7	J3	40	PA4	I/O	TC		SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, EVENTOUT	ADC12_IN4, DAC_OUT1
21	30	F6	K3	41	PA5	I/O	TC		TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, OTG_HS_ULPI_CK, EVENTOUT	ADC12_IN5, DAC_OUT2
22	31	G6	L3	42	PA6	I/O	FT		TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S2_MCK, TIM13_CH1, DCMI_PIXCLK, EVENTOUT	ADC12_IN6
23	32	E5	M3	43	PA7	I/O	FT		TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, TIM14_CH1, FMC_SDNWE, EVENTOUT	ADC12_IN7
24	33	J7	J4	44	PC4	I/O	FT		I2S1_MCK, SPDIF_RX2, FMC_SDNE0, EVENTOUT	ADC12_IN14
25	34	-	K4	45	PC5	I/O	FT		USART3_RX, SPDIF_RX3, FMC_SDCKE0, EVENTOUT	ADC12_IN15

Pin name	Type	Alternate function	Description
PC13	I/O		PC13 is a general-purpose I/O pin. It is also the tamper detection pin.
PC14	I/O		PC14 is a general-purpose I/O pin. It is also the OSC32_IN pin.
PC15	I/O		PC15 is a general-purpose I/O pin. It is also the OSC32_OUT pin.
PD0	I/O		PD0 is a general-purpose I/O pin. It is also the OSC_IN pin.
PD1	I

Pin Number	Pin Number	Pin Number	Pin Number	Pin Number	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144
26	35	F5	L4	46	PB0	I/O	FT		TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI3_MOSI/I2S3_SD, UART4_CTS, OTG_HS_ULPI_D1, SDIO_D1, EVENTOUT	ADC12_IN8
27	36	H6	M4	47	PB1	I/O	FT		TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, SDIO_D2, EVENTOUT	ADC12_IN9
28	37	J6	J5	48	PB2	I/O	FT		TIM2_CH4, SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK, OTG_HS_ULPI_D4, SDIO_CK, EVENTOUT
-	-	-	M5	49	PF11	I/O	FT		SAI2_SD_B, FMC_SDNRAS, DCMI_D12, EVENTOUT
-	-	-	L5	50	PF12	I/O	FT		FMC_A6, EVENTOUT
-	-	-	-	51	VSS	S
-	-	-	G5	52	VDD	S
-	-	-	K5	53	PF13	I/O	FT		FMPI2C1_SMBA, FMC_A7, EVENTOUT
-	-	-	M6	54	PF14	I/O	FT		FMPI2C1_SCL, FMC_A8, EVENTOUT
-	-	-	L6	55	PF15	I/O	FT		FMPI2C1_SDA, FMC_A9, EVENTOUT
-	-	-	K6	56	PG0	I/O	FT		FMC_A10, EVENTOUT
-	-	-	J6	57	PG1	I/O	FT		FMC_A11, EVENTOUT
-	38	J5	M7	58	PE7	I/O	FT		TIM1_ETR, UART5_RX, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT
-	39	H5	L7	59	PE8	I/O	FT		TIM1_CH1N, UART5_TX, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT
-	40	G5	K7	60	PE9	I/O	FT		TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT

Pin name	Alternate functions	Type	Description	Notes
PC13		I/O	PC13-TAMPER-RTC, with internal pull-up and pull-down
PC14		I/O	PC14-OSC32_IN (PC14/OSC32_IN)
PC15		I/O	PC15-OSC32_OUT (PC15/OSC32_OUT)
PH0		I/O	PH0-OSC_IN (PH0/OSC_IN)
PH1		I/
Table 10. STM32F446xx pin and ball descriptions (continued)

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
-	-	-	H6	61	VSS	S
-	-	-	G6	62	VDD	S
-	41	J4	J7	63	PE10	I/O	FT		TIM1_CH2N, QUAD_SPI_BK2_IO3, FMC_D7, EVENTOUT
-	42	-	H8	64	PE11	I/O	FT		TIM1_CH2, SPI4_NSS, SAI2_SD_B, FMC_D8, EVENTOUT
-	43	-	J8	65	PE12	I/O	FT		TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, FMC_D9, EVENTOUT
-	44	-	K8	66	PE13	I/O	FT		TIM1_CH3, SPI4_MISO, SAI2_FS_B, FMC_D10, EVENTOUT
-	45	-	L8	67	PE14	I/O	FT		TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11, EVENTOUT
-	46	-	M8	68	PE15	I/O	FT		TIM1_BKIN, FMC_D12, EVENTOUT
29	47	H4	M9	69	PB10	I/O	FT		TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, SAI1_SCK_A, USART3_TX, OTG_HS_ULPI_D3, EVENTOUT
-	-	-	M10	70	PB11	I/O	FT		TIM2_CH4, I2C2_SDA, USART3_RX, SAI2_SD_A, EVENTOUT
30	48	J3	H7	71	VCAP_1	S
31	49	H3	-	-	VSS	S
32	50	J2	G7	72	VDD	S
33	51	G4	M11	73	PB12	I/O	FT		TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, SAI1_SCK_B, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, OTG_HS_ID, EVENTOUT

Pin name	Alternate function	Type	Description
PC13	PC13-TAMPER-RTC	I/O	Tamper detection pin / RTC output
PC14	PC14-OSC32_IN	I/O	32 kHz oscillator input
PC15	PC15-OSC32_OUT	I/O	32 kHz oscillator output
PH0	PH0-OSC_IN	I/O	Oscillator input
PH1	PH1-OSC_OUT	I/O	Oscillator output
PH3	PH3-BOOT0	I/O	BOOT0 pin
VDD	VDD	P	Power supply for I/Os and digital peripherals
VSS	VSS	P	Ground for I/Os and digital peripherals
VDDA	VDDA	P	Analog power supply
VSSA	VSSA	P	Analog ground
VBAT	VBAT	P	RTC, LSE and backup registers power supply
VCAP_1	VCAP_1	P	Regulator output decoupling capacitor
VCAP_2	VCAP_2	P	Regulator output decoupling capacitor
VREF+	VREF+	P	External reference voltage for ADC/DAC
VREF-	VREF-	P	External reference voltage for ADC/DAC
BOOT0	BOOT0	I	BOOT0 pin
NRST	NRST	I	External reset input
PDR_ON	PDR_ON	I	PDR_ON pin
VDD_USB	VDD_USB	P	USB power supply
VSS_USB	VSS_USB	P	USB ground
VDD_SDIO	VDD_SDIO	P	SDIO power supply
VSS_SDIO	VSS_SDIO	P	SDIO ground
VDD_ETH	VDD_ETH	P	Ethernet power supply
VSS_ETH	VSS_ETH	P	Ethernet ground

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
34	52	H2	M12	74	PB13	I/O	FT		TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, EVENTOUT	OTG_HS_VBUS
35	53	J1	L11	75	PB14	I/O	FT		TIM1_CH2N, TIM8_CH2N, SPI2_MISO, USART3_RTS, TIM12_CH1, OTG_HS_DM, EVENTOUT
36	54	G3	L12	76	PB15	I/O	FT		RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2,OTG_HS_DP, EVENTOUT
-	55	-	L9	77	PD8	I/O	FT		USART3_TX, SPDIF_RX1, FMC_D13, EVENTOUT
-	56	-	K9	78	PD9	I/O	FT		USART3_RX, FMC_D14, EVENTOUT
-	57	-	J9	79	PD10	I/O	FT		USART3_CK, FMC_D15, EVENTOUT
-	58	H1	H9	80	PD11	I/O	FT		FMPI2C1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16, EVENTOUT
-	59	G2	L10	81	PD12	I/O	FT		TIM4_CH1, FMPI2C1_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17, EVENTOUT
-	60	G1	K10	82	PD13	I/O	FT		TIM4_CH2, FMPI2C1_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT
-	-	-	G8	83	VSS	S
-	-	-	F8	84	VDD	S

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
-	61	-	K11	85	PD14	I/O	FT		TIM4_CH3, FMP I2C1_SCL, SAI2_SCK_A, FMC_D0, EVENTOUT
-	62	-	K12	86	PD15	I/O	FT		TIM4_CH4, FMP I2C1_SDA, FMC_D1, EVENTOUT
-	-	-	J12	87	PG2	I/O	FT		FMC_A12, EVENTOUT
-	-	-	J11	88	PG3	I/O	FT		FMC_A13, EVENTOUT
-	-	-	J10	89	PG4	I/O	FT		FMC_A14/FMC_BA0, EVENTOUT
-	-	-	H12	90	PG5	I/O	FT		FMC_A15/FMC_BA1, EVENTOUT
-	-	-	H11	91	PG6	I/O	FT		QUADSPI_BK1_NCS, DCMI_D12, EVENTOUT
-	-	-	H10	92	PG7	I/O	FT		USART6_CK, FMC_INT, DCMI_D13, EVENTOUT
-	-	-	G11	93	PG8	I/O	FT		SPDIF_RX2, USART6_RTS, FMC_SDCLK, EVENTOUT
-	-	-	-	94	VSS	S
-	-	-	F10	-	VDD	S
-	-	E1	C11	95	VDDUSB	S
37	63	F1	G12	96	PC6	I/O	FT		TIM3_CH1, TIM8_CH1, FMP I2C1_SCL, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, EVENTOUT
38	64	F2	F12	97	PC7	I/O	FT		TIM3_CH2, TIM8_CH2, FMP I2C1_SDA, SPI2_SCK/I2S2_CK, I2S3_MCK, SPDIF_RX1, USART6_RX, SDIO_D7, DCMI_D1, EVENTOUT
39	65	F3	F11	98	PC8	I/O	FT		TRACED0, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, SDIO_D0, DCMI_D2, EVENTOUT

LQFP100	TFBGA100	WLCSP90	Pin name	Type	Alternate function	Description
1	A1	A1	PC13	I/O	-	PC13 is supplied by VDD_RTC. This pin is an output in tamper detection mode. It is used as a backup register and can be used to store data when the device is in Standby mode.
2	B1	B1	PC14-OSC32_IN	I/O	OSC32_IN	PC14 is supplied by VDD_RTC. This pin is an input in tamper detection mode. It

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
40	66	D1	E11	99	PC9	I/O	FT		MCO2, TIM3_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, SDIO_D1, DCMI_D3, EVENTOUT
41	67	E2	E12	100	PA8	I/O	FT		MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, EVENTOUT
42	68	F4	D12	101	PA9	I/O	FT		TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, SAI1_SD_B, USART1_TX, DCMI_D0, EVENTOUT	OTG_FS_VBUS
43	69	E3	D11	102	PA10	I/O	FT		TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, EVENTOUT
44	70	C1	C12	103	PA11	I/O	FT		TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, EVENTOUT
45	71	E4	B12	104	PA12	I/O	FT		TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, EVENTOUT
46	72	D2	A12	105	PA13(JTMS-SWDIO)	I/O	FT		JTMS-SWDIO, EVENTOUT
-	73	C2	G9	106	VCAP_2	S
47	74	B1	G10	107	VSS	S
48	75	A1	F9	108	VDD	S
49	76	C3	A11	109	PA14(JTCK-SWCLK)	I/O	FT		JTCK-SWCLK, EVENTOUT
50	77	B2	A10	110	PA15(JTDI)	I/O	FT		JTDI, TIM2_CH1/TIM2_ETR, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, UART4_RTS, EVENTOUT

DocID026062 Rev 4 54/85

Pin Number LQFP64	Pin Number LQFP100	Pin Number WLCSP 81	Pin Number UFBGA144	Pin Number LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
51	78	D3	B11	111	PC10	I/O	FT		SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8, EVENTOUT
52	79	D4	B10	112	PC11	I/O	FT		SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3, DCMI_D4, EVENTOUT
53	80	A2	C10	113	PC12	I/O	FT		I2C2_SDA, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9, EVENTOUT
-	81	B3	E10	114	PD0	I/O	FT		SPI4_MISO, SPI3_MOSI/I2S3_SD, CAN1_RX, FMC_D2, EVENTOUT
-	82	C4	D10	115	PD1	I/O	FT		SPI2_NSS/I2S2_WS, CAN1_TX, FMC_D3, EVENTOUT
54	83	D5	E9	116	PD2	I/O	FT		TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, EVENTOUT
-	84	-	D9	117	PD3	I/O	FT		TRACED1, SPI2_SCK/I2S2_CK, USART2_CTS, QUADSPI_CLK, FMC_CLK, DCMI_D5, EVENTOUT
-	85	A3	C9	118	PD4	I/O	FT		USART2_RTS, FMC_NOE, EVENTOUT
-	86	-	B9	119	PD5	I/O	FT		USART2_TX, FMC_NWE, EVENTOUT
-	-	-	E7	120	VSS	S
-	-	-	F7	121	VDD	S

STM32F446xx Pinout and pin description

Pin name	Alternate function	Type	Description
PC13	-	I/O	Tamper sensing event input / RTC output / LSE output / LSE input
PC14	-	I/O	OSC32_IN: 32.768 kHz oscillator input
PC15	-	I/O	OSC32_OUT: 32.768 kHz oscillator output
PH0	-	I/O	OSC_IN: High speed oscillator input
PH1	-	I/O	OSC_OUT: High speed oscillator output
PH3	-	I/O	BOOT0
NRST	-	I	External reset input (active low)
VDD	-	P	Power supply for I/Os and digital peripherals
VSS	-	P	Ground for I/Os and digital peripherals
VDDA	-	P	Analog power supply for ADC, DAC, Reset block, PLL, and high speed oscillator
VSSA	-	P	Analog ground for ADC, DAC, Reset block, PLL, and high speed oscillator
VBAT	-	P	VBAT power supply for RTC, external 32 kHz oscillator and backup registers (when VDD is not present)
VCAP_1	-	P	Capacitor for 1.2 V regulator
VCAP_2	-	P	Capacitor for 1.2 V regulator
VREF+	-	P	External reference voltage for ADC and DAC. Connected to VDDA when unused.
VREF-	-	P	External reference voltage for ADC and DAC. Connected to VSSA when unused.

55/85 DocID026062 Rev 4

STM32F446xx Pinout and pin description

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
-	87	B4	A8	122	PD6	I/O	FT		SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, EVENTOUT
-	88	A4	A9	123	PD7	I/O	FT		USART2_CK, SPDIF_RX0, FMC_NE1, EVENTOUT
-	-	-	E8	124	PG9	I/O	FT		SPDIF_RX3, USART6_RX, QUADSPI_BK2_IO2, SAI2_FS_B, FMC_NE2/FMC_NCE3, DCMI_VSYNC, EVENTOUT
-	-	-	D8	125	PG10	I/O	FT		SAI2_SD_B, FMC_NE3, DCMI_D2, EVENTOUT
-	-	-	C8	126	PG11	I/O	FT		SPI4_SCK, SPDIF_RX0, DCMI_D3, EVENTOUT
-	-	-	B8	127	PG12	I/O	FT		SPI4_MISO, SPDIF_RX1, USART6_RTS, FMC_NE4, EVENTOUT
-	-	-	D7	128	PG13	I/O	FT		TRACED2, SPI4_MOSI, USART6_CTS, FMC_A24, EVENTOUT
-	-	-	C7	129	PG14	I/O	FT		TRACED3, SPI4_NSS, USART6_TX, QUADSPI_BK2_IO3, FMC_A25, EVENTOUT
-	-	-	-	130	VSS	S
-	-	-	F6	131	VDD	S
-	-	-	B7	132	PG15	I/O	FT		USART6_CTS, FMC_SDNCAS, DCMI_D13, EVENTOUT
55	89	A5	A7	133	PB3(JTDO/TRACESWO)	I/O	FT		JTDO/TRACESWO, TIM2_CH2, I2C2_SDA, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, EVENTOUT

57/85 DocID026062 Rev 4

STM32F446xx Pinout and pin description

Pin name	Alternate function	Type	Description
PC13	PC13-TAMPER-RTC	I/O	Tamper detection pin for RTC.
PC13	PC13-TAMPER-RTC	I/O	If the tamper detection feature is not used, the pin can be used as a general-purpose I/O.
PC13	PC13-TAMPER-RTC	I/O	This pin has a permanent pull-up and cannot be configured as open-drain.
PC13	PC13-TAMPER-RTC	I/O	It is not available in WLCSP64+25 package.
PC14	PC14-OSC32_IN	I/O	PC14 is the input pin for the 32.768 kHz oscillator.
PC14	PC14-OSC32_IN	I/O	If the 32.768 kHz oscillator is not used, the pin can be used as a general-purpose I/O.
PC14	PC14-OSC32_IN	I/O	This pin has a permanent pull-down and cannot be configured as open-drain.
PC14	PC14-OSC32_IN	I/O	It is not available in WLCSP64+25 package.
PC15	PC15-OSC32_OUT	I/O	PC15 is the output pin for the 32.768 kHz oscillator.
PC15	PC15-OSC32_OUT	I/O	If the 32.768 kHz oscillator is not used, the pin can be used as a general-purpose I/O.
PC15	PC15-OSC32_OUT	I/O	This pin has a permanent pull-down and cannot be configured as open-drain.
PC15	PC15-OSC32_OUT	I/O	It is not available in WLCSP64+25 package.
PD0	PD0-OSC_IN	I/O	PD0 is the input pin for the 4-26 MHz oscillator.
PD0	PD0-OSC_IN	I/O	If the 4-26 MHz oscillator is not used, the pin can be used as a general-purpose I/O.
PD0	PD0-OSC_IN	I/O	This pin has a permanent pull-down and cannot be configured as open-drain.
PD0	PD0-OSC_IN	I/O	It is not available in WLCSP64+25 package.
PD1	PD1-OSC_OUT	I/O	PD1 is the output pin for the 4-26 MHz oscillator.
PD1	PD1-OSC_OUT	I/O	If the 4-26 MHz oscillator is not used, the pin can be used as a general-purpose I/O.
PD1	PD1-OSC_OUT	I/O	This pin has a permanent pull-down and cannot be configured as open-drain.
PD1	PD1-OSC_OUT	I/O	It is not available in WLCSP64+25 package.
PE0	PE0-TIM4_ETR	I/O	External trigger input for TIM4.
PE0	PE0-TIM4_ETR	I/O	If the TIM4 external trigger is not used, the pin can be used as a general-purpose I/O.
PE1	PE1-TIM4_ETR	I/O	External trigger input for TIM4.
PE1	PE1-TIM4_ETR	I/O	If the TIM4 external trigger is not used, the pin can be used as a general-purpose I/O.
PE2	PE2-TIM3_ETR	I/O	External trigger input for TIM3.
PE2	PE2-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE3	PE3-TIM3_ETR	I/O	External trigger input for TIM3.
PE3	PE3-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE4	PE4-TIM3_ETR	I/O	External trigger input for TIM3.
PE4	PE4-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE5	PE5-TIM3_ETR	I/O	External trigger input for TIM3.
PE5	PE5-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE6	PE6-TIM3_ETR	I/O	External trigger input for TIM3.
PE6	PE6-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE7	PE7-TIM3_ETR	I/O	External trigger input for TIM3.
PE7	PE7-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE8	PE8-TIM3_ETR	I/O	External trigger input for TIM3.
PE8	PE8-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE9	PE9-TIM3_ETR	I/O	External trigger input for TIM3.
PE9	PE9-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE10	PE10-TIM3_ETR	I/O	External trigger input for TIM3.
PE10	PE10-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE11	PE11-TIM3_ETR	I/O	External trigger input for TIM3.
PE11	PE11-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE12	PE12-TIM3_ETR	I/O	External trigger input for TIM3.
PE12	PE12-TIM3_ETR	I/O	If the TIM3 external trigger is not used, the pin can be used as a general-purpose I/O.
PE13	PE13-TIM3_ETR	I/O	External trigger input for TIM3

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
56	90	B5	A6	134	PB4(NJTRST)	I/O	FT		NJTRST, TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, EVENTOUT
57	91	A6	B6	135	PB5	I/O	FT		TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, FMC_SDCKE1, DCMI_D10, EVENTOUT
58	92	C5	C6	136	PB6	I/O	FT		TIM4_CH1, HDMI_CEC, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1, DCMI_D5, EVENTOUT
59	93	B6	D6	137	PB7	I/O	FT		TIM4_CH2, I2C1_SDA, USART1_RX, SPDIF_RX0, FMC_NL, DCMI_VSYNC, EVENTOUT
60	94	A7	D5	138	BOOT0	I	B			VPP
61	95	C6	C5	139	PB8	I/O	FT		TIM2_CH1/TIM2_ETR, TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, SDIO_D4, DCMI_D6, EVENTOUT
62	96	C7	B5	140	PB9	I/O	FT		TIM2_CH2, TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, SAI1_FS_B, CAN1_TX, SDIO_D5, DCMI_D7, EVENTOUT
-	97	-	A5	141	PE0	I/O	FT		TIM4_ETR, SAI2_MCLK_A, FMC_NBL0, DCMI_D2, EVENTOUT
-	98	-	A4	142	PE1	I/O	FT		FMC_NBL1, DCMI_D3, EVENTOUT
63	99	B7	E6	-	VSS	S

59/85 DocID026062 Rev 4

STM32F446xx Pinout and pin description

Pin	Ball	Pin name	Type	Description
1	A1	PC13	I/O	Tamper switch input, RTC output, LSE drive.
2	B1	PC14	I/O	OSC32_IN.
3	C1	PC15	I/O	OSC32_OUT.
4	D1	PH0	I/O	OSC_IN.
5	E1	PH1	I/O	OSC_OUT.
6	F1	NRST	I	External reset input with internal pull-up.

LQFP64	LQFP100	WLCSP 81	UFBGA144	LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
-	-	B8	E5	143	PDR_ON	S
64	100	A8	F5	144	VDD	S

The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated using the following equation:

TJ max = TA max + (PD max x ΘJA)

Where:

• TA max is the maximum ambient temperature in °C,
• ΘJA is the package junction-to-ambient thermal resistance, in °C/W,
• PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/Omax),
• PINT max is the product of IDD and VDD, expressed in Watts. This is the maximum chip internal power.

PI/O max represents the maximum power dissipation on output pins where:

PI/O max = Σ (VOL × IOL) + Σ((VDD – VOH) × IOH),

taking into account the actual VOL / IOL and VOH / IOH of the I/Os at low and high level in the application.

Symbol	millimeters Min	millimeters Typ	millimeters Max	inches(1) Min	inches(1) Typ	inches(1) Max
A	-	-	1.600	-	-	0.0630
A1	0.050	-	0.150	0.0020	-	0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090	-	0.200	0.0035	-	0.0079
D	15.800	16.000	16.200	0.6220	0.6299	0.6378
D1	13.800	14.000	14.200	0.5433	0.5512	0.5591
D3	-	12.000	-	-	0.4724	-
E	15.800	16.000	16.200	0.6220	0.6299	0.6378

Reference document

JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air). Available from www.jedec.org.