STM32F446RET6

Part: STM32F446RET6 — STMicroelectronics

Type: ARM Cortex-M4 32-bit MCU with FPU

Description: 32-bit ARM Cortex-M4 MCU with FPU at up to 180 MHz (225 DMIPS), with 512 KB Flash and 128 KB SRAM (plus 4 KB backup SRAM), USB OTG HS/FS, 3 × 12-bit ADCs and up to 20 communication interfaces.

Operating Conditions:

• Supply voltage: 1.8–3.6 V (1.7 V minimum with reduced temperature range and external power supply supervisor)
• Operating temperature: -40 to +85 °C ambient (suffix-dependent; -40 to +105 °C for the extended grade). Junction temperature: -40 to +125 °C
• Maximum CPU frequency: 180 MHz

Key Specs:

• Core: Cortex-M4 with FPU, MPU, DSP instructions, ART Accelerator for 0-wait-state Flash execution, up to 180 MHz, 1.25 DMIPS/MHz
• Memory: 512 KB Flash, 128 KB SRAM (112+16 KB), 4 KB backup SRAM
• ADC: 3 × 12-bit, 2.4 MSPS each, up to 24 channels, 7.2 MSPS in triple interleaved mode
• DAC: 2 × 12-bit
• Timers: up to 17 (twelve 16-bit and two 32-bit general-purpose, 2 advanced-control, 2 basic, 2 watchdogs, SysTick)
• Communication: up to 4 I2C, 4 USART/2 UART, 4 SPI, 2 CAN 2.0B, 2 SAI, SDIO, SPDIF-Rx, HDMI-CEC, USB OTG FS and HS
• I/O: up to 114 I/O ports; the RE (LQFP64) variant has 50 GPIOs
• Internal oscillators: 16 MHz RC (1% accuracy), 32 kHz RC; 4–26 MHz crystal oscillator input

Features:

• Flexible memory controller (FMC) with up to 16-bit data bus for SRAM, PSRAM, SDRAM and NOR/NAND Flash
• Dual-mode Quad SPI interface
• LCD parallel interface (8080/6800 modes)
• 16-stream DMA controller with FIFOs and burst support
• POR, PDR, PVD and BOR supervision
• Sleep, Stop and Standby low-power modes; VBAT supply for RTC and 20 × 32-bit backup registers
• 8- to 14-bit parallel camera interface up to 54 Mbytes/s
• CRC calculation unit and 96-bit unique ID
• SWD and JTAG debug interfaces, Cortex-M4 Trace Macrocell
• Dedicated USB power rail for on-chip PHYs

Applications:

• Motor drive and application control
• Medical equipment
• Industrial applications: PLC, inverters, circuit breakers
• Printers and scanners
• Alarm systems, video intercom and HVAC
• Home audio appliances

Package:

• LQFP64 (10 × 10 mm)
• Other family packages: LQFP100 (14 × 14 mm), LQFP144 (20 × 20 mm), UFBGA144 (7 × 7 mm and 10 × 10 mm), WLCSP81

• Core: ARM ® 32-bit Cortex ® -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Fl ash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories
• -512 kB of Flash memory
• -128 KB of SRAM
• -Flexible external memory controller with up to 16-bit data bus: SRAM,PSRAM,SDRAM/LPSDR SDRAM, Flash NOR/NAND memories
• -Dual mode Quad SPI interface
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
• -1.7 V to 3.6 V application supply and I/Os
• -POR, PDR, PVD and BOR
• -4-to-26 MHz crystal oscillator
• -Internal 16 MHz factory-trimmed RC (1% accuracy)
• -32 kHz oscillator for RTC with calibration
• -Internal 32 kHz RC with calibration
• Low power
• -Sleep, Stop and Standby modes
• -VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
• 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
• 2×12-bit D/A converters
• General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
• Up to 17 timers: 2x watchdog, 1x SysTick timer and up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter
• Debug mode
• -SWD & JTAG interfaces
• -Cortex ® -M4 Trace Macrocell™

Reference	Part number
STM32F446xx	STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, STM32F446ZE.

DocID026062 Rev 4

Figure 9. STM32F446xC/xE LQFP64 pinout

Figure 10. STM32F446xC/xE LQFP100 pinout

1. The above figure shows the package top view.

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Figure 11. STM32F446xC LQFP144 pinout

1. The above figure shows the package top view.

Figure 12. STM32F446xC/xE WLCSP81 ballout

1. The above figure shows the package top view.

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Figure 13. STM32F446xC/xE UFBGA144 ballout

1. The above picture shows the package top view.

Table 9. Legend/abbreviations used in the pinout table

Name	Abbreviation	Definition
Pin name	Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name	Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name
Pin type	S	Supply pin
Pin type	I	Input only pin
Pin type	I/O	Input / output pin
I/O structure	FT	5 V tolerant I/O
I/O structure	TTa	3.3 V tolerant I/O directly connected to ADC
I/O structure	B	Dedicated BOOT0 pin
I/O structure	RST	Bidirectional reset pin with weak pull-up resistor
Notes	Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset	Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset
Alternate functions	Functions selected through GPIOx_AFR registers	Functions selected through GPIOx_AFR registers
Additional functions	Functions directly selected/enabled through peripheral registers	Functions directly selected/enabled through peripheral registers

Table 10. STM32F446xx pin and ball descriptions

Pin Number - LQFP64	Pin Number - LQFP100	Pin Number - WLCSP 81	Pin Number - UFBGA144	Pin Number - LQFP144	Pin name (function after reset)	Pin type	I/O structure Notes	Alternate functions	Additional functions
-	1	D7	A3	1	PE2	I/O	FT	TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, FMC_A23, EVENTOUT
-	2	D6	A2	2	PE3	I/O	FT	TRACED0, SAI1_SD_B, FMC_A19, EVENTOUT
-	3	A9	B2	3	PE4	I/O	FT	TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, EVENTOUT
-	4	-	B3	4	PE5	I/O	FT	TRACED2, TIM9_CH1, SPI4_MISO,SAI1_SCK_A, FMC_A21, DCMI_D6, EVENTOUT

Table 10. STM32F446xx pin and ball descriptions

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Table 10. STM32F446xx pin and ball descriptions (continued)

Pin Number - LQFP64	Pin Number - LQFP100	Pin Number - WLCSP 81	Pin Number - UFBGA144	Pin Number - LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
-	5	-	B4	5	PE6	I/O	FT		TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, EVENTOUT
1	6	B9	C2	6	VBAT	S
2	7	C8	A1	7	PC13	I/O	FT		EVENTOUT	TAMP_1/WKUP1
3	8	C9	B1	8	PC14- OSC32_IN(PC14)	I/O	FT		EVENTOUT	OSC32_IN
4	9	D9	C1	9	PC15- OSC32_OUT(PC15)	I/O	FT		EVENTOUT	OSC32_OUT
-	-	-	C3	10	PF0	I/O	FT		I2C2_SDA, FMC_A0, EVENTOUT
-	-	-	C4	11	PF1	I/O	FT		I2C2_SCL, FMC_A1, EVENTOUT
-	-	-	D4	12	PF2	I/O	FT		I2C2_SMBA, FMC_A2, EVENTOUT
-	-	-	E2	13	PF3	I/O	FT		FMC_A3, EVENTOUT	ADC3_IN9
-	-	-	E3	14	PF4	I/O	FT		FMC_A4, EVENTOUT	ADC3_IN14
-	-	-	E4	15	PF5	I/O	FT		FMC_A5, EVENTOUT	ADC3_IN15
-	10	-	D2	16	VSS	S
-	11	-	D3	17	VDD	S
-	-	-	F3	18	PF6	I/O	FT		TIM10_CH1, SAI1_SD_B, QUADSPI_BK1_IO3, EVENTOUT	ADC3_IN4
-	-	-	F2	19	PF7	I/O	FT		TIM11_CH1, SAI1_MCLK_B, QUADSPI_BK1_IO2, EVENTOUT	ADC3_IN5
-	-	-	G3	20	PF8	I/O	FT		SAI1_SCK_B,TIM13_CH1, QUADSPI_BK1_IO0, EVENTOUT	ADC3_IN6
-	-	-	G2	21	PF9	I/O	FT		SAI1_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, EVENTOUT	ADC3_IN7
-	-	-	G1	22	PF10	I/O	FT		DCMI_D11, EVENTOUT	ADC3_IN8
5	12	E9	D1	23	PH0-OSC_IN(PH0)	I/O	FT		EVENTOUT	OSC_IN

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin Number - LQFP64	Pin Number - LQFP100	Pin Number - WLCSP 81	Pin Number - UFBGA144	Pin Number - LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
6	13	F9	E1	24	PH1- OSC_OUT(PH1)	I/O	FT		EVENTOUT	OSC_OUT
7	14	D8	F1	25	NRST	I/O	RS T
8	15	G9	H1	26	PC0	I/O	FT		SAI1_MCLK_B, OTG_HS_ULPI_STP, FMC_SDNWE, EVENTOUT	ADC123_IN10
9	16	-	H2	27	PC1	I/O	FT		SPI3_MOSI/I2S3_SD, SAI1_SD_A, SPI2_MOSI/I2S2_SD, EVENTOUT	ADC123_IN11
10	17	E8	H3	28	PC2	I/O	FT		SPI2_MISO, OTG_HS_ULPI_DIR, FMC_SDNE0, EVENTOUT	ADC123_IN12
11	18	F8	H4	29	PC3	I/O	FT		SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, FMC_SDCKE0, EVENTOUT	ADC123_IN13
-	19	H9	-	30	VDD	S
-	-	G8	-	-	VSS	S
12	20	F7	J1	31	VSSA	S
-	-	-	K1	-	VREF-	S
-	21	H8	L1	32	VREF+	S
13	22	-	M1	33	VDDA	S
14	23	J9	J2	34	PA0-WKUP(PA0)	I/O	FT		TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, EVENTOUT	ADC123_IN0, WKUP0/TAMP_2
15	24	G7	K2	35	PA1	I/O	FT		TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, EVENTOUT	ADC123_IN1
16	25	E7	L2	36	PA2	I/O	FT		TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, EVENTOUT	ADC123_IN2

Table 10. STM32F446xx pin and ball descriptions (continued)

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Table 10. STM32F446xx pin and ball descriptions (continued)

Pin Number - LQFP64	Pin Number - LQFP100	Pin Number - WLCSP 81	Pin Number - UFBGA144	Pin Number - LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
17	26	E6	M2	37	PA3	I/O	FT		TIM2_CH4, TIM5_CH4, TIM9_CH2, SAI1_FS_A, USART2_RX, OTG_HS_ULPI_D0, EVENTOUT	ADC123_IN3
18	27	-	G4	38	VSS	S
-	-	J8	H5	-	BYPASS_REG	I	FT
19	28	-	F4	39	VDD	S
20	29	H7	J3	40	PA4	I/O	TC		SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, EVENTOUT	ADC12_IN4, DAC_OUT1
21	30	F6	K3	41	PA5	I/O	TC		TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, OTG_HS_ULPI_CK, EVENTOUT	ADC12_IN5, DAC_OUT2
22	31	G6	L3	42	PA6	I/O	FT		TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S2_MCK, TIM13_CH1, DCMI_PIXCLK, EVENTOUT	ADC12_IN6
23	32	E5	M3	43	PA7	I/O	FT		TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, TIM14_CH1, FMC_SDNWE, EVENTOUT	ADC12_IN7
24	33	J7	J4	44	PC4	I/O	FT		I2S1_MCK, SPDIF_RX2, FMC_SDNE0, EVENTOUT	ADC12_IN14
25	34	-	K4	45	PC5	I/O	FT		USART3_RX,SPDIF_RX3, FMC_SDCKE0, EVENTOUT	ADC12_IN15

Table 10. STM32F446xx pin and ball descriptions (continued)

Table 10. STM32F446xx pin and ball descriptions (continued)

Pin Number - LQFP64	Pin Number - LQFP100	Pin Number - WLCSP 81	Pin Number - UFBGA144	Pin Number - LQFP144	Pin name (function after reset)	Pin type	I/O structure	Notes	Alternate functions	Additional functions
26	35	F5	L4	46	PB0	I/O	FT		TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI3_MOSI/I2S3_SD, UART4_CTS, OTG_HS_ULPI_D1, SDIO_D1, EVENTOUT	ADC12_IN8
27	36	H6	M4	47	PB1	I/O	FT		TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, SDIO_D2, EVENTOUT	ADC12_IN9
28	37	J6	J5	48	PB2	I/O	FT		TIM2_CH4, SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK, OTG_HS_ULPI_D4, SDIO_CK, EVENTOUT
-	-	-	M5	49	PF11	I/O	FT		SAI2_SD_B, FMC_SDNRAS, DCMI_D12, EVENTOUT
-	-	-	L5	50	PF12	I/O	FT		FMC_A6, EVENTOUT
-	-	-	-	51	VSS	S
-	-	-	G5	52	VDD	S
-	-	-	K5	53	PF13	I/O	FT		FMPI2C1_SMBA, FMC_A7, EVENTOUT
-	-	-	M6	54	PF14	I/O	FT		FMPI2C1_SCL, FMC_A8, EVENTOUT
-	-	-	L6	55	PF15	I/O	FT		FMPI2C1_SDA, FMC_A9, EVENTOUT
-	-	-	K6	56	PG0	I/O	FT		FMC_A10, EVENTOUT
-	-	-	J6	57	PG1	I/O	FT		FMC_A11, EVENTOUT
-	38	J5	M7	58	PE7	I/O	FT		TIM1_ETR, UART5_RX, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT
-	39	H5	L7	59	PE8	I/O	FT		TIM1_CH1N, UART5_TX, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT
-	40	G5	K7	60	PE9	I/O	FT		TIM1_CH1, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT

Table 10. STM32F446xx pin and ball descriptions (continued)

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The maximum chip-junction temperature, T J max, in degrees Celsius, may be calculated using the following equation:

T J max = T A max + (P D max x Θ JA )

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com . ECOPACK ® is an ST trademark.

Figure 15. LQFP64-10x10 mm 64 pin low-profile quad flat package outline

1. Drawing is not to scale

83

Table 13. LQFP64 - 10 x 10 mm low-profile quad flat package mechanical data

Symbol	millimeters - Min	millimeters - Typ	millimeters - Max	inches (1) - Min	inches (1) - Typ	inches (1) - Max
A	-	-	1.600	-	-	0.0630
A1	0.050	-	0.150	0.0020	-	0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090	-	0.200	0.0035	-	0.0079
D	11.800	12.000	12.200	0.4646	0.4724	0.4803
D1	9.800	10.000	10.200	0.3858	0.3937	0.4016
D3	-	7.500	-	-	0.2953	-
E	11.800	12.000	12.200	0.4646	0.4724	0.4803
E1	9.800	10.000	10.200	0.3858	0.3937	0.4016
E3	-	7.500	-	-	0.2953	-
e	-	0.500	-	-	0.0197	-
L	0.450	0.600	0.750	0.0177	0.0236	0.0295
L1	-	1.000	-	-	0.0394	-
K	0°	3.5°	7°	0°	3.5°	7°
ccc	-	-	0.080	-	-	0.0031

Table 13. LQFP64 - 10 x 10 mm low-profile quad flat package mechanical data

Figure 16. LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline

Table 14. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical data

Symbol	millimeters - Min	millimeters - Typ	millimeters - Max	inches (1) - Min	inches (1) - Typ	inches (1) - Max
A	-	-	1.600	-	-	0.0630
A1	0.050	-	0.150	0.0020	-	0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090	-	0.200	0.0035	-	0.0079
D	15.800	16.000	16.200	0.6220	0.6299	0.6378
D1	13.800	14.000	14.200	0.5433	0.5512	0.5591
D3	-	12.000	-	-	0.4724	-
E	15.800	16.000	16.200	0.6220	0.6299	0.6378

Table 14. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical data

83

Table 14. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical data (continued)

Symbol	millimeters - Min	millimeters - Typ	millimeters - Max	inches (1) - Min	inches (1) - Typ	inches (1) - Max
E1	13.800	14.000	14.200	0.5433	0.5512	0.5591
E3	-	12.000	-	-	0.4724	-
e	-	0.500	-	-	0.0197	-
L	0.450	0.600	0.750	0.0177	0.0236	0.0295
L1	-	1.000	-	-	0.0394	-
k	0°	3.5°	7°	0°	3.5°	7°
ccc	-	-	0.080	-	-	0.0031

1. Values in inches are converted from mm and rounded to 4 decimal digits.
2. Dimensions are expressed in millimeters.
3. Drawing is not to scale.

Figure 17. LQPF100 recommended footprint

Figure 18. LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package outline

1. Drawing is not to scale.

83

Table 15. LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package mechanical data

Symbol	millimeters - Min	millimeters - Typ	millimeters - Max	inches (1) - Min	inches (1) - Typ	inches (1) - Max
A	-	-	1.600	-	-	0.0630
A1	0.050	-	0.150	0.0020	-	0.0059
A2	1.350	1.400	1.450	0.0531	0.0551	0.0571
b	0.170	0.220	0.270	0.0067	0.0087	0.0106
c	0.090	-	0.200	0.0035	-	0.0079
D	21.800	22.000	22.200	0.8583	0.8661	0.874
D1	19.800	20.000	20.200	0.7795	0.7874	0.7953
D3	-	17.500	-	-	0.689	-
E	21.800	22.000	22.200	0.8583	0.8661	0.8740
E1	19.800	20.000	20.200	0.7795	0.7874	0.7953
E3	-	17.500	-	-	0.6890	-
e	-	0.500	-	-	0.0197	-
L	0.450	0.600	0.750	0.0177	0.0236	0.0295
L1	-	1.000	-	-	0.0394	-
k	0°	3.5°	7°	0°	3.5°	7°
ccc	-	-	0.080	-	-	0.0031

Table 15. LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package mechanical data

Figure 19. LQFP144 recommended footprint

1. Dimensions are expressed in millimeters.

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Figure 20. UFBGA144, 7x7x0.60 R12x12 P 0.5mm, package outline

1. Dimensions are expressed in millimeters.

Table 16. UFBGA144, 7 x 7 x 0.60 R12x12 P 0.5 mm, 144-pin package mechanical data

Symbol	millimeters - Typ	millimeters - Min	millimeters - Max	inches (1) - Typ	inches (1) - Min	inches (1) - Max
A	0.53	0.46	0.6	0.0209	0.0181	0.0236
A1	0.08	0.05	0.11	0.0031	0.002	0.0043
A2	0.45	0.4	0.5	0.0177	0.0157	0.0197
A3	0.13	0.08	0.18	0.0051	0.0031	0.0071
A4	0.32	0.27	0.37	0.0126	0.0106	0.0146
b	0.25	0.2	0.3	0.0098	0.0079	0.0118
D	7	6.95	7.05	0.2756	0.2736	0.2776
D1	5.5	5.45	5.55	0.2165	0.2146	0.2185
E	7	6.95	7.05	0.2756	0.2736	0.2776
E1	5.5	5.45	5.55	0.2165	0.2146	0.2185
e	0.5			0.0197
F	0.75	0.7	0.8	0.0295	0.0276	0.0315
ddd			0.1			0.0039

Table 16. UFBGA144, 7 x 7 x 0.60 R12x12 P 0.5 mm, 144-pin package mechanical data