SPC584Bx

Part: SPC584Bx — STMicroelectronics

Type: 32-bit Power Architecture Microcontroller

Description: Automotive ASIL-B 32-bit e200z420 Power Architecture MCU operating up to 120 MHz with up to 2 MB code Flash, 128 KB SRAM, and Ethernet/CAN-FD networking.

Operating Conditions:

• Supply voltage: 3.3 V, 5 V external power supplies
• Operating junction temperature: -40 to 150 °C
• Max CPU frequency: 120 MHz

Absolute Maximum Ratings:

• Max core voltage (VDD_LV): 1.4 V
• Max I/O supply voltage (VDD_HV): 6.0 V
• Max ADC supply voltage (VDD_HV_ADV): 6.0 V
• Max SAR ADC voltage reference (VDD_HV_ADR_S): 6.0 V
• Max DC injection current per pad: -5 to 5 mA
• Non-operating storage temperature range: -55 to 125 °C
• Non-operating temperature during passive lifetime: 150 °C

Key Specs:

• Maximum core clock frequency: 120 MHz
• Flash memory: Up to 2048 KB code flash + 64 KB data flash
• SRAM: 128 KB system SRAM + 64 KB local data RAM
• ADC channels: Two 12-bit SAR ADCs, one 12-bit supervisor SAR ADC, one 10-bit standby SAR ADC
• Ethernet: 1 MAC 10/100 Mbps compliant with IEEE 802.3-2008 (AVB, VLAN support)
• CAN interfaces: 8 MCAN modules with ISO CAN-FD support
• LIN/UART interfaces: 14 LINFlexD modules
• SPI interfaces: 7 DSPI modules

Features:

• High-performance e200z420 32-bit Power Architecture CPU core with VLE
• Hardware Security Module (HSM) with embedded e200z0 core and cryptographic co-processor
• ISO 26262 ASIL-B safety compliance with Fault Collection and Control Unit (FCCU)
• Enhanced Modular IO Subsystem (eMIOS) with up to 64 timed I/O channels
• Body Cross Triggering Unit (BCTU) for synchronized ADC conversions
• 32-channel direct memory access controller (eDMA)
• Dual phase-locked loops (PLLs) with frequency modulation
• AEC-Q100 qualified

Applications:

• Automotive ASIL-B body and gateway control
• Automotive domain control and networking

Package:

• eTQFP64 (10 x 10 x 1.0 mm)
• eTQFP100 (14 x 14 x 1.0 mm)
• eTQFP144 (20 x 20 x 1.0 mm)
• eLQFP176 (24 x 24 x 1.4 mm)

• AEC-Q100 qualified

• High performance e200z420

• -32-bit Power Architecture technology CPU

• -Core frequency as high as 120 MHz

• -Variable Length Encoding (VLE)

• 2112 KB (2048 KB code flash + 64 KB data flash) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation

• 176 KB HSM dedicated flash memory (144 KB code + 32 KB data)

• 128 KB on-chip general-purpose SRAM (in addition to 64 KB core local data RAM

• Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters with end-to-end ECC

• Multi-channel direct memory access controller (eDMA) with 64 channels

• 1 interrupt controller (INTC)

• Comprehensive new generation ASIL-B safety concept

• -ASIL-B of ISO 26262

• -FCCU for collection and reaction to failure notifications

• Boot Assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART

• Junction temperature range -40 °C to 150 °C

Table 1. Device summary

Table 1. Device summary

The following table provides input DC electrical characteristics, as described in Figure 3 .

Figure 3. I/O input electrical characteristics

Table 4 describes the maximum ratings for the device. Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Stress beyond the listed maxima, even momentarily, may affect device reliability or cause permanent damage to the device.

Table 4. Absolute maximum ratings

Table 4. Absolute maximum ratings

16

Table 4. Absolute maximum ratings (continued)

1. VDD_LV : allowed 1.335 V - 1.400 V for 60 seconds cumulative time at the given temperature profile. Remaining time allowed 1.260 V - 1.335 V for 10 hours cumulative time at the given temperature profile. Remaining time as defined in Section 4.3: Operating conditions .
2. VDD_HV : allowed 5.5 V - 6.0 V for 60 seconds cumulative time at the given temperature profile, for 10 hours cumulative time with the device in reset at the given temperature profile. Remaining time as defined in Section 4.3: Operating conditions .
3. The maximum input voltage on an I/O pin tracks with the associated I/O supply maximum. For the injection current condition on a pin, the voltage will be equal to the supply plus the voltage drop across the internal ESD diode from I/O pin to supply. The diode voltage varies greatly across process and temperature, but a value of 0.3 V can be used for nominal calculations.
4. Relative value can be exceeded if design measures are taken to ensure injection current limitation (parameter IINJ).
5. This limitation applies to pads with digital input buffer enabled. If the digital input buffer is disabled, there are no maximum limits to the transition time.
6. The limits for the sum of all normal and injected currents on all pads within the same supply segment can be found in Section 4.8.3: I/O pad current specifications .
7. 175 °C are allowed for limited time. Mission profile with passive lifetime temperature >150 °C have to be evaluated by ST to confirm that are granted by product qualification.
8. Solder profile per IPC/JEDEC J-STD-020D.
9. Moisture sensitivity per JDEC test method A112.

The following tables describe the thermal characteristics of the device. The parameters in this chapter have been evaluated by considering the device consumption configuration reported in the Section 4.7: Device consumption .

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.

The following table lists the case numbers for SPC584Bx.

Table 60. Package case numbers