PIC16F877A

Part: PIC16F877A (PIC16F873A/874A/876A/877A family) — Microchip Technology

Type: 8-bit Enhanced Flash Microcontroller (PIC16 mid-range RISC)

Description: 8-bit Flash MCU with up to 20 MHz clock, 8K x 14-word Flash program memory, 368 bytes RAM, 256 bytes EEPROM, 10-bit 8-channel ADC and a 2.0–5.5 V supply range.

Operating Conditions:

• Supply voltage: 2.0–5.5 V
• Operating temperature: -40 to +85 °C (industrial; extended grade -40 to +125 °C is ordering-grade dependent)
• Clock: DC–20 MHz (200 ns instruction cycle)

Absolute Maximum Ratings:

• Max supply voltage (VDD with respect to VSS): -0.3 to +7.5 V
• Max current into VDD pin: 250 mA
• Max current out of VSS pin: 300 mA
• Max current per I/O pin: 25 mA sunk or sourced
• Storage temperature: -65 to +150 °C
• Ambient temperature under bias: -55 to +125 °C
• Total power dissipation: 1.0 W

Key Specs:

• Program memory: 8K x 14-word Flash (PIC16F877A/876A), 4K words (PIC16F873A/874A)
• Data RAM: 368 bytes (876A/877A), 192 bytes (873A/874A)
• Data EEPROM: 256 bytes (876A/877A), 128 bytes (873A/874A)
• I/O pins: 33 on the 40/44-pin devices (874A/877A), 22 on the 28-pin devices (873A/876A)
• ADC: 10-bit, 8 channels on 40/44-pin devices, 5 channels on 28-pin devices
• Timers: two 8-bit and one 16-bit; 2 CCP modules (16-bit capture and compare, 10-bit PWM)
• Flash endurance: 100,000 erase/write cycles typical; EEPROM endurance 1,000,000 cycles typical, retention over 40 years
• Voltage on MCLR: 0 to +14 V; voltage on RA4: 0 to +8.5 V (absolute maximum)

Features:

• 35 single-word instructions; all single-cycle except branches
• MSSP with SPI (master) and I²C (master/slave)
• USART/SCI with 9-bit address detection
• Parallel Slave Port (40/44-pin devices only)
• Two analog comparators with programmable on-chip voltage reference
• Brown-out Reset, Power-on Reset, Watchdog Timer with its own RC oscillator
• Self-reprogrammable Flash, ICSP via two pins, In-Circuit Debug, programmable code protection
• Sleep power-saving mode

Applications:

• General-purpose embedded control

Package:

• 40-pin PDIP (PIC16F874A/877A)
• 44-pin PLCC
• 44-pin TQFP
• 44-pin QFN
• 28-pin PDIP, SOIC, SSOP and QFN (PIC16F873A/876A)

• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler, can be incremented during Sleep via external crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
• Two Capture, Compare, PWM modules
• -Capture is 16-bit, max. resolution is 12.5 ns
• -Compare is 16-bit, max. resolution is 200 ns
• -PWM max. resolution is 10-bit
• Synchronous Serial Port (SSP) with SPI (Master mode) and I 2 C™ (Master/Slave)
• Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with 9-bit address detection
• Parallel Slave Port (PSP) - 8 bits wide with external RD, WR and CS controls (40/44-pin only)
• Brown-out detection circuitry for Brown-out Reset (BOR)

In Capture mode, the RC2/CCP1 pin should be configured as an input by setting the TRISC<2> bit.

Note: If the RC2/CCP1 pin is configured as an output, a write to the port can cause a Capture condition.

PIC16LF873A/874A/876A/877A (Industrial)

Legend: Rows with standard voltage device data only are shaded for improved readability.

• † Data in 'Typ' column is at 5V, 25°C, unless otherwise stated. These parameters are for design guidance only and are not tested.

Note

• 1: This is the limit to which VDD can be lowered without losing RAM data.
• 2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading, switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption.

The test conditions for all IDD measurements in active operation mode are:

OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD; MCLR = VDD; WDT enabled/disabled as specified.

• 3: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD and VSS.
• 4: For RC osc configuration, current through REXT is not included. The current through the resistor can be estimated by the formula Ir = VDD/2REXT (mA) with REXT in k .
• 5: Timer1 oscillator (when enabled) adds approximately 20 A to the specification. This value is from characterization and is for design guidance only. This is not tested.
• 6: The current is the additional current consumed when this peripheral is enabled. This current should be added to the base IDD or IPD measurement.
• 7: When BOR is enabled, the device will operate correctly until the VBOR voltage trip point is reached.

Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD - IOH} + {(VDD - VOH) x IOH} + (VOl x IOL)

2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up. Thus, a series resistor of 50-100 should be used when applying a 'low' level to the MCLR pin rather than pulling this pin directly to VSS.

• 3: PORTD and PORTE are not implemented on PIC16F873A/876A devices.

† NOTICE: Stresses above those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

FIGURE 17-1: PIC16F87XA VOLTAGE-FREQUENCY GRAPH (INDUSTRIAL, EXTENDED)

FIGURE 17-2: PIC16LF87XA VOLTAGE-FREQUENCY GRAPH (INDUSTRIAL)