PCM1865DBT
The PCM1865DBT is an electronic component from Texas Instruments. View the full PCM1865DBT datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Integrated Circuits (ICs)
Overview
The PCM186x family (PCM1860, PCM1861, PCM1862, PCM1863, PCM1864, and PCM1865) of audio front-end devices take a new approach to audio-function integration to ease compliance with European Ecodesign legislation, while enabling highperformance end products at reduced cost. The PCM186x support single-supply operation at 3.3 V, and offer an integrated programable gain amplifier (PGA) in a small package; this configuration makes it feasible to implement smaller and smarter products at a reduced cost.
The PCM186x audio front end supports single-ended input levels from small-mV microphone inputs to 2.1VRMS line inputs, without external resistor dividers. The front-end mixer (MIX), multiplexer (MUX), and PGA also support differential (Diff), pseudodifferential, and single-ended (SE) inputs, making these devices an ideal interface for products that require interference suppression. The PCM186x integrate many system-level functions that assist or replace some DSP functions.
An integrated band-gap voltage reference provides excellent PSRR, so that a dedicated analog 3.3-V rail may not be required.
Features
- 1 · High SNR Performance:
- -110-dB SNR (PCM1861/63/65)
- -103-dB SNR (PCM1860/62/64)
- ADC Sample Rate (fS) = 8 kHz to 192 kHz
- Up To Four Independent ADC Channels Available
- Single-Ended, 2.1-VRMS Full-Scale (FS) Input
- Differential, 4.2-VRMS FS Input
- Hardware (HW) Control: PCM1860/61
- Software (SW) Control (I 2 C or SPI): PCM1862/63/64/65
- Support for Up To Four Digital Microphones (SW-Controlled Devices)
- Programmable Gain Amplifier (PGA):
- -Fixed Gain: 0 dB, 12 dB, 32 dB (PCM1860/61)
- -SW-Controlled Gain: -12 dB to +32 dB (PCM1862/63/64/65)
- Integrated High-Performance Audio PLL
- Single 3.3-V Power-Supply Operation
- Power Dissipation at 3.3 V:
- -< 85 mW (PCM1860/61/62/63)
- -< 145 mW (PCM1864/65)
- Energysense Audio Content Detector for Auto System Wakeup and Sleep
- Master or Slave Audio Interface
- Automatic PGA Clipping Suppression Control
- PCB-Footprint Compatibility Across All Devices
Applications
- Home Theater and TV
- Voice Controlled Devices
- Bluetooth ® Speaker
- Microphone Array Processors
Pin Configuration
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NO. 1 | NAME VINL2/VIN1M | Analog input | Analog input 2, L-channel (or differential M input for input 1) |
| 2 | VINR2/VIN2M | Analog input | Analog input 2, R-channel (or differential M input for input 2) |
| 3 | VINL1/VIN1P | Analog input | Analog input 1, L-channel (or differential P input for input 1) |
| 4 | VINR1/VIN2P | Analog input | Analog input 1, R-channel (or differential P input for input 2) |
| 5 | Mic Bias | Power | Microphone bias output |
| 6 | VREF | Power | Reference voltage output decoupling point (typically, 0.5 AVDD). Connect 1-μF capacitor from this pin to AGND. |
| 7 | AGND | Power | Analog ground |
| 8 | AVDD | Power | Analog power supply (typically, 3.3 V). Connect 0.1-μF and 10-μF capacitors from this pin to AGND. |
| 9 | XO | Digital output | Crystal oscillator output |
| 10 | XI | Digital input | Crystal oscillator input or master clock input (1.8-V CMOS signal) |
| 11 | LDO | Power | Internal low-dropout regulator (LDO) decoupling output, or external 1.8-V input to bypass LDO. Connect 0.1-μF and 10-μF capacitors from this pin to DGND. |
| 12 | DGND | Power | Digital ground |
| 13 | DVDD | Power | Digital power supply (typically, 3.3 V). Connect 0.1-μF and 10-μF capacitors from this pin to DGND. |
| 14 | IOVDD | Power | Power supply for I/O voltages (typically, 3.3 V or 1.8 V). |
| 15 | SCKI | Digital input | CMOS level (3.3 V) master clock input |
| 16 | LRCK | Digital input/output | Audio data word clock (left right clock) input/output (1) |
| 17 | BCK | Digital input/output | Audio data bit clock input/output (1) |
| 18 | DOUT | Digital output | Audio data digital output |
| 19 | INT | Analog output | Interrupt output (for analog input detection). Pull high for active mode, pull low for idle. |
| 20 | MD6 | Analog input | Analog MUX and gain selection using MD6, MD5, and MD2 pins, respectively: 000: SE Ch 1 (VINL1 and VINR1) 001: SE Ch 2 (VINL2 and VINR2) 010: SE Ch 3 (VINL3 and VINR3) 011: SE Ch 4 (VINL4 and VINR4) 100: SE Ch 4 with 12-dB gain 101: SE Ch 4 with 32-dB gain 110: Diff Ch 1 (VIN1P and VIN1M, VIN2P and VIN2M) 111: Diff Ch 2 (VIN3P and VIN3M, VIN4P and VIN4M) with 12-dB gain |
| 21 | MD5 | Analog input | Analog MUX and gain selection (see MD6 pin for description) |
| 22 | MD4 | Analog input | Audio format: high = left-justified, low = I 2 S |
| 23 | MD2 | Analog input | Analog MUX and gain selection (see MD6 pin for description) |
| 24 | MD3 | Digital Input | Filter select: 0 = FIR decimation filter, 1 = IIR low latency decimation filter |
| 25 | MD1 | Analog input | Audio interface mode selection using MD1 and MD0 pins, respectively: 00: Slave mode, 256 × f S , 384 × f S , 512 × f S autodetect 01: Master mode (512 × f S ) 10: Master mode (384 × f S ) 11: Master mode (256 × f S ) |
| 26 | MD0 | Analog input | Audio interface mode selection (see MD1 pin for description) |
| 27 | VINL4/VIN4M | Analog input | Analog input 4, L-channel (or differential M input for input 4) |
| 28 | VINR4/VIN3M | Analog input | Analog input 4, R-channel (or differential M input for input 3) |
| 29 | VINL3/VIN4P | Analog input | Analog input 3, L-channel (or differential P input for input 4) |
| 30 | VINR3/VIN3P | Analog input | Analog input 3, R-channel (or differential P input for input 3) |
Electrical Characteristics
all specifications at TA = 25°C, AVDD = 3.3 V, DVDD = 3.3 V, IOVDD = 3.3 V, master mode, single-speed mode, fS = 48 kHz, system clock = 256 × fS, and 24-bit data (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP MAX | UNIT | ||
|---|---|---|---|---|---|---|
| PRIMARY PGA AND ADC | PRIMARY PGA AND ADC | PRIMARY PGA AND ADC | PRIMARY PGA AND ADC | PRIMARY PGA AND ADC | PRIMARY PGA AND ADC | PRIMARY PGA AND ADC |
| Input channel differential input | signal-to-noise ratio, 0-dB | gain, -60-dB input signal, at Diff input PCM1860 PCM1862 PCM1864 | 97 | 103 | dB | |
| master mode | PCM1861 PCM1863 PCM1865 | 97 | 110 | dB | ||
| 32-dB PGA gain (1) , -86-dB input signal, master mode at Diff input | 32-dB PGA gain (1) , -86-dB input signal, master mode at Diff input | 85 | 90 | dB | ||
| Input channel THD+N, differential input | 0-dB PGA gain, -1-dB input signal, master mode at Diff input | 0-dB PGA gain, -1-dB input signal, master mode at Diff input | -85 | -93 | dB | |
| Input channel THD+N, differential input | 32-dB PGA gain, -33-dB input signal, master mode at Diff input | 32-dB PGA gain, -33-dB input signal, master mode at Diff input | -76 | -84 | dB | |
| L channel to R channel separation line input | 0-dB PGA gain, -1-dB input signal, master mode | 0-dB PGA gain, -1-dB input signal, master mode | -105 | dB | ||
| L channel to R channel separation mic input | 20-dB PGA gain, -1-dB input signal, master mode | 20-dB PGA gain, -1-dB input signal, master mode | -105 | dB | ||
| L1 channel to L2 channel separation line input | 0-dB PGA gain, -1-dB input signal, master mode | 0-dB PGA gain, -1-dB input signal, master mode | -105 | dB | ||
| R1 channel to R2 channel separation line input | 0-dB PGA gain, -1-dB input signal, master mode | 0-dB PGA gain, -1-dB input signal, master mode | -105 | dB | ||
| L1 channel to L2 channel separation mic input | 20-dB PGA gain, -1-dB input signal, master mode | 20-dB PGA gain, -1-dB input signal, master mode | -105 | dB | ||
| R1 channel to R2 channel separation mic input | 20-dB PGA gain, -1-dB input signal, master mode | 20-dB PGA gain, -1-dB input signal, master mode | -105 | dB | ||
| Range of analog PGA | -12 to +12 dB (1-dB step), 20 dB, and 32 dB | -12 to +12 dB (1-dB step), 20 dB, and 32 dB | -12 (2) | 32 | dB | |
| Accuracy | of PGA + ADC | of PGA + ADC | 0.5 | dB | ||
| Matching between PGA + ADCs chip | on- | on- | 0.05 | dB | ||
| Single-ended mode | Single-ended mode | 2.1 | V RMS | |||
| Full-scale voltage input | Differential mode (2.1 | V RMS per pin) | 4.2 | V RMS | ||
| Input channel signal-to-noise ratio, single-ended input | 0-dB PGA gain, -60-dB input signal, master mode at SE input | PCM1860 PCM1862 PCM1864 | 103 | dB | ||
| 0-dB PGA gain, -60-dB input signal, master mode at SE input | PCM1861 PCM1863 PCM1865 | 106 | dB | |||
| 32-dB PGA gain, -92-dB input signal, master mode at SE input | 32-dB PGA gain, -92-dB input signal, master mode at SE input | 75 | dB | |||
| Input channel THD+N, single-ended input | 0-dB PGA gain, -1-dB input signal, master mode at SE input | 0-dB PGA gain, -1-dB input signal, master mode at SE input | 87 | dB | ||
| Input channel THD+N, single-ended input | 32-dB PGA gain, -33-dB input signal, master mode at SE input | 32-dB PGA gain, -33-dB input signal, master mode at SE input | 68 | dB | ||
| pin | PCM1864 and PCM1865 | PCM1864 and PCM1865 | 10 | |||
| Input impedance per analog input | PCM1860, PCM1861, PCM1862, and PCM1863 | PCM1860, PCM1861, PCM1862, and PCM1863 | 20 | k Ω | ||
| CMRR Common-mode rejection ratio | Differential input, 1-kHz signal on both pins and measure level at output | Differential input, 1-kHz signal on both pins and measure level at output | 56 | dB | ||
| SECONDARY ADC PERFORMANCE | SECONDARY ADC PERFORMANCE | SECONDARY ADC PERFORMANCE | SECONDARY ADC PERFORMANCE | SECONDARY ADC PERFORMANCE | SECONDARY ADC PERFORMANCE | SECONDARY ADC PERFORMANCE |
| Default Energysense signal detection threshold | At 1 kHz | At 1 kHz | -57 | dBFS | ||
| Energysense signal | bandwidth | bandwidth | 10 | kHz | ||
| Energysense accuracy (2) | Energysense accuracy (2) | 3 | dB | |||
| Secondary ADC | accuracy | accuracy | 12 | bits | ||
| Secondary ADC sampling | rate | rate | 8 | 192 | kHz |
Absolute Maximum Ratings
over operating temperature (unless otherwise noted) (1)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Supply voltage | AVDD to AGND | -0.3 | 3.9 | V |
| Supply voltage | DVDD to DGND | -0.3 | 3.9 | V |
| Supply voltage | IOVDD to DGND | -0.3 | 3.9 | V |
| Ground voltage differences | AGND to DGND | -0.3 | 0.3 | V |
| Digital input voltage | Digital input to DGND | -0.3 | IOVDD + 0.3 | V |
| Digital input voltage | XI to DGND | -0.3 | 2.1 | V |
| Analog input voltage | VINxx to AGND | -1.7 | 5.0 | V |
| Temperature | Operating ambient, T A | -40 | 125 | °C |
| Temperature | Junction, T J | -40 | 150 | °C |
| Temperature | Storage, T stg | -40 | 150 | °C |
Recommended Operating Conditions
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| POWER | |||||
| AVDD | Analog supply voltage to AGND | 3.0 | 3.3 | 3.6 | V |
| DVDD | Digital supply voltage to DGND | 3.0 | 3.3 | 3.6 | V |
| IOVDD | IO supply voltage to DGND at 1.8 V | 1.62 | 1.8 | 1.98 | V |
| at 3.3 V | 3.0 | 3.3 | 3.6 | V | |
| LDO | LDO pin voltage to DGND (LDO is an input when using external 1.8-V power supply) | IOVDD - 0.3 | IOVDD | IOVDD + 0.3 | V |
| TEMPERATURE | TEMPERATURE | ||||
| T A | Operating ambient temperature | -40 | 125 | °C |
Thermal Information
| THERMAL METRIC | (1) | PCM186x DBT (TSSOP) 30 PINS | UNIT |
|---|---|---|---|
| R θ JA | Junction-to-ambient thermal resistance | 79.6 | °C/W |
| R θ JC(top) | Junction-to-case (top) thermal resistance | 15.1 | °C/W |
| R θ JB | Junction-to-board thermal resistance | 33.1 | °C/W |
| ψ JT | Junction-to-top characterization parameter | 0.4 | °C/W |
| ψ JB | Junction-to-board characterization parameter | 32.6 | °C/W |
Typical Application
1
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| PCM1865 | Texas Instruments | — |
| PCM1865-Q1 | Texas Instruments | — |
| PCM1865DBTR | Texas Instruments | 30-TFSOP (0.173", 4.40mm Width) |
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