KSZ8081RNB33
10Base-T/100Base-TX Physical Layer Transceiver
Physical Layer TransceiverThe KSZ8081RNB33 is a physical layer transceiver from Microchip Technology. 10Base-T/100Base-TX Physical Layer Transceiver. View the full KSZ8081RNB33 datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Microchip Technology
Category
Physical Layer Transceiver
Overview
Part: KSZ8081MNX/KSZ8081RNB, Micrel, Inc.
Type: 10Base-T/100Base-TX Physical Layer Transceiver
Description: The KSZ8081 is a single-supply 10Base-T/100Base-TX Ethernet physical-layer transceiver offering MII or RMII interfaces, integrated 1.2V core regulator, on-chip termination resistors, and LinkMD TDR-based cable diagnostics.
Operating Conditions:
- Supply voltage: Single 3.3V (core), 1.8V/2.5V/3.3V (VDD I/O options)
- Operating temperature: 0°C to 85°C (commercial and industrial ranges combined)
- Reference clock input: 25MHz crystal/oscillator (or 50MHz oscillator for RMII mode)
Absolute Maximum Ratings:
- Max supply voltage: null
- Max continuous current: null
- Max junction/storage temperature: null
Key Specs:
- Data rates: 10Base-T and 100Base-TX
- Interface options: MII (KSZ8081MNX) or RMII v1.2 (KSZ8081RNB)
- Integrated 1.2V regulator for core supply
- On-chip termination resistors for differential pairs
- HP Auto MDI/MDI-X support
- Auto-negotiation for 10/100Mbps speed and half/full duplex
- LinkMD TDR-based cable diagnostics
- MDC/MDIO management interface
Features:
- Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver
- MII interface support (KSZ8081MNX)
- RMII v1.2 Interface support with a 50MHz reference clock output to MAC, and an option to input a 50MHz reference clock (KSZ8081RNB)
- Back-to-back mode support for a 100Mbps copper repeater
- MDC/MDIO management interface for PHY register configuration
- Programmable interrupt output
- LED outputs for link, activity, and speed status indication
- On-chip termination resistors for the differential pairs
- Baseline wander correction
- HP Auto MDI/MDI-X to reliably detect and correct straight-through and crossover cable connections with disable and enable option
- Auto-negotiation to automatically select the highest linkup speed (10/100Mbps) and duplex (half/full)
- Power-down and power-saving modes
- LinkMD TDR-based cable diagnostics to identify faulty copper cabling
- Parametric NAND Tree support for fault detection between chip I/Os and the board
- Loopback modes for diagnostics
- Single 3.3V power supply with VDD I/O options for 1.8V, 2.5V, or 3.3V
- Built-in 1.2V regulator for core
Applications:
- Game console
- IP phone
- IP set-top box
- IP TV
- LOM
- Printer
Package:
- 32-pin QFN (5mm x 5mm)
Features
- Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver
- MII interface support (KSZ8081MNX)
- RMII v1.2 Interface support with a 50MHz reference clock output to MAC, and an option to input a 50MHz reference clock (KSZ8081RNB)
- Back-to-back mode support for a 100Mbps copper repeater
- MDC/MDIO management interface for PHY register configuration
- Programmable interrupt output
- LED outputs for link, activity, and speed status indication
- On-chip termination resistors for the differential pairs
- Baseline wander correction
- HP Auto MDI/MDI-X to reliably detect and correct straight-through and crossover cable connections with disable and enable option
- Auto-negotiation to automatically select the highest linkup speed (10/100Mbps) and duplex (half/full)
- · Power-down and power-saving modes
- LinkMD TDR-based cable diagnostics to identify faulty copper cabling
- Parametric NAND Tree support for fault detection between chip I/Os and the board
Applications
- Game console
- IP phone
- IP set-top box
- IP TV
- LOM
- Printer
Pin Configuration
32-Pin (5mm x 5mm) QFN
November 2012 8 M9999-110512-1.0
Electrical Characteristics
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Units |
|---|---|---|---|---|---|---|
| Supply Current (VDDIO, VDDA_3.3 = 3.3V)(4) | ||||||
| IDD1_3.3V | 10Base-T | Full-duplex traffic @ 100% utilization | 41 | mA | ||
| IDD2_3.3V | 100Base-TX | Full-duplex traffic @ 100% utilization | 47 | mA | ||
| IDD3_3.3V | EDPD Mode | Ethernet cable disconnected (reg. | ||||
| IDD3_3.3V | EDPD Mode | Ethernet cable disconnected (reg. mode) | 25 | mA | ||
| IDD4_3.3V | Power-Down Mode | All clocks stopped, no traffic | 10 | mA | ||
| IDD5_3.3V | Sleep Mode | All clocks stopped, no traffic | 10 | mA | ||
| IDD6_3.3V | Deep Power-Down Mode | All clocks stopped, no traffic | 1 | mA | ||
| Supply Current (VDDIO, VDDA_2.5 = 2.5V)(4) | ||||||
| IDD7_2.5V | 100Base-TX | Full-duplex traffic @ 100% utilization | 47 | mA | ||
| IDD8_2.5V | 10Base-T | Full-duplex traffic @ 100% utilization | 41 | mA | ||
| IDD9_2.5V | EDPD Mode | Ethernet cable disconnected (reg. mode) | 25 | mA | ||
| IDD10_2.5V | Power-Down Mode | All clocks stopped, no traffic | 10 | mA | ||
| IDD11_2.5V | Sleep Mode | All clocks stopped, no traffic | 10 | mA | ||
| IDD12_2.5V | Deep Power-Down Mode | All clocks stopped, no traffic | 1 | mA | ||
| Supply Current (VDDIO, VDDA_1.8 = 1.8V)(4) | ||||||
| IDD13_1.8V | 100Base-TX | Full-duplex traffic @ 100% utilization | 47 | mA | ||
| IDD14_1.8V | 10Base-T | Full-duplex traffic @ 100% utilization | 41 | mA | ||
| IDD15_1.8V | EDPD Mode | Ethernet cable disconnected (reg. mode) | 25 | mA | ||
| IDD16_1.8V | Power-Down Mode | All clocks stopped, no traffic | 10 | mA | ||
| IDD17_1.8V | Sleep Mode | All clocks stopped, no traffic | 10 | mA | ||
| IDD18_1.8V | Deep Power-Down Mode | All clocks stopped, no traffic | 1 | mA |
Notes:
-
- Exceeding the absolute maximum rating can damage the device. Stresses greater than the absolute maximum rating can cause permanent damage to the device. Operation of the device at these or any other conditions above those specified in the operating sections of this specification is not implied. Maximum conditions for extended periods may affect reliability.
-
- The device is not guaranteed to function outside its operating rating.
-
- TA = 25°C. Specification is for packaged product only.
-
- Current consumption is for the single 3.3V supply KSZ8081MNX/RNB device only, and includes the transmit driver current and the 1.2V supply voltage (VDD_1.2) that are supplied by the KSZ8081MNX/RNB.
November 2012 48 M9999-110512-1.0
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Units |
|---|---|---|---|---|---|---|
| All Pull-Up/Pull-Down Pins (including Strapping Pins) | ||||||
| VDDIO = 3.3V | 30 | 45 | 73 | kΩ | ||
| pu | Internal Pull-Up Resistance | VDDIO = 2.5V | 39 | 61 | 102 | kΩ |
| VDDIO = 1.8V | 48 | 99 | 178 | kΩ | ||
| VDDIO = 3.3V | 26 | 43 | 79 | kΩ | ||
| pd | Internal Pull-Down Resistance | VDDIO = 2.5V | 34 | 59 | 113 | kΩ |
| 100Base-TX Transmit (measured differentially after 1:1 transformer) | VDDIO = 1.8V | 53 | 99 | 200 | kΩ | |
| VO | Peak Differential Output Voltage | 100Ω termination across differential output | 0.95 | 1.05 | V | |
| VIMB | Output Voltage Imbalance | 100Ω termination across differential output | 2 | % | ||
| tr, tf | Rise/Fall Time | 3 | 5 | ns | ||
| Rise/Fall Time Imbalance Duty Cycle Distortion Overshoot | 0 | 0.5 ±0.25 5 | ns ns % | |||
| Output Jitter 10Base-T Transmit (measured differentially after 1:1 transformer) | Peak-to-peak | 0.7 | ns | |||
| VP | Peak Differential Output Voltage | 100Ω termination across differential output | 2.2 | 2.8 | V | |
| Jitter Added | Peak-to-peak | 3.5 | ns | |||
| tr, tf | Rise/Fall Time | 25 | ns | |||
| 10Base-T Receive | ||||||
| VSQ | Squelch Threshold Transmitter – Drive Setting | 5MHz square wave | 400 | mV | ||
| VSET | Reference Voltage of ISET | R(ISET) = 6.49kΩ | 0.65 | V | ||
| REF_CLK Output | ||||||
| 50MHz RMII Clock Output Jitter 100Mbps Mode – Industrial Applications Parameters | Peak-to-peak (Applies only to KSZ8081RNB in RMII – 25MHz clock mode) | 300 | ps | |||
| Clock Phase Delay – XI Input to MII TXC Output | XI (25MHz clock input) to MII TXC (25MHz clock output) delay, referenced to rising edges of both clocks. (Applies only to KSZ8081MNX in MII mode) | 15 | 20 | 25 | ns | |
| tllr | Link Loss Reaction (Indication) Time | Link loss detected at receive differential inputs to PHY signal indication time for each of the following: 1. For LED mode 00, Speed LED output changes from low (100Mbps) to high (10Mbps, default state for link-down). 2. For LED mode 01, Link LED output changes from low (link-up) to high (link-down). 3. INTRP pin asserts for link-down status change. | 4.4 | μs |
Absolute Maximum Ratings
| Parameter | Rating |
|---|---|
| Supply Voltage (VIN) | |
| (VDD_1.2) | -0.5V to +1.8V |
| (VDDIO, VDDA_3.3) | -0.5V to +5.0V |
| Input Voltage (all inputs) | -0.5V to +5.0V |
| Output Voltage (all outputs) | -0.5V to +5.0V |
| Lead Temperature (soldering, 10sec.) | 260°C |
| Storage Temperature (Ts) | -55°C to +150°C |
Package Information
Figure 27. Recommended Land Pattern, 32-Pin (5mm x 5mm) QFN
Red circles indicate thermal vias. They should be 0.350mm in diameter and be connected to the GND plane for maximum thermal performance.
Green rectangles (with shaded area) indicate solder stencil openings on the exposed pad area. They should be 0.87 x 0.87mm in size, 1.07mm pitch.
November 2012 64 M9999-110512-1.0
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| KSZ8081 | Microchip Technology | — |
| KSZ8081MNX | Microchip Technology | — |
| KSZ8081MNX-EVAL | Microchip Technology | 32-Pin QFN |
| KSZ8081MNX/RNB | Microchip Technology | — |
| KSZ8081MNX/RNB28 | Microchip Technology | — |
| KSZ8081MNX32 | Microchip Technology | — |
| KSZ8081MNXCA | Microchip Technology | 32-VFQFN Exposed Pad |
| KSZ8081MNXCC | Microchip Technology | 32-Pin QFN |
| KSZ8081MNXIA | Microchip Technology | 32-Pin QFN |
| KSZ8081MNXIC | Microchip Technology | 32-Pin QFN |
| KSZ8081RNB | Microchip Technology | 32-Pin QFN |
| KSZ8081RNB-EVAL | Microchip Technology | 32-Pin QFN |
| KSZ8081RNBCA | Microchip Technology | 32-Pin QFN |
| KSZ8081RNBCC | Microchip Technology | 32-Pin QFN |
| KSZ8081RNBIA | Microchip Technology | 32-Pin QFN |
| KSZ8081RNBIC | Microchip Technology | 32-Pin QFN |
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