KSZ8081RNB

KSZ8081MNX/KSZ8081RNB

Manufacturer

Microchip Technology

Overview

Part: Micrel KSZ8081MNX/KSZ8081RNB

Type: 10Base-T/100Base-TX Physical Layer Transceiver

Key Specs:

  • Single power supply: 3.3V
  • Core voltage: 1.2V
  • I/O voltage options: 1.8V, 2.5V, 3.3V
  • Crystal frequency: 25MHz
  • RMII reference clock output: 50MHz
  • HBM ESD rating: 6kV
  • Data rates: 10/100Mbps

Features:

  • Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver
  • MII interface support (KSZ8081MNX)
  • RMII v1.2 Interface support with a 50MHz reference clock output to MAC, and an option to input a 50MHz reference clock (KSZ8081RNB)
  • Back-to-back mode support for a 100Mbps copper repeater
  • MDC/MDIO management interface for PHY register configuration
  • Programmable interrupt output
  • LED outputs for link, activity, and speed status indication
  • On-chip termination resistors for the differential pairs
  • Baseline wander correction
  • HP Auto MDI/MDI-X to reliably detect and correct straight-through and crossover cable connections with disable and enable option
  • Auto-negotiation to automatically select the highest linkup speed (10/100Mbps) and duplex (half/full)
  • Power-down and power-saving modes
  • LinkMD TDR-based cable diagnostics to identify faulty copper cabling
  • Parametric NAND Tree support for fault detection between chip I/Os and the board
  • HBM ESD rating (6kV)
  • Loopback modes for diagnostics
  • Single 3.3V power supply with VDD I/O options for 1.8V, 2.5V, or 3.3V
  • Built-in 1.2V regulator for core

Applications:

  • Game console
  • IP phone
  • IP set-top box
  • IP TV
  • LOM
  • Printer

Package:

  • 32-pin QFN: 5mm × 5mm

Features

  • Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver
  • MII interface support (KSZ8081MNX)
  • RMII v1.2 Interface support with a 50MHz reference clock output to MAC, and an option to input a 50MHz reference clock (KSZ8081RNB)
  • Back-to-back mode support for a 100Mbps copper repeater
  • MDC/MDIO management interface for PHY register configuration
  • Programmable interrupt output
  • LED outputs for link, activity, and speed status indication
  • On-chip termination resistors for the differential pairs
  • Baseline wander correction
  • HP Auto MDI/MDI-X to reliably detect and correct straight-through and crossover cable connections with disable and enable option
  • Auto-negotiation to automatically select the highest linkup speed (10/100Mbps) and duplex (half/full)
  • Power-down and power-saving modes
  • LinkMD TDR-based cable diagnostics to identify faulty copper cabling
  • Parametric NAND Tree support for fault detection between chip I/Os and the board
  • HBM ESD rating (6kV)

Applications

  • Game console
  • IP phone
  • IP set-top box
  • IP TV
  • LOM
  • Printer

Pin Configuration

32-Pin 5mm × 5mm QFN

Pin Description – KSZ8081MNX

Pin NumberPin NameType(2)Pin Function
1GNDGNDGround
2VDD_1.2P1.2V core VDD (power supplied by KSZ8081MNX). Decouple with 2.2μF and 0.1μF
capacitors to ground.
3VDDA_3.3P3.3V analog VDD.
4RXMI/OPhysical receive or transmit signal (- differential).
5RXPI/OPhysical receive or transmit signal (+ differential).
6TXMI/OPhysical transmit or receive signal (- differential).
7TXPI/OPhysical transmit or receive signal (+ differential).
8XOOCrystal feedback for 25MHz crystal.
This pin is a no connect if an oscillator or external clock source is used.
9XIICrystal / Oscillator / External Clock Input. 25MHz ±50ppm.
10REXTISet PHY transmit output current. Connect a 6.49kΩ resistor to ground on this pin.
11MDIOIpu/OpuManagement Interface (MII) Data I/O This pin has a weak pull-up, is open-drain, and
requires an external 1.0kΩ pull-up resistor.
12MDCIpuManagement Interface (MII) Clock Input. This clock pin is synchronous to the MDIO
data pin.
13RXD3/
PHYAD0
Ipu/OMII Mode: MII Receive Data Output3
Config Mode: The pull-up/pull-down value is latched as PHYADDR[0] at the de-
assertion of reset.
See the Strapping Options – KSZ8081MNX section for details.
14RXD2/
PHYAD1
Ipd/OMII Mode: MII Receive Data Output2
Config Mode: The pull-up/pull-down value is latched as PHYADDR[1] at the de-
assertion of reset.
See the Strapping Options – KSZ8081MNX section for details.
15RXD1/
PHYAD2
Ipd/OMII Mode: MII Receive Data Output1
Config Mode: The pull-up/pull-down value is latched as PHYADDR[2] at the de-
assertion of reset.
See the Strapping Options – KSZ8081MNX section for details.

2. P = Power supply.

GND = Ground.

I = Input.

O = Output.

I/O = Bi-directional.

Ipu = Input with internal pull-up (see Electrical Characteristics for value).

Ipu/O = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.

Ipd/O = Input with internal pull-down (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.

Ipu/Opu = Input with internal pull-up (see Electrical Characteristics for value) and output with internal pull-up (see Electrical Characteristics for value).

3. MII RX Mode: The RXD[3:0] bits are synchronous with RXC. When RXDV is asserted, RXD[3:0] presents valid data to the MAC. RXD[3:0] is invalid data from the PHY when RXDV is de-asserted.

Electrical Characteristics

Notes:

11. Exceeding the absolute maximum ratings can damage the device. Stresses greater than the absolute maximum rating can cause permanent damage to the device. Operation of the device at these or any other conditions above those specified in the operating sections of this specification is not implied. Maximum conditions for extended periods may affect reliability.

12. The device is not guaranteed to function outside its operating ratings.

13. TA = 25°C. Specification for packaged product only.

14. Current consumption is for the single 3.3V supply KSZ8081MNX/RNB device only, and includes the transmit driver current and the 1.2V supply voltage (VDD_1.2) that are supplied by the KSZ8081MNX/RNB.

Absolute Maximum Ratings

Supply Voltage (VIN)

  • (VDDIO, VDDA_3.3) –0.5V to +5.0V
  • Input Voltage (all inputs) –0.5V to +5.0V
  • Output Voltage (all outputs) –0.5V to +5.0V
  • Lead Temperature (soldering, 10s) 260°C
  • Storage Temperature (TS)–55°C to +150°C

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
KSZ8081Microchip Technology
KSZ8081MNXMicrochip Technology
KSZ8081MNX-EVALMicrochip Technology
KSZ8081MNX/RNBMicrochip Technology
KSZ8081MNXCAMicrochip Technology32-VFQFN Exposed Pad
KSZ8081MNXIAMicrochip Technology
KSZ8081RNB-EVALMicrochip Technology
KSZ8081RNBCAMicrochip Technology
KSZ8081RNBIAMicrochip Technology
Data on this page is extracted from publicly available manufacturer datasheets using automated tools including AI. It may contain errors or omissions. Always verify specifications against the official manufacturer datasheet before making design or purchasing decisions. See our Terms of Service. Rights holders can submit a takedown request.

Get structured datasheet data via API

Get started free