AVR128DA48-I/PT

Part: AVR128DA48 (AVR128DA48-I/PT) — Microchip Technology

Type: 8-bit AVR Microcontroller

Description: 8-bit AVR CPU MCU running at up to 24 MHz with 128 KB Flash, 16 KB SRAM and 512B EEPROM in a 48-pin package, operating from 1.8–5.5 V.

Operating Conditions:

• Supply voltage: 1.8–5.5 V
• Operating temperature: -40 to +85 °C (Industrial grade; Extended grade is -40 to +125 °C)
• Max CPU clock: 24 MHz
• I²C Fm+ (1 MHz) supported only for VDD above 2.7 V

Absolute Maximum Ratings:

• Max supply voltage (VDD pin): -0.3 to +6.5 V
• Voltage on RESET and all other pins: -0.3 to (VDD + 0.3) V
• Max current on VDD and GND pins: 350 mA (-40 °C ≤ TA ≤ +85 °C); 120 mA (+85 °C < TA ≤ +125 °C)
• Max current on any standard I/O pin: ±50 mA
• Clamp current IK: ±20 mA
• Total power dissipation: 800 mW
• Ambient temperature under bias: -40 to +125 °C
• Storage temperature: -65 to +150 °C

Key Specs:

• CPU: AVR CPU with two-cycle hardware multiplier, up to 24 MHz, single-cycle I/O access
• Memory: 128 KB Flash (10,000 write/erase cycles), 16 KB SRAM, 512B EEPROM (100,000 cycles), 32B user row
• Data retention: 40 years at 55 °C
• ADC: one 12-bit differential, 130 ksps, 18 channels on the 48-pin device
• DAC: one 10-bit
• Voltage references: 1.024 V, 2.048 V, 2.500 V, 4.096 V
• GPIO: 41 on the 48-pin device
• Serial: 5 USART, 2 SPI, 2 TWI

Features:

• Internal high-frequency oscillator up to 24 MHz with auto-tuning; PLL up to 48 MHz for TCD
• 32.768 kHz internal oscillator and external crystal oscillator support
• Three sleep modes: Idle, Standby, Power-Down
• Power-on Reset and Brown-out Detector
• Event System with 10 channels
• Configurable Custom Logic (6 LUTs)
• 3 analog comparators and 2 zero-cross detectors
• Peripheral Touch Controller (32 self-capacitance / 256 mutual-capacitance channels)
• Timers: 2× TCA, 4× TCB, 1× TCD, RTC
• CRC Flash scan, Watchdog Timer with window mode
• Single-pin UPDI programming and debug

Applications:

• Capacitive touch interfaces (buttons, sliders, wheels, 2D surfaces)
• Power control (via TCD)
• General-purpose embedded control

Package:

• 48-pin TQFP 7x7 mm (the "PT" suffix)
• 48-pin VQFN 6x6 mm (other orderable option for the 48-pin family)

• AVR ® CPU

• -Running at up to 24 MHz

• -Single-cycle I/O access

• -Two-level interrupt controller

• -Two-cycle hardware multiplier

• -Supply voltage range: 1.8V to 5.5V

• Memories

• -128 KB In-System self-programmable Flash memory

• -512B EEPROM

• -16 KB SRAM

• -32B of user row in nonvolatile memory that can keep data during chip-erase and be programmed while the device is locked

• -Write/erase endurance

• Flash 10,000 cycles

• EEPROM 100,000 cycles

• -Data retention: 40 years at 55°C

• System

• -Power-on Reset (POR) circuit

• -Brown-out Detector (BOD)

• -Clock options

• High-Precision internal high-frequency Oscillator with selectable frequency up to 24 MHz (OSCHF)

• -Auto-tuning for improved internal oscillator accuracy

• Internal PLL up to 48 MHz for high-frequency operation of Timer/Counter type D (PLL)

• 32.768 kHz Ultra-Low Power internal oscillator (OSC32K)

• 32.768 kHz external crystal oscillator (XOSC32K)

• External clock input

• -Single-pin Unified Program and Debug Interface (UPDI)

• -Three sleep modes

• Idle with all peripherals running for immediate wake-up

• Standby with a configurable operation of selected peripherals

• Power-Down with full data retention

• Peripherals

• -Up to two 16-bit Timer/Counter type A (TCA) with a dedicated period register and three PWM channels

• -Up to five 16-bit Timer/Counter type B (TCB) with input capture and simple PWM functionality

• -One 12-bit Timer/Counter type D (TCD) optimized for power control

• -One 16-bit Real-Time Counter (RTC) running from an external crystal or internal oscillator

• -Up to six USART with fractional baud rate generator, auto-baud, and start-of-frame detection

• -Two host/client Serial Peripheral Interface (SPI)

• -Up to two Two-Wire Interface (TWI) with dual address match

• Independent host and client operation (Dual mode)

• Philips I 2 C compatible

• Standard mode (Sm, 100 kHz)

• Fast mode (Fm, 400 kHz)

• Fast mode plus (Fm+, 1 MHz) (1)

• -Event System for CPU independent and predictable inter-peripheral signaling

• -Configurable Custom Logic (CCL) with up to six programmable Look-up Tables (LUT)

• -One 12-bit differential 130 ksps Analog-to-Digital Converter (ADC)

• -Three Analog Comparators (ACs) with window compare functions

• -One 10-bit Digital-to-Analog Converter (DAC)

• -Up to three Zero-Cross Detectors (ZCD)

• -Multiple voltage references (VREF)

• 1.024V

• 2.048V

• 2.500V

• 4.096V

• -Peripheral Touch Controller (PTC) with Driven Shield+ and Boost Mode technologies for capacitive touch buttons, sliders, wheels and 2D surface

• Up to 46 self-capacitance and 529 mutual capacitance channels

• -Automated Cyclic Redundancy Check (CRC) Flash memory scan

• -Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator

• -External interrupt on all general purpose pins

• I/O and Packages:

• -Up to 55 programmable I/O pins

• -28-pin SPDIP, SSOP and SOIC

• -32-pin VQFN 5x5 mm and TQFP 7x7 mm

• -48-pin VQFN 6x6 mm and TQFP 7x7 mm

• -64-pin VQFN 9x9 mm and TQFP 10x10 mm

• Temperature Ranges:

• -Industrial: -40°C to +85°C

• -Extended: -40°C to +125°C

1. I 2 C Fm+ is only supported for V DD above 2.7V.

This bit field controls the pin configuration of the Reset pin.

Stresses beyond those listed in this section can cause permanent damage to the device. This is a stress rating only. Functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Table 37-1. Absolute Maximum Ratings

1. The maximum current rating requires even load distribution across I/O pins. The maximum current rating may be limited by the device package power dissipation characterizations. See 37.9 Thermal Specifications to calculate device specifications.
2. Power dissipation is calculated as follows: P DIS = VDD x {I DD - Σ I OH} + Σ {(V DD - V OH) x I OH} + Σ (VOI x IOL)

Table 37-9. Thermal Specifications

1. Power dissipation is calculated as follows: PDIS = VDD × {I DD - Σ I OH} + Σ {(V DD - V OH) × I OH} + Σ (VOI × IOL)
2. Internal Power Dissipation is calculated as follows: P INTERNAL = I DD × VDD, where IDD is current to run the chip alone without driving any load on the output pins.
3. Derated Power is calculated as follows: PDER = PDMAX (TJ-TA)/θJA, where TA = Ambient Temperature, TJ = Junction Temperature.

For the most recent package drawings:

1. Go to www.microchip.com/packaging.
2. Go to the package type-specific page, for example, VQFN.
3. Search for either Drawing Number or Style to find the most recent package drawings.

Table 40-1. Drawing Numbers

1. This package type has wettable flanks and will only be available for automotive (VAO) ordering codes.