ATTINY85-20PU

Part: Atmel ATtiny25/V, ATtiny45/V, ATtiny85/V

Type: 8-bit AVR Microcontroller

Key Specs:

• Flash Memory: 2/4/8K Bytes In-System Programmable
• EEPROM: 128/256/512 Bytes In-System Programmable
• SRAM: 128/256/512 Bytes Internal
• Operating Voltage: 1.8V to 5.5V (ATtiny25V/45V/85V), 2.7V to 5.5V (ATtiny25/45/85)
• Speed Grade: 0 to 20 MHz (at 4.5V to 5.5V for ATtiny25/45/85)
• Programmable I/O Lines: 6
• Active Mode Current: 300 µA (at 1 MHz, 1.8V)
• Power-down Mode Current: 0.1 µA (at 1.8V)

Features:

• High Performance, Low Power AVR 8-Bit Microcontroller
• Advanced RISC Architecture (120 Powerful Instructions, 32 x 8 General Purpose Working Registers)
• Non-volatile Program and Data Memories
• Programming Lock for Self-Programming Flash Program and EEPROM Data Security
• 8-bit Timer/Counter with Prescaler and Two PWM Channels
• 8-bit High Speed Timer/Counter with Separate Prescaler and 2 High Frequency PWM Outputs
• USI Universal Serial Interface with Start Condition Detector
• 10-bit ADC (4 Single Ended Channels, 2 Differential ADC Channel Pairs with Programmable Gain, Temperature Measurement)
• Programmable Watchdog Timer with Separate On-chip Oscillator
• On-chip Analog Comparator
• debugWIRE On-chip Debug System
• In-System Programmable via SPI Port
• External and Internal Interrupt Sources
• Low Power Idle, ADC Noise Reduction, and Power-down Modes
• Enhanced Power-on Reset Circuit
• Programmable Brown-out Detection Circuit
• Internal Calibrated Oscillator
• Industrial Temperature Range

Applications:

• No applications clearly stated.

Package:

• 8-pin PDIP
• 8-pin SOIC
• 20-pad QFN/MLF
• 8-pin TSSOP (only ATtiny45/V)

• High Performance, Low Power AVR® 8-Bit Microcontroller
• Advanced RISC Architecture
  • 120 Powerful Instructions Most Single Clock Cycle Execution
  • 32 x 8 General Purpose Working Registers
  • Fully Static Operation
• Non-volatile Program and Data Memories
  • 2/4/8K Bytes of In-System Programmable Program Memory Flash
    • Endurance: 10,000 Write/Erase Cycles
  • 128/256/512 Bytes In-System Programmable EEPROM
    • Endurance: 100,000 Write/Erase Cycles
  • 128/256/512 Bytes Internal SRAM
  • Programming Lock for Self-Programming Flash Program and EEPROM Data Security
• Peripheral Features
  • 8-bit Timer/Counter with Prescaler and Two PWM Channels
  • 8-bit High Speed Timer/Counter with Separate Prescaler
    • 2 High Frequency PWM Outputs with Separate Output Compare Registers
    • Programmable Dead Time Generator
  • USI Universal Serial Interface with Start Condition Detector
  • 10-bit ADC
    • 4 Single Ended Channels
    • 2 Differential ADC Channel Pairs with Programmable Gain (1x, 20x)
    • Temperature Measurement
  • Programmable Watchdog Timer with Separate On-chip Oscillator
  • On-chip Analog Comparator
• Special Microcontroller Features
  • debugWIRE On-chip Debug System
  • In-System Programmable via SPI Port
  • External and Internal Interrupt Sources
  • Low Power Idle, ADC Noise Reduction, and Power-down Modes
  • Enhanced Power-on Reset Circuit
  • Programmable Brown-out Detection Circuit
  • Internal Calibrated Oscillator
• I/O and Packages
  • Six Programmable I/O Lines
  • 8-pin PDIP, 8-pin SOIC, 20-pad QFN/MLF, and 8-pin TSSOP (only ATtiny45/V)
• Operating Voltage
  • 1.8 5.5V for ATtiny25V/45V/85V
  • 2.7 5.5V for ATtiny25/45/85
• Speed Grade
  • ATtiny25V/45V/85V: 0 4 MHz @ 1.8 5.5V, 0 10 MHz @ 2.7 5.5V
  • ATtiny25/45/85: 0 10 MHz @ 2.7 5.5V, 0 20 MHz @ 4.5 5.5V
• Industrial Temperature Range
• • Low Power Consumption
  • Active Mode:
    • 1 MHz, 1.8V: 300 µA
  • Power-down Mode:
    • 0.1 µA at 1.8V

Rev. 2586QS–AVR–08/2013

Figure 1-1. Pinout ATtiny25/45/85

DNC: Do Not Connect

1.1 Pin Descriptions

1.1.1 VCC

Supply voltage.

1.1.2 GND

Ground.

1.1.3 Port B (PB5:PB0)

Port B is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.

Port B also serves the functions of various special features of the ATtiny25/45/85 as listed in "Alternate Functions of Port B" on page 60.

On ATtiny25, the programmable I/O ports PB3 and PB4 (pins 2 and 3) are exchanged in ATtiny15 Compatibility Mode for supporting the backward compatibility with ATtiny15.

1.1.4 RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running and provided the reset pin has not been disabled. The minimum pulse length is given in Table 21-4 on page 165. Shorter pulses are not guaranteed to generate a reset.

The reset pin can also be used as a (weak) I/O pin.