AT32UC3C1256C

Part: AT32UC3C1256C — Atmel

Type: 32-bit AVR32 UC3 Microcontroller

Description: 32-bit AVR32UC RISC microcontroller with FPU running at up to 66 MHz, with 256 KB Flash, 64 KB SRAM, and 100-pin TQFP with 81 GPIOs.

Operating Conditions:

• Supply voltage: single 5 V or single 3.3 V supply (two operating voltage ranges)
• Operating temperature: -40 to +85 °C
• Max CPU frequency: 66 MHz (up to 91 DMIPS from Flash with 1 wait-state)

Absolute Maximum Ratings:

• Max operating voltage (VDDIN_5, VDDIO1/2/3, VDDANA): 5.5 V
• Max operating voltage (VDDIN_33): 3.6 V
• Voltage on any pin except DM/DP/VBUS: -0.3 V to VVDD + 0.3 V
• Voltage on DM/DP: -0.3 V to +3.6 V
• Voltage on VBUS: -0.3 V to +5.5 V
• Total DC output current per I/O supply group (VDDIO1, VDDIO2, VDDIO3, VDDANA): 120 mA
• Storage temperature: -60 to +150 °C

Key Specs:

• CPU: AVR32UC with FPU, 1.49 DMIPS/MHz
• Flash: 256 KB, single-cycle access up to 33 MHz; 100,000 write cycles, 15-year data retention
• SRAM: 64 KB, plus 4 KB HSB RAM
• GPIO: 81 (TQFP100)
• ADC: 16-channel 12-bit pipelined, dual sample-and-hold
• DAC: 12-bit, 4 channels; 4 analog comparators
• Communication: 5 USART, 2 SPI, 3 TWI, 2 CAN channels, USB 2.0 device/host, Ethernet MAC 10/100 (MII/RMII), I2S
• Timers/PWM: 6 TC channels, 4-channel 20-bit PWM (4x2 outputs), 2 quadrature decoders
• PLLs: 80–240 MHz; crystal oscillator 0.4–20 MHz

Features:

• Built-in floating-point unit, DSP instructions, memory protection unit
• 16 peripheral DMA channels and a memory DMA controller
• FlashVault technology for secure pre-programmed libraries
• Peripheral Event Controller with 34 events and 22 event actions
• Power-on reset and brown-out detectors (BOD18, BOD33, BOD50)
• Internal RC oscillators (115 kHz RCSYS, 8 MHz RC8M, 120 MHz RC120M), 32 kHz oscillator
• Windowed watchdog timer, asynchronous timer with RTC capability, frequency meter
• QTouch library support for capacitive touch
• Nexus Class 2+ on-chip debug, aWire single-pin interface, NanoTrace

Applications:

• Capacitive touch interfaces
• Motor control and PWM-based control
• CAN, USB, and Ethernet networked embedded devices
• Audio (I2S) applications

Package:

• TQFP100 (81 GPIO pins)

• High Performance, Low Power 32-bit AVR ® Microcontroller
• Compact Single-cycle RISC Instruction Set Including DSP Instruction Set
• Built-in Floating-Point Processing Unit (FPU)
• Read-Modify-Write Instructions and Atomic Bit Manipulation
• Performing 1.49 DMIPS / MHz
• Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)
• Up to 49 DMIPS Running at 33 MHz from Flash (0 Wait-State)
• Memory Protection Unit
• Multi-hierarchy Bus System
• High-Performance Data Transfers on Separate Buses for Increased Performance
• 16 Peripheral DMA Channels Improves Speed for Peripheral Communication
• Internal High-Speed Flash
• 512 Kbytes, 256 Kbytes, 128 Kbytes, 64 Kbytes Versions
• Single Cycle Access up to 33 MHz
• FlashVault ™ Technology Allows Pre-programmed Secure Library Support for End User Applications
• Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
• 100,000 Write Cycles, 15-year Data Retention Capability
• Flash Security Locks and User Defined Configuration Area
• Internal High-Speed SRAM, Single-Cycle Access at Full Speed
• 64 Kbytes (512 KB and 256 KB Flash), 32 Kbytes (128 KB Flash), 16 Kbytes (64 KB Flash)
• 4 Kbytes on the Multi-Layer Bus System (HSB RAM)
• External Memory Interface on AT32UC3C0 Derivatives
• SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)
• Interrupt Controller
• Autovectored Low Latency Interrupt Service with Programmable Priority
• System Functions
• Power and Clock Manager
• Internal 115KHz (RCSYS) and 8MHz/1MHz (RC8M) RC Oscillators
• One 32 KHz and Two Multipurpose Oscillators
• Clock Failure detection
• Two Phase-Lock-Loop (PLL) allowing Independent CPU Frequency from USB or CAN Frequency
• Windowed Watchdog Timer (WDT)
• Asynchronous Timer (AST) with Real-Time Clock Capability
• Counter or Calendar Mode Supported
• Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency
• Ethernet MAC 10/100 Mbps interface
• 802.3 Ethernet Media Access Controller
• Supports Media Independent Interface (MII) and Reduced MII (RMII)
• Universal Serial Bus (USB)
• Device 2.0 and Embedded Host Low Speed and Full Speed
• Flexible End-Point Configuration and Management with Dedicated DMA Channels
• On-chip Transceivers Including Pull-Ups
• One 2-channel Controller Area Network (CAN)
• CAN2A and CAN2B protocol complian
• Two independent channels, 16 Message Objects per Channel

Table 40-43. Electrical Parameters

The USB on-chip buffers comply with the Universal Serial Bus (USB) v2.0 standard. All AC parameters related to these buffers can be found within the USB 2.0 electrical specifications.

Table 40-43. Electrical Parameters

*NOTICE:

Stresses beyond those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Notes: 1. VVDD corresponds to either V VDDIO1 , V VDDIO2 , V VDDIO3 , or V VDDANA , depending on the supply for the pin. Refer to Section 3-1 on page 11 for details.