AT32F435CGT7

Part: AT32F435CGT7 — Artery Technology Type: ARM Cortex-M4F MCU+FPU Description: 32-bit ARM Cortex-M4F MCU with FPU operating at up to 288 MHz, featuring 256 to 4032 KB Flash, 384 to 512 KB SRAM, dual QSPI, SDRAM, dual OTGFS, Ethernet, camera interface, 18 timers, 3 ADCs, and 23 communication interfaces.

Operating Conditions:

• Supply voltage: 2.6 V ~ 3.6 V
• Operating temperature: -40 to 105 °C
• Max CPU frequency: 288 MHz

Absolute Maximum Ratings:

Key Specs:

• CPU: ARM 32-bit Cortex-M4F with FPU
• Max CPU frequency: 288 MHz
• Flash memory: 256 to 4032 KBytes
• SRAM: 384 to 512 KBytes
• ADC: 3 x 12-bit, 5.33 MSPS, up to 24 channels
• DAC: 2 x 12-bit
• HICK accuracy: ±1% at TA=25 °C, ±2.5 % at TA=-40 to +105 °C
• I/O tolerance: Almost 5 V-tolerant

Features:

• Memory Protection Unit (MPU)
• Floating Point Unit (FPU) and DSP instructions
• sLib: configurable secured Flash library area
• External memory controller (XMC) for CF, SRAM, PSRAM, NOR, NAND, SDRAM
• Dual QSPI interfaces with memory mapping mode
• LCD parallel interface (8080/6800 modes)
• Low power modes: Sleep, Deepsleep, Standby
• VBAT supply for LEXT, ERTC, and battery power registers
• Clock management with HEXT, HICK, PLL, LEXT, LICK
• Hardware oversampling up to equivalent 16-bit resolution for ADCs
• Temperature sensor, internal reference voltage, VBAT monitor
• 2 x general-purpose DMAs and 1 x EDMA (22 channels total)
• Up to 116 Fast I/O Interfaces, mappable to 16 external interrupt vectors
• Up to 18 Timers (13x 16-bit, 2x 32-bit, 2x Watchdog, SysTick)
• Enhanced RTC with auto wakeup, alarm, subsecond precision
• Up to 23 communication interfaces: I2C (3), USART/UART (8), SPI (4) with I2S, CAN (2), OTG FS (2), SDIO (2), Infrared transmitter
• 10/100M Ethernet MAC with dedicated DMA and SRAM (for AT32F437 only)
• 8~14 bit parallel digital camera interface (DVP)
• CRC Calculation Unit
• 96-bit Unique ID (UID)
• Debug mode with SWD and JTAG interfaces

Applications:

Package:

• LQFP144 20 x 20 mm
• LQFP100 14 x 14 mm
• LQFP64 10 x 10 mm
• LQFP48 7 x 7 mm
• QFN48 6 x 6 mm

• Three power domains: VDD/VDDA domain, 1.2 V domain and battery powered domain
• Three types of power saving modes: Sleep mode, Deepsleep mode, and Standby mode
• Internal voltage regulator supplies 1.2 V voltage source for the core domain
• Power voltage detector is provided to issue an interrupt when the supply voltage is lower or higher than a programmed threshold
• The battery powered domain is powered by VBAT when VDD is powered off
• VDD/VDDA applies separated digital and analog module to reduce noise on external power

I cannot extract a complete pinout for the AT32F435CGT7 from the provided material.

Issue

The datasheet section provided contains only functional descriptions of analog input pins (VDDA, VSSA, VREF+, VREF-, ADCx_IN), not a structured pin table with pin numbers and names for the specific package.

The part number AT32F435CGT7 indicates:

• C = LQFP100 package (100-pin)
• GT7 = specific variant

However, the source material does not include:

1. A pin assignment table for the LQFP100 package
2. Pin numbers (1–100) mapped to pin names
3. Pin types (I/O, power, ground, etc.)
4. Alternate functions or descriptions

What is needed

To extract the correct pinout, please provide:

• The pin configuration table or pin assignment table from the AT32F435CGT7 datasheet (typically labeled "Pin Definitions," "Pin Configuration," or "Pin Assignment")
• A package diagram showing pin numbers 1–100 with labels, OR
• A table with columns: Pin Number | Pin Name | Type | Description

Without this information, I cannot reliably determine which of the 100 pins correspond to which functions, and I will not guess or fabricate pin assignments.