APM32F407IET6

Part: APM32F407VGT6 (APM32F405xG / APM32F407xExG series) — Geehy

Type: Arm Cortex-M4F 32-bit MCU

Description: 32-bit Arm Cortex-M4F MCU with FPU running at up to 168 MHz, with up to 1 MB Flash, 192 KB system SRAM plus 4 KB backup SRAM, and a 1.8–3.6 V supply. The APM32F407VGT6 is the LQFP100 package with 1024 KB Flash.

Operating Conditions:

• Supply voltage (VDD): 1.8–3.6 V
• Operating temperature: -40 to 85 °C (temperature number 6; number 7 grade is -40 to 105 °C)
• Max AHB clock (fHCLK): 168 MHz; APB1 42 MHz; APB2 84 MHz
• VDDA: 1.8–2.4 V when neither ADC nor DAC is used; 2.4–3.6 V when ADC and DAC are used
• VBAT (backup domain): 1.65–3.6 V

Absolute Maximum Ratings:

• Absolute maximum values are given in the datasheet's section 5.3 (maximum temperature, voltage and current characteristics). The values are not included in the provided text.

Key Specs:

• Core and clock: Cortex-M4F with FPU, up to 168 MHz
• Memory: Flash up to 1 MB (1024 KB on the VGT variant); SRAM 192 KB system + 4 KB backup
• Supply: VDD 1.8–3.6 V; VBAT 1.65–3.6 V
• GPIOs: 82 on the LQFP100 package (up to 140 across the family)
• Communication: 4 USART + 2 UART, 3 I2C, 3 SPI (2 with I2S), 2 CAN, USB OTG, SDIO, Ethernet
• Analog: 3 × 12-bit ADC, 2 × 12-bit DAC
• DMA: 2 controllers, 8 streams each (16 total)
• Clocks: HSE 4–26 MHz, LSE 32.768 kHz, HSI 16 MHz RC, LSI 28 kHz RC

Features:

• Arm Cortex-M4F core with FPU
• External memory controller (EMMC) supporting CF card, SRAM, PSRAM, SDRAM, NOR and NAND
• POR/PDR/BOR and programmable voltage detector (PVD)
• Sleep, stop and standby low-power modes
• JTAG and SWD debug interfaces
• 2 advanced timers (TMR1/8) with 7-channel PWM, dead-time generation and brake input
• 2 × 32-bit and 8 × 16-bit general-purpose timers, 2 basic timers
• Independent and window watchdog timers, 24-bit SysTick
• RTC with calendar, alarm and wake-up from stop/standby
• CRC unit and 96-bit unique device ID
• ISO7816, LIN, IrDA and SMBus/PMBus support

Applications:

Package:

• LQFP100 (APM32F407VGT6)
• Other family packages: LQFP64, LQFP144, LQFP176, BGA176

Table 2 Legends/Abbreviations Used in Output Pin Table

Table 2 Legends/Abbreviations Used in Output Pin Table

Table 53 12-bit ADC Characteristics

If the load on the device exceeds the absolute maximum rating, it may cause permanent damage to the device. Here, only the maximum load that can be borne is given, and there is no guarantee that the device functions normally under this condition.

Figure 17 LQFP176 Package Diagram

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Figure 17 LQFP176 Package Diagram

• (1) The figure is not drawn to scale.
• (2) All pins should be soldered to the PCB.

Table 58 LQFP176 Package Data

Note: Dimensions are marked in millimeters.

Figure 18 LQFP176 -176 Pins, 24 x24mm Welding Layout Recommendations

Table 58 LQFP176 Package Data

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Figure 18 LQFP176 -176 Pins, 24 x24mm Welding Layout Recommendations

Figure 19 LQFP176 -176 Pins, 24 x24mm Schematic Diagram