ADAU1701S
SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
Manufacturer
Analog Devices Inc.
Category
Integrated Circuits (ICs)
Overview
Part: ADAU1701 from Analog Devices
Type: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
Key Specs:
- Digital audio processor: 28-/56-bit, 50 MIPS
- ADCs SNR: 100 dB
- ADCs THD + N: -83 dB
- DACs SNR: 104 dB
- DACs THD + N: -90 dB
- Sampling rates: up to 192 kHz
- Multiplier: 28-bit × 28-bit with 56-bit accumulator
Features:
- 28-/56-bit, 50 MIPS digital audio processor
- 2 ADCs: SNR of 100 dB, THD + N of -83 dB
- 4 DACs: SNR of 104 dB, THD + N of -90 dB
- Complete standalone operation
- Self-boot from serial EEPROM
- Auxiliary ADC with 4-input mux for analog control
- GPIOs for digital controls and outputs
- Fully programmable with SigmaStudio graphical tool
- 28-bit × 28-bit multiplier with 56-bit accumulator for full double-precision processing
- Clock oscillator for generating a master clock from crystal
- PLL for generating master clock from 64 × fS, 256 × fS, 384 × fS, or 512 × fS clocks
- Flexible serial data input/output ports with I2S-compatible, left-justified, right-justified, and TDM modes
- Sampling rates of up to 192 kHz are supported
- On-chip voltage regulator for compatibility with 3.3V systems
Applications:
- Multimedia speaker systems
- MP3 player speaker docks
- Automotive head units
- Minicomponent stereos
- Digital televisions
- Studio monitors
- Speaker crossovers
- Musical instrument effects processors
- In-seat sound systems (aircraft/motor coaches)
Package:
- 48-lead, plastic LQFP: null
Features
28-/56-bit, 50 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of -83 dB 4 DACs: SNR of 104 dB, THD + N of -90 dB Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double-precision processing Clock oscillator for generating a master clock from crystal PLL for generating master clock from 64 × fS, 256 × fS, 384 × fS, or 512 × fS clocks Flexible serial data input/output ports with I2S-compatible, left-justified, right-justified, and TDM modes Sampling rates of up to 192 kHz are supported On-chip voltage regulator for compatibility with 3.3V systems
Applications
48-lead, plastic LQFP
Multimedia speaker systems MP3 player speaker docks Automotive head units Minicomponent stereos Digital televisions Studio monitors Speaker crossovers Musical instrument effects processors In-seat sound systems (aircraft/motor coaches)
Pin Configuration
| Pin No. | Mnemonic | Type1 | Description |
|---|---|---|---|
| 1, 37, 42 | AGND | PWR | Analog Ground Pin. The AGND, DGND, and PGND pins can be tied directly together in a common ground plane. Decouple AGND to an AVDD pin with a 100 nF capacitor. |
| 2 | ADC0 | A_IN | Analog Audio Input 0. Full-scale 100 μA rms input. Current input allows input voltage level to be scaled with an external resistor. An 18 kΩ resistor gives a 2 V rms full-scale input. See the Audio ADCs section for details. |
| 3 | ADC_RES | A_IN | ADC Reference Current. Set the full-scale current of the ADCs with an external 18 kΩ resistor connected between this pin and ground. See the Audio ADCs section for details. |
| 4 | ADC1 | A_IN | Analog Audio Input 1. Full-scale 100 μA rms input. Current input allows the input voltage level to be scaled with an external resistor. An 18 kΩ resistor gives a 2 V rms full-scale input. |
| 5 | RESET | D_IN | Active Low Reset Input. Reset is triggered on a high-to-low edge, and the ADAU1701 exits reset on a low-to-high edge. For more information about initialization, see the Power-Up Sequence section for details. |
| 6 | SELFBOOT | D_IN | Enable/Disable Self-Boot. SELFBOOT selects control port (low) or self-boot (high). Setting this pin high initiates a self-boot operation when the ADAU1701 is brought out of a reset. This pin can be tied directly to the control voltage or pulled up/down with a resistor. See the Self-Boot section for details. |
| 7 | ADDR0 | D_IN | I²C and SPI Address 0. In combination with ADDR1 function on Pin 20, this pin allows up to four ADAU1701 devices to be used on the same I²C bus and up to two ICs to be used with a common SPI CLATCH signal. See the I²C Port section for details. |
| 8 | MP4 | D_IO | Multipurpose GPIO or Serial Input Port LRCLK (INPUT_LRCLK). See the Multipurpose Pins section for more details. |
| 9 | MP5 | D_IO | Multipurpose GPIO or Serial Input Port BCLK (INPUT_BCLK). See the Multipurpose Pins section for more details. |
| 10 | MP1 | D_IO | Multipurpose GPIO or Serial Input Port Data 1 (SDATA_IN0). See the Multipurpose Pins section for more details. |
| 11 | MP0 | D_IO | Multipurpose GPIO or Serial Input Port Data 0 (SDATA_IN1). See the Multipurpose Pins section for more details. |
| 12, 25 | DGND | PWR | Digital Ground Pin. The AGND, DGND, and PGND pins can be tied directly together in a common ground plane. Decouple DGND to a DVDD pin with a 100 nF capacitor. |
| 13, 24 | DVDD | PWR | 1.8 V Digital Supply. This can be supplied either externally or generated from a 3.3 V supply with the on-board 1.8 V regulator. Decouple DVDD to DGND with a 100 nF capacitor. |
| Pin No. | Mnemonic | Type1 | Description |
|---|---|---|---|
| 14 | MP7 | D_IO | Multipurpose GPIO or Serial Output Port Data 1 (SDATA_OUT1). See the Multipurpose Pins section for more details. |
| 15 | MP6 | D_IO | Multipurpose GPIO, Serial Output Port Data 0, or TDM Data Output (SDATA_OUT0). See the Multipurpose Pins section for more details. |
| 16 | MP10 | D_IO | Multipurpose GPIO or Serial Output Port LRCLK (OUTPUT_LRCLK). See the Multipurpose Pins section for more details. |
| 17 | VDRIVE | A_OUT | Drive for 1.8 V Regulator. The base of the voltage regulator external PNP transistor is driven from VDRIVE. See the Voltage Regulator section for details. |
| 18 | IOVDD | PWR | Supply for Input and Output Pins. The voltage on this pin sets the highest input voltage that should be seen on the digital input pins. This pin is also the supply for the digital output signals on the control port and MP pins. Always set IOVDD to 3.3 V. The current draw of this pin is variable because it is dependent on the loads of the digital outputs. |
| 19 | MP11 | D_IO | Multipurpose GPIO or Serial Output Port BCLK (OUTPUT_BCLK). See the Multipurpose Pins section for more details. |
| 20 | ADDR1/CDATA/WB | D_IN | I²C Address 1/SPI Data Input/EEPROM Writeback Trigger. This is a multifunction pin as follows: ADDR1: I²C Address 1. In combination with ADDR0, this sets the I²C address of the IC so that four ADAU1701 devices can be used on the same I²C bus. See the I²C Port section for details. CDATA: SPI Data Input. See the SPI Port section for details. WB: EEPROM Writeback Trigger. A rising (default) or falling (if set in the EEPROM messages) edge on this pin triggers a writeback of the |
Absolute Maximum Ratings
Table 8.
| Parameter | Rating |
|---|---|
| DVDD to GND | 0 V to 2.2 V |
| AVDD to GND | 0 V to 4.0 V |
| IOVDD to GND | 0 V to 4.0 V |
| Digital Inputs | DGND - 0.3 V, IOVDD + 0.3 V |
| Maximum Junction Temperature | 135°C |
| Temperature Range | |
| Storage | -65°C to +150°C |
| Operating | 0°C to +70°C |
| Soldering (10 sec) | 300°C |
Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 9. Thermal Resistance
| Package Type | θJA | θJC | Unit |
|---|---|---|---|
| 48-Lead LQFP | 72 | 19.5 | °C/W |
ESD CAUTION
Thermal Information
θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 9. Thermal Resistance
| Package Type | θJA | θJC | Unit |
|---|---|---|---|
| 48-Lead LQFP | 72 | 19.5 | °C/W |
ESD CAUTION
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| ADAU1701 | Analog Devices Inc. | — |
| ADAU1701A | Analog Devices Inc. | — |
| ADAU1701C | Analog Devices Inc. | — |
| ADAU1701D | Analog Devices Inc. | — |
| ADAU1701H | Analog Devices Inc. | — |
| ADAU1701JSTZ | Analog Devices Inc. | 48-LQFP |
| ADAU1701JSTZ-RL | Analog Devices Inc. | — |
| ADAU1701M | Analog Devices Inc. | — |
| ADAU1701R | Analog Devices Inc. | — |
| ADAU1701T | Analog Devices Inc. | — |
Get structured datasheet data via API
Get started free