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W35N01JWxxxT

1Gb Octal SPI SLC NAND Flash

The W35N01JWxxxT is a 1gb octal spi slc nand flash from Winbond. View the full W35N01JWxxxT datasheet below including key specifications.

Official W35N01JWxxxT datasheet (PDF) — the source this page was extracted from.

Manufacturer

Winbond

Category

Memory ICs

Package

TFBGA-24 8x6mm

W35N01JWxxxT Key Specifications

ParameterValue
InterfaceOctal SPI
Read Speed166MHz (SDR), 120MHz (DDR)
TechnologySLC NAND
Supply Voltage1.8V
Memory Capacity1G-bit

W35N01JWxxxT Overview

Part: W35N01JWxxxG/T — Winbond

Type: Serial SLC NAND Flash Memory

Description: 1.8V 1G-bit Serial SLC NAND Flash Memory with Octal SPI interface, supporting 166 MHz SDR and 120 MHz DDR buffer read and continuous read modes.

Operating Conditions:

  • Supply voltage: 1.8 V
  • Max SDR clock frequency: 166 MHz
  • Max DDR clock frequency: 120 MHz

Key Specs:

  • Memory Capacity: 1 G-bit
  • Interface: Octal SPI (OSPI)
  • Single Data Rate (SDR) Clock: 166 MHz
  • Double Data Rate (DDR) Clock: 120 MHz
  • Block Erase Size: 256 KB
  • Read Modes: Buffer Read, Continuous Read
  • ECC: Integrated ECC support
  • Bad Block Management: Supported

Features:

  • 1 G-bit SLC NAND Flash
  • Octal SPI (OSPI) interface
  • Single Data Rate (SDR) and Double Data Rate (DDR) modes
  • Buffer Read and Continuous Read modes
  • Integrated ECC
  • Bad Block Management
  • Software and Hardware Reset options

W35N01JWxxxT Features

  • New Octal DDR Serial NAND Memories
  • W35N01JW: 1G-bit / 128M-Byte
  • Supported Synchronous Bus I/F
  • Byte-Wide (x8) Multiplexed Synchronous IO
  • Single Data Rate and Double Data Rate
  • DDR Bus Mode
  • Octal Double Data Rate (ODDR) protocol: CLK, /CS, IO[7:0], DS, /Reset
  • SDR Bus Mode
  • Octal SPI (OSPI) and OSPI DDR protocol: CLK, /CS, IO[7:0] /WP, /Reset
  • Standard SPI protocol (SPI): CLK, /CS, IO0, IO1, /WP, /Reset
  • Clock Frequency
  • 166MHz SDR max (166MB/s)
  • 120MHz DDR max (240MB/s) with DS
  • Efficient 'Continuous Read Mode' (1)
  • Alternative method to the Buffer Read Mode
  • No need to issue 'Page Data Read' between Read commands
  • Allows direct read access to the entire array
  • Flexible Architecture with 256KB blocks
  • Uniform 256K-Byte Block Erase
  • Flexible page data load methods
  • Advanced Features
  • On-chip 1-Bit ECC for memory array
  • ECC status bits indicate ECC results
  • Bad Block Management and LUT (2) access
  • Software and Hardware Write-Protect
  • Power Supply Lock-Down and OTP protection
  • Unique ID and parameter pages
  • Ten 4KB OTP pages (3)
  • Space Efficient Packaging
  • 24-ball TFBGA 8x6-mm
  • Contact Winbond for other package options
  1. Only the Read command structures are different between the 'Continuous Read Mode (BUF=0)' and the 'Buffer Read Mode (BUF=1)', all other commands are identical W35N01JWxxxG: Default BUF=1 after power up W35N01JWxxxT: Default BUF=0 after power up
  2. LUT stands for Look-Up Table
  3. OTP pages can only be programmed
  • 5 - Revision A

Variants on the same datasheet

These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.

Part NumberManufacturerPackage
W35N01JWWinbond—

Other Memory ICs

All Memory ICs datasheetsAll Winbond datasheets (73)

Data on this page is extracted from publicly available manufacturer datasheets using automated tools including AI. It may contain errors or omissions. Always verify specifications against the official manufacturer datasheet before making design or purchasing decisions. See our Terms of Service. Rights holders can submit a takedown request.

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Then ask: "Can the W35N01JWxxxT run from my 12 V rail? Check it against the datasheet limits."

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