STM32G030J6
Arm Cortex-M0+ 32-bit MCUThe STM32G030J6 is a arm cortex-m0+ 32-bit mcu from STMicroelectronics. View the full STM32G030J6 datasheet below including key specifications, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
Integrated CircuitsKey Specifications
| Parameter | Value |
|---|---|
| Connectivity | I2C, IrDA, LINbus, SPI, SmartCard, UART/USART |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Converters | A/D 13x12b |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| Mounting Type | Surface Mount |
| Number of I/O | 17 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Package / Case | 20-TSSOP (0.173", 4.40mm Width) |
| Peripherals | DMA, I2S, POR, PWM, WDT |
| Flash Memory Size | 32KB (32K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8K x 8 B |
| Clock Speed | 64MHz |
| Supplier Device Package | 20-TSSOP |
| Supplier Device Package | 20-TSSOP |
| Supply Voltage | 2V ~ 3.6V |
Overview
Part: STM32G030x6/x8 from STMicroelectronics
Type: ARM Cortex-M0+ 32-bit MCU
Description: A 32-bit ARM Cortex-M0+ MCU operating up to 64 MHz, featuring up to 64 KB Flash, 8 KB SRAM, multiple communication interfaces including I2C, USART, and SPI, and a 12-bit ADC, with a 2.0–3.6 V supply voltage.
Operating Conditions:
- Supply voltage: 2.0 V to 3.6 V
- Operating temperature: -40°C to 85°C
- Max CPU frequency: 64 MHz
Absolute Maximum Ratings:
- Max supply voltage: 4.0 V (VDD)
- Max junction/storage temperature: 125 °C
Key Specs:
- CPU: Arm® 32-bit Cortex®-M0+
- CPU frequency: Up to 64 MHz
- Flash memory: Up to 64 Kbytes
- SRAM: 8 Kbytes with HW parity check
- ADC: 12-bit, 0.4 μs (up to 16 external channels)
- I/Os: Up to 44 fast I/Os, multiple 5 V-tolerant
- I2C speed: 1 Mbit/s (Fast-mode Plus)
- SPI speed: 32 Mbit/s
Features:
- Low-power modes: Sleep, Stop, Standby
- 5-channel DMA controller with flexible mapping
- Calendar RTC with alarm and periodic wakeup
- Internal 16 MHz RC with PLL option
- Development support: Serial wire debug (SWD)
Applications:
- null
Package:
- SO8N
- TSSOP20
- LQFP32
- LQFP48
Features
- Includes ST state-of-the-art patented technology
- Core: Arm ® 32-bit Cortex ® -M0+ CPU, frequency up to 64 MHz
- -40°C to 85°C operating temperature
- Memories
- -8 Kbytes of SRAM with HW parity check
- -Up to 64 Kbytes of flash memory with protection
- CRC calculation unit
- Reset and power management
- -Power-on/Power-down reset (POR/PDR)
- -Voltage range: 2.0 V to 3.6 V
- -Low-power modes: Sleep, Stop, Standby
- -VBAT supply for RTC and backup registers
- Clock management
- -32 kHz crystal oscillator with calibration
- -4 to 48 MHz crystal oscillator
- -Internal 16 MHz RC with PLL option
- -Internal 32 kHz RC oscillator (±5 %)
- Up to 44 fast I/Os
- -Multiple 5 V-tolerant I/Os
- -All mappable on external interrupt vectors
- 5-channel DMA controller with flexible mapping
- 12-bit, 0.4 μs ADC (up to 16 ext. channels)
- -Conversion range: 0 to 3.6V
- -Up to 16-bit with hardware oversampling
- 8 timers: 16-bit for advanced motor control, four 16-bit general-purpose, two watchdogs, SysTick timer
- Calendar RTC with alarm and periodic wakeup from Stop/Standby
Pin Configuration
Figure 3. STM32G030Jx SO8N pinout
Figure 4. STM32G030Fx TSSOP20 pinout
Figure 5. STM32G030KxT LQFP32 pinout
34
Figure 6. STM32G030CxT LQFP48 pinout
Table 11. Terms and symbols used in Pin assignment and description table
| Column | Symbol Definition Terminal name corresponds parenthesis under the pin | Pin name to its by-default function at reset, unless otherwise name. |
|---|---|---|
| Supply pin | Supply pin | |
| I | I Input | |
| FT RST Reset pin with embedded weak pull-up resistor Options for FT I/Os | 5 V tolerant I/O | |
| _f | _f | |
| I/O structure I/O, Fm+ capable _a Note | I/O, with analog switch function Functions Functions | |
| _e I/O, with switchable diode to V DDIO1 | Upon reset, all I/Os are set as analog inputs, unless otherwise specified. | |
| Pin functions | Alternate functions | |
| selected through GPIOx_AFR registers | Additional functions | Additional functions |
| directly selected/enabled through peripheral registers | ||
| directly selected/enabled through peripheral registers |
Table 12. Pin assignment and description
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| - | - | - | 1 |
| - | - | - | 2 |
| 1 | 2 | 2 | - |
| - | 3 | 3 | 3 |
| - | - | - | 4 |
| - | - | - | 5 |
| 2 | 4 | 4 | 6 |
| 3 | 5 | 5 | 7 |
| - | - | - | 8 |
| - | - | - | 9 |
| 4 | 6 | 6 | 10 |
| - | 7 | 7 | 11 |
| - | 8 | 8 | 12 |
| - | 9 | 9 | 13 |
| - | 10 | 10 | 14 |
| - | - | - | 15 |
Table 12. Pin assignment and description
34
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| - | 11 | 11 | - |
| - | 12 | 12 | 16 |
| - | 13 | 13 | 17 |
| - | 14 | 14 | 18 |
| 5 | 15 | 15 | 19 |
| 5 | 15 | 16 | 20 |
| - | 15 | 17 | 21 |
| - | - | - | 22 |
| - | - | - | 23 |
| - | - | - | 24 |
| - | - | - | 25 |
| - | - | - | 26 |
| - | - | - | 27 |
| 5 | 15 | 18 | 28 |
| - | - | 19 | 29 |
| - | - | 20 | 30 |
| - | - | - | 31 |
Table 12. Pin assignment and description (continued)
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| - | - | 21 | 32 |
| - | - | - | 33 |
| 5 | 16 | 22 | - |
| - | - | - | 34 |
| 6 | 17 | 23 | - |
| 7 | 18 | 24 | 35 |
| 8 | 19 | 25 | 36 |
| 8 | 19 | 26 | 37 |
| - | - | - | 38 |
| - | - | - | 39 |
| - | - | - | 40 |
| - | - | - | 41 |
| - | 20 | 27 | 42 |
| - | 20 | 28 | 43 |
Table 12. Pin assignment and description (continued)
34
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| 8 | 20 | 29 | 44 |
| 8 | 20 | 30 | 45 |
| - | - | - | 46 |
| 1 | 1 | 31 | - |
| 1 | 1 | 32 | 47 |
| 1 | 2 | 1 | 48 |
- PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:
- These GPIOs must not be used as current sources (for example to drive a LED).
- The speed should not exceed 2 MHz with a maximum load of 30 pF
- After an RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers. The RTC registers are not reset upon system reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the RM0444 reference manual.
- As in SO8N device, the PA0, PA1, and PA2 GPIOs are bonded with NRST on the pin 4, low level applied to any of these GPIOs provokes the device reset. To prevent the risk of spurious resets, keep these GPIOs configured at all times as analog or digital inputs (as opposed to output or alternate function).
- Pins PA9 and PA10 can be remapped in place of pins PA11 and PA12 (default mapping), using SYSCFG_CFGR1 register.
- Upon reset, these pins are configured as SW debug alternate functions, and the internal pull-up on PA13 pin and the internal pull-down on PA14 pin are activated.
Table 13. Port A alternate function mapping
Table 13. Port A alternate function mapping
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PA0 | SPI2_SCK | USART2_CTS | - | - | - | - | - | - |
| PA1 | SPI1_SCK/ I2S1_CK | USART2_RTS _DE_CK | - | - | - | - | I2C1_SMBA | EVENTOUT |
| PA2 | SPI1_MOSI/ I2S1_SD | USART2_TX | - | - | - | - | - | - |
| PA3 | SPI2_MISO | USART2_RX | - | - | - | - | - | EVENTOUT |
| PA4 | SPI1_NSS/ I2S1_WS | SPI2_MOSI | - | - | TIM14_CH1 | - | - | EVENTOUT |
| PA5 | SPI1_SCK/ I2S1_CK | - | - | - | - | - | - | EVENTOUT |
| PA6 | SPI1_MISO/ I2S1_MCK | TIM3_CH1 | TIM1_BKIN | - | - | TIM16_CH1 | - | - |
| PA7 | SPI1_MOSI/ I2S1_SD | TIM3_CH2 | TIM1_CH1N | - | TIM14_CH1 | TIM17_CH1 | - | - |
| PA8 | MCO | SPI2_NSS | TIM1_CH1 | - | - | - | - | EVENTOUT |
| PA9 | MCO | USART1_TX | TIM1_CH2 | - | SPI2_MISO | - | I2C1_SCL | EVENTOUT |
| PA10 | SPI2_MOSI | USART1_RX | TIM1_CH3 | - | - | TIM17_BKIN | I2C1_SDA | EVENTOUT |
| PA11 | SPI1_MISO/ I2S1_MCK | USART1_CTS | TIM1_CH4 | - | - | TIM1_BKIN2 | I2C2_SCL | - |
| PA12 | SPI1_MOSI/ I2S1_SD | USART1_RTS _DE_CK | TIM1_ETR | - | - | I2S_CKIN | I2C2_SDA | - |
| PA13 | SWDIO | IR_OUT | - | - | - | - | - | EVENTOUT |
| PA14 | SWCLK | USART2_TX | - | - | - | - | - | EVENTOUT |
| PA15 | SPI1_NSS/ I2S1_WS | USART2_RX | - | - | - | - | - | EVENTOUT |
Table 13. Port A alternate function mapping
Table 14. Port B alternate function mapping
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PB0 | SPI1_NSS/ I2S1_WS | TIM3_CH3 | TIM1_CH2N | - | - | - | - | - |
| PB1 | TIM14_CH1 | TIM3_CH4 | TIM1_CH3N | - | - | - | - | EVENTOUT |
| PB2 | - | SPI2_MISO | - | - | - | - | - | EVENTOUT |
| PB3 | SPI1_SCK/ I2S1_CK | TIM1_CH2 | - | - | USART1_RTS _DE_CK | - | - | EVENTOUT |
| PB4 | SPI1_MISO/ I2S1_MCK | TIM3_CH1 | - | - | USART1_CTS | TIM17_BKIN | - | EVENTOUT |
| PB5 | SPI1_MOSI/ I2S1_SD | TIM3_CH2 | TIM16_BKIN | - | - | - | I2C1_SMBA | - |
| PB6 | USART1_TX | TIM1_CH3 | TIM16_CH1N | - | SPI2_MISO | - | I2C1_SCL | EVENTOUT |
| PB7 | USART1_RX | SPI2_MOSI | TIM17_CH1N | - | - | - | I2C1_SDA | EVENTOUT |
| PB8 | - | SPI2_SCK | TIM16_CH1 | - | - | - | I2C1_SCL | EVENTOUT |
| PB9 | IR_OUT | - | TIM17_CH1 | - | - | SPI2_NSS | I2C1_SDA | EVENTOUT |
| PB10 | - | - | - | - | - | SPI2_SCK | I2C2_SCL | - |
| PB11 | SPI2_MOSI | - | - | - | - | - | I2C2_SDA | - |
| PB12 | SPI2_NSS | - | TIM1_BKIN | - | - | - | - | EVENTOUT |
| PB13 | SPI2_SCK | - | TIM1_CH1N | - | - | - | I2C2_SCL | EVENTOUT |
| PB14 | SPI2_MISO | - | TIM1_CH2N | - | - | - | I2C2_SDA | EVENTOUT |
| PB15 | SPI2_MOSI | - | TIM1_CH3N | - | - | - | - | EVENTOUT |
Table 14. Port B alternate function mapping
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 18 , Table 19 and Table 20 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. The device mission profile (application conditions) is compliant with the JEDEC JESD47 qualification standard.
All voltages are defined with respect to V SS .
Table 18. Voltage characteristics
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD | External supply voltage | -0.3 | 4.0 | V |
| V BAT | External supply voltage on VBAT pin | -0.3 | 4.0 | V |
| V REF+ | External voltage on VREF+ pin | -0.3 | Min(V DD + 0.4, 4.0) | V |
| V IN (1) | Input voltage on FT_xx | -0.3 | V DD + 4.0 (2)(3) | V |
| V IN (1) | Input voltage on any other pin | -0.3 | 4.0 | V |
- To sustain a voltage higher than 4 V the internal pull-up/pull-down resistors must be disabled.
- When an FT_a pin is used by an analog peripheral such as ADC, the maximum V IN is 4 V.
Table 19. Current characteristics
| Symbol | Ratings | Max | Unit |
|---|---|---|---|
| I VDD/VDDA | Current into VDD/VDDA power pin (source) (1) | 100 | mA |
| I VSS/VSSA | Current out of VSS/VSSA ground pin (sink) (2) | 100 | mA |
| I IO(PIN) | Output current sunk by any I/O and control pin except FT_f | 15 | mA |
| I IO(PIN) | Output current sunk by any FT_f pin | 20 | mA |
| I IO(PIN) | Output current sourced by any I/O and control pin | 15 | mA |
Table 19. Current characteristics
Table 19. Current characteristics (continued)
| Symbol | Ratings | Max | Unit |
|---|---|---|---|
| ∑ I IO(PIN) | Total output current sunk by sum of all I/Os and control pins | 80 | mA |
| ∑ I IO(PIN) | Total output current sourced by sum of all I/Os and control pins | 80 | mA |
| I INJ(PIN) (2) | Injected current on a FT_xx pin | -5 / NA (3) | mA |
| ∑ |I INJ(PIN) | | Total injected current (sum of all I/Os and control pins) (4) | 25 | mA |
- Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value.
- When several inputs are submitted to a current injection, the maximum ∑ |I INJ(PIN) | is the absolute sum of the negative injected currents (instantaneous values).
Table 20. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
Thermal Information
The operating junction temperature T J must never exceed the maximum given in Table 21: General operating conditions
The maximum junction temperature in °C that the device can reach if respecting the operating conditions, is:T _ { J } ( max ) = T _ { A } ( max ) + P _ { D } ( max ) × Θ _ { J A }$
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32G030C6 | STMicroelectronics | — |
| STM32G030C8 | STMicroelectronics | — |
| STM32G030C8T6 | STMicroelectronics | 48-LQFP |
| STM32G030F6 | STMicroelectronics | — |
| STM32G030F6P6 | STMicroelectronics | 20-TSSOP (0.173", 4.40mm Width) |
| STM32G030K6 | STMicroelectronics | — |
| STM32G030K8 | STMicroelectronics | — |
| STM32G030X6/X8 | STMicroelectronics | — |
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