STM32G030C8T6
ARM Cortex-M0+ MCUThe STM32G030C8T6 is a arm cortex-m0+ mcu from STMicroelectronics. View the full STM32G030C8T6 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.
Manufacturer
STMicroelectronics
Category
ARM Cortex-M0+ MCU
Package
48-LQFP
Lifecycle
Active
Key Specifications
| Parameter | Value |
|---|---|
| Connectivity | I2C, IrDA, LINbus, SPI, SmartCard, UART/USART |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Converters | A/D 19x12b |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| DigiKey Programmable | Not Verified |
| Mounting Type | Surface Mount |
| Number of I/O | 44 |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Oscillator Type | External, Internal |
| Package / Case | 48-LQFP |
| Packaging | Tray |
| Packaging | Tray |
| Packaging | Tray |
| Peripherals | DMA, I2S, POR, PWM, WDT |
| Flash Memory Size | 64KB (64K x 8) |
| Program Memory Type | FLASH |
| RAM Size | 8K x 8 B |
| Clock Speed | 64MHz |
| Standard Pack Qty | 1500 |
| Standard Pack Qty | 1500 |
| Standard Pack Qty | 1500 |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supplier Device Package | 48-LQFP (7x7) |
| Supply Voltage | 2V ~ 3.6V |
Overview
Part: STM32G030x6/x8 — STMicroelectronics
Type: Arm Cortex-M0+ 32-bit MCU
Description: Arm Cortex-M0+ 32-bit MCU operating at up to 64 MHz, featuring up to 64 KB Flash memory, 8 KB SRAM, 2x USART, 2x I2C, 2x SPI, multiple timers, and a 12-bit ADC.
Operating Conditions:
- Supply voltage: 2.0 V to 3.6 V
- Operating temperature: -40°C to 85°C
- Max CPU frequency: 64 MHz
Absolute Maximum Ratings:
- Max supply voltage (V DD ): 4.0 V
- Max input voltage (V IN ): V DD + 4.0 V
- Max continuous supply current (I DD ): 100 mA
- Max junction/storage temperature: 150 °C
Key Specs:
- CPU core: Arm 32-bit Cortex-M0+
- Flash memory: Up to 64 Kbytes
- SRAM: 8 Kbytes with HW parity check
- ADC resolution: 12-bit
- ADC conversion time: 0.4 μs
- I2C interfaces: Two, supporting Fast-mode Plus (1 Mbit/s)
- SPI interfaces: Two, up to 32 Mbit/s
- Internal HSI16 RC oscillator accuracy: ±1 % (at 25°C, 3.3V)
- GPIOs: Up to 44 fast I/Os, multiple 5 V-tolerant
Features:
- 5-channel DMA controller with flexible mapping
- Power-on/Power-down reset (POR/PDR)
- Low-power modes: Sleep, Stop, Standby
- VBAT supply for RTC and backup registers
- Calendar RTC with alarm and periodic wakeup
- Serial wire debug (SWD) support
Package:
- LQFP48
- LQFP32
- TSSOP20
- SO8N
Features
- Core: Arm ® 32-bit Cortex ® -M0+ CPU, frequency up to 64 MHz
- -40°C to 85°C operating temperature
- Memories
- -Up to 64 Kbytes of Flash memory with protection
- -8 Kbytes of SRAM with HW parity check
- CRC calculation unit
- Reset and power management
- -Voltage range: 2.0 V to 3.6 V
- -Power-on/Power-down reset (POR/PDR)
- -Low-power modes: Sleep, Stop, Standby
- -VBAT supply for RTC and backup registers
- Clock management
- -4 to 48 MHz crystal oscillator
- -32 kHz crystal oscillator with calibration
- -Internal 16 MHz RC with PLL option
- -Internal 32 kHz RC oscillator (±5 %)
- Up to 44 fast I/Os
- -All mappable on external interrupt vectors
- -Multiple 5 V-tolerant I/Os
- 5-channel DMA controller with flexible mapping
- 12-bit, 0.4 μs ADC (up to 16 ext. channels)
- -Up to 16-bit with hardware oversampling
- -Conversion range: 0 to 3.6V
- 8 timers: 16-bit for advanced motor control, four 16-bit general-purpose, two watchdogs, SysTick timer
- Calendar RTC with alarm and periodic wakeup from Stop/Standby
Pin Configuration
Figure 3. STM32G030CxT LQFP48 pinout
Figure 4. STM32G030KxT LQFP32 pinout
34
Figure 5. STM32G030Fx TSSOP20 pinout
MSv47963V1
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
PB7/PB8
VDD/VDDA
PA1
NRST
PB3/PB4/PB5/PB6
PA13
PA5
PA6
PA7
PB0/PB1/PB2/PA8
12
11
9
10
PA3
PA15/PA14-BOOT0
VSS/VSSA
PA4
PB9/PC14-OSC32_IN
PC15-OSC32_OUT
PA11[PA9]
PA12[PA10]
PA0
PA2
Top view
Figure 6. STM32G030Jx SO8N pinout
MSv47964V1
1
2
3
4
-
8 PB5/PB6/PA14-BOOT0/PA15
-
7 PA13
-
6 PA12[PA10]
-
5 PA8/PA11[PA9]/PB0/PB1
PB7/PB8/PB9/PC14-OSC32_IN
PA0/PA1/PA2/NRST
-
VDD/VDDA
-
VSS/VSSA
Top view
Table 11. Terms and symbols used in Table 12
Table 11. Terms and symbols used in Table 12
| Column | Symbol | Definition |
|---|---|---|
| Pin name | Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name. | Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name. |
| Pin type | S | Supply pin |
| Pin type | I | Input only pin |
| Pin type | I/O | Input / output pin |
| I/O structure | FT | 5 V tolerant I/O |
| I/O structure | RST | Bidirectional reset pin with embedded weak pull-up resistor |
| I/O structure | Options for FT I/Os | Options for FT I/Os |
| I/O structure | _f | I/O, Fm+ capable |
| I/O structure | _a | I/O, with analog switch function |
| I/O structure | _e | I/O, with switchable diode to V DD |
| Note | Upon reset, all I/Os are set as analog inputs, unless otherwise specified. | Upon reset, all I/Os are set as analog inputs, unless otherwise specified. |
Table 11. Terms and symbols used in Table 12
Table 11. Terms and symbols used in Table 12 (continued)
| Column | Column | Symbol | Definition |
|---|---|---|---|
| Pin functions | Alternate functions | Functions selected through GPIOx_AFR registers | Functions selected through GPIOx_AFR registers |
| Pin functions | Additional functions | Functions directly selected/enabled through peripheral registers | Functions directly selected/enabled through peripheral registers |
Table 12. Pin assignment and description
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| - | - | - | 1 |
| - | - | - | 2 |
| 1 | 2 | 2 | - |
| - | 3 | 3 | 3 |
| - | - | - | 4 |
| - | - | - | 5 |
| 2 | 4 | 4 | 6 |
| 3 | 5 | 5 | 7 |
| - | - | - | 8 |
| - | - | - | 9 |
| 4 | 6 | 6 | 10 |
| 4 | 7 | 7 | 11 |
| 4 | 8 | 8 | 12 |
Table 12. Pin assignment and description
34
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| 4 | 9 | 9 | 13 |
| - | 10 | 10 | 14 |
| - | - | - | 15 |
| - | 11 | 11 | - |
| - | 12 | 12 | 16 |
| - | 13 | 13 | 17 |
| - | 14 | 14 | 18 |
| 5 | 15 | 15 | 19 |
| 5 | 15 | 16 | 20 |
| - | 15 | 17 | 21 |
| - | - | - | 22 |
| - | - | - | 23 |
| - | - | - | 24 |
| - | - | - | 25 |
| - | - | - | 26 |
| - | - | - | 27 |
| 5 | 15 | 18 | 28 |
Table 12. Pin assignment and description (continued)
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin |
|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 |
| - | - | 19 | 29 |
| - | - | 20 | 30 |
| - | - | - | 31 |
| - | - | 21 | 32 |
| - | - | - | 33 |
| 5 | 16 | 22 | - |
| - | - | - | 34 |
| 6 | 17 | 23 | - |
| 7 | 18 | 24 | 35 |
| 8 | 19 | 25 | 36 |
| 8 | 19 | 26 | 37 |
| - | - | - | 38 |
| - | - | - | 39 |
| - | - | - | 40 |
| - | - | - | 41 |
Table 12. Pin assignment and description (continued)
34
Table 12. Pin assignment and description (continued)
| Pin | Pin | Pin | Pin | Pin name (function |
|---|---|---|---|---|
| SO8N | TSSOP20 | LQFP32 | LQFP48 | upon reset) |
| - | 20 | 27 | 42 | PB3 |
| - | 20 | 28 | 43 | PB4 |
| 8 | 20 | 29 | 44 | PB5 |
| 8 | 20 | 30 | 45 | PB6 |
| - | - | - | 46 | PB7 |
| 1 | 1 | 31 | - | PB7 |
| 1 | 1 | 32 | 47 | PB8 |
| 1 | 2 | 1 | 48 | PB9 |
- PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:
- These GPIOs must not be used as current sources (for example to drive a LED).
- The speed should not exceed 2 MHz with a maximum load of 30 pF
- After an RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers. The RTC registers are not reset upon system reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the RM0444 reference manual.
- For the device in SO8N package, the PA0, PA1, and PA2 GPIOs are bonded with NRST on the pin 4. In order not to interfere with device functions, they must not be set in alternate function or in output but remain at all times in input configuration.
- Pins PA9 and PA10 can be remapped in place of pins PA11 and PA12 (default mapping), using SYSCFG_CFGR1 register.
- Upon reset, these pins are configured as SW debug alternate functions, and the internal pull-up on PA13 pin and the internal pull-down on PA14 pin are activated.
Table 13. Port A alternate function mapping
Table 13. Port A alternate function mapping
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PA0 | SPI2_SCK | USART2_CTS | - | - | - | - | - | - |
| PA1 | SPI1_SCK/ I2S1_CK | USART2_RTS _DE_CK | - | - | - | - | I2C1_SMBA | EVENTOUT |
| PA2 | SPI1_MOSI/ I2S1_SD | USART2_TX | - | - | - | - | - | - |
| PA3 | SPI2_MISO | USART2_RX | - | - | - | - | - | EVENTOUT |
| PA4 | SPI1_NSS/ I2S1_WS | SPI2_MOSI | - | - | TIM14_CH1 | - | - | EVENTOUT |
| PA5 | SPI1_SCK/ I2S1_CK | - | - | - | - | - | - | EVENTOUT |
| PA6 | SPI1_MISO/ I2S1_MCK | TIM3_CH1 | TIM1_BKIN | - | - | TIM16_CH1 | - | - |
| PA7 | SPI1_MOSI/ I2S1_SD | TIM3_CH2 | TIM1_CH1N | - | TIM14_CH1 | TIM17_CH1 | - | - |
| PA8 | MCO | SPI2_NSS | TIM1_CH1 | - | - | - | - | EVENTOUT |
| PA9 | MCO | USART1_TX | TIM1_CH2 | - | SPI2_MISO | - | I2C1_SCL | EVENTOUT |
| PA10 | SPI2_MOSI | USART1_RX | TIM1_CH3 | - | - | TIM17_BKIN | I2C1_SDA | EVENTOUT |
| PA11 | SPI1_MISO/ I2S1_MCK | USART1_CTS | TIM1_CH4 | - | - | TIM1_BKIN2 | I2C2_SCL | - |
| PA12 | SPI1_MOSI/ I2S1_SD | USART1_RTS _DE_CK | TIM1_ETR | - | - | I2S_CKIN | I2C2_SDA | - |
| PA13 | SWDIO | IR_OUT | - | - | - | - | - | EVENTOUT |
| PA14 | SWCLK | USART2_TX | - | - | - | - | - | EVENTOUT |
| PA15 | SPI1_NSS/ I2S1_WS | USART2_RX | - | - | - | - | - | EVENTOUT |
Table 13. Port A alternate function mapping
Table 14. Port B alternate function mapping
| Port | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
|---|---|---|---|---|---|---|---|---|
| PB0 | SPI1_NSS/ I2S1_WS | TIM3_CH3 | TIM1_CH2N | - | - | - | - | - |
| PB1 | TIM14_CH1 | TIM3_CH4 | TIM1_CH3N | - | - | - | - | EVENTOUT |
| PB2 | - | SPI2_MISO | - | - | - | - | - | EVENTOUT |
| PB3 | SPI1_SCK/ I2S1_CK | TIM1_CH2 | - | - | USART1_RTS _DE_CK | - | - | EVENTOUT |
| PB4 | SPI1_MISO/ I2S1_MCK | TIM3_CH1 | - | - | USART1_CTS | TIM17_BKIN | - | EVENTOUT |
| PB5 | SPI1_MOSI/ I2S1_SD | TIM3_CH2 | TIM16_BKIN | - | - | - | I2C1_SMBA | - |
| PB6 | USART1_TX | TIM1_CH3 | TIM16_CH1N | - | SPI2_MISO | - | I2C1_SCL | EVENTOUT |
| PB7 | USART1_RX | SPI2_MOSI | TIM17_CH1N | - | - | - | I2C1_SDA | EVENTOUT |
| PB8 | - | SPI2_SCK | TIM16_CH1 | - | - | - | I2C1_SCL | EVENTOUT |
| PB9 | IR_OUT | - | TIM17_CH1 | - | - | SPI2_NSS | I2C1_SDA | EVENTOUT |
| PB10 | - | - | - | - | - | SPI2_SCK | I2C2_SCL | - |
| PB11 | SPI2_MOSI | - | - | - | - | - | I2C2_SDA | - |
| PB12 | SPI2_NSS | - | TIM1_BKIN | - | - | - | - | EVENTOUT |
| PB13 | SPI2_SCK | - | TIM1_CH1N | - | - | - | I2C2_SCL | EVENTOUT |
| PB14 | SPI2_MISO | - | TIM1_CH2N | - | - | - | I2C2_SDA | EVENTOUT |
| PB15 | SPI2_MOSI | - | TIM1_CH3N | - | - | - | - | EVENTOUT |
Table 14. Port B alternate function mapping
Electrical Characteristics
The definition and values of input/output AC characteristics are given in Figure 18 and Table 51 , respectively.
Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions .
Table 51. I/O AC characteristics (1)(2)
| Speed | Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|---|
| 00 | Fmax | Maximum frequency | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 2 | MHz |
| 00 | Fmax | Maximum frequency | C=50 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V | - | 0.35 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 3 | MHz |
| 00 | Fmax | Maximum frequency | C=10 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V | - | 0.45 | MHz |
| 00 | Tr/Tf | Output rise and fall time | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 100 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=50 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V | - | 225 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 75 | ns |
| 00 | Tr/Tf | Output rise and fall time | C=10 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V | - | 150 | ns |
Table 51. I/O AC characteristics (1)(2)
79
Table 51. I/O AC characteristics (1)(2) (continued)
| Speed | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|
| 01 | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 10 | MHz | |
| 01 | Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 2 | MHz |
| 01 | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 15 | MHz | |
| 01 | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 2.5 | MHz | |
| 01 | Tr/Tf Output rise and fall | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 30 | ns |
| 01 | time | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 60 | ns |
| 01 | Tr/Tf Output rise and fall | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 15 | ns |
| 01 | Tr/Tf Output rise and fall | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 30 | ns |
| 10 | Fmax Maximum frequency | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 30 | MHz |
| 10 | Fmax Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 15 | MHz |
| 10 | Fmax Maximum frequency | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 60 | MHz |
| 10 | Fmax Maximum frequency | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 30 | MHz |
| 10 | Tr/Tf Output rise and fall | C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 11 | ns |
| 10 | time | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 22 | ns |
| 10 | Tr/Tf Output rise and fall | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 4 | ns |
| 10 | Tr/Tf Output rise and fall | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 8 | ns |
| 11 | Fmax Maximum frequency | C=30 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 60 | MHz |
| 11 | Fmax Maximum frequency | C=30 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 30 | MHz |
| 11 | Fmax Maximum frequency | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 80 (3) | MHz |
| 11 | Fmax Maximum frequency | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 40 | MHz |
| 11 | Tr/Tf Output rise and fall | C=30 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 5.5 | ns |
| 11 | time | C=30 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 11 | ns |
| 11 | Tr/Tf Output rise and fall | C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V | - | 2.5 | ns |
| 11 | Tr/Tf Output rise and fall | C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V | - | 5 | ns |
| Fm+ | Maximum frequency | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 3.6 V | - | 1 | MHz |
| Fm+ | Output fall time (4) | C=50 pF, 1.6 V ≤ V DDIO1 ≤ 3.6 V | - | 5 | ns |
- Guaranteed by design.
- This value represents the I/O capability but the maximum system frequency is limited to 64 MHz.
- The fall time is defined between 70% and 30% of the output waveform, according to I 2 C specification.
Figure 18. I/O AC characteristics definition (1)
- Refer to Table 51: I/O AC characteristics .
Absolute Maximum Ratings
Stresses above the absolute maximum ratings listed in Table 18 , Table 19 and Table 20 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
All voltages are defined with respect to V SS .
Table 18. Voltage characteristics
| Symbol | Ratings | Min | Max | Unit |
|---|---|---|---|---|
| V DD | External supply voltage | - 0.3 | 4.0 | V |
| V BAT | External supply voltage on VBAT pin | - 0.3 | 4.0 | V |
| V REF+ | External voltage on VREF+ pin | - 0.3 | Min(V DD + 0.4, 4.0) | V |
| V IN (1) | Input voltage on FT_xx | - 0.3 | V DD + 4.0 (2) | V |
| V IN (1) | Input voltage on any other pin | - 0.3 | 4.0 | V |
Table 19. Current characteristics
| Symbol | Ratings | Max | Unit |
|---|---|---|---|
| I VDD/VDDA | Current into VDD/VDDA power pin (source) (1) | 100 | mA |
| I VSS/VSSA | Current out of VSS/VSSA ground pin (sink) (1) | 100 | mA |
| I IO(PIN) | Output current sunk by any I/O and control pin except FT_f | 15 | mA |
| I IO(PIN) | Output current sunk by any FT_f pin | 20 | mA |
| I IO(PIN) | Output current sourced by any I/O and control pin | 15 | mA |
| ∑I IO(PIN) | Total output current sunk by sum of all I/Os and control pins | 80 | mA |
| ∑I IO(PIN) | Total output current sourced by sum of all I/Os and control pins | 80 | mA |
| I INJ(PIN) (2) | Injected current on a FT_xx pin | -5 / NA (3) | mA |
| ∑\ | I INJ(PIN) \ | Total injected current (sum of all I/Os and control pins) (4) |
Table 20. Thermal characteristics
| Symbol | Ratings | Value | Unit |
|---|---|---|---|
| T STG | Storage temperature range | -65 to +150 | °C |
| T J | Maximum junction temperature | 150 | °C |
Thermal Information
The operating junction temperature T J must never exceed the maximum given in Table 21: General operating conditions
The maximum junction temperature in °C that the device can reach if respecting the operating conditions, is:
Package Information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| STM32G030C6 | STMicroelectronics | — |
| STM32G030C8 | STMicroelectronics | — |
| STM32G030F6 | STMicroelectronics | — |
| STM32G030J6 | STMicroelectronics | — |
| STM32G030K6 | STMicroelectronics | — |
| STM32G030K8 | STMicroelectronics | — |
| STM32G030X6/X8 | STMicroelectronics | — |
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