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STM32G030C8T6

ARM Cortex-M0+ MCU

The STM32G030C8T6 is a arm cortex-m0+ mcu from STMicroelectronics. View the full STM32G030C8T6 datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

Manufacturer

STMicroelectronics

Category

ARM Cortex-M0+ MCU

Package

48-LQFP

Lifecycle

Active

Key Specifications

ParameterValue
ConnectivityI2C, IrDA, LINbus, SPI, SmartCard, UART/USART
Core ProcessorARM® Cortex®-M0+
Core Size32-Bit
Data ConvertersA/D 19x12b
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
DigiKey ProgrammableNot Verified
Mounting TypeSurface Mount
Number of I/O44
Operating Temperature-40°C ~ 85°C (TA)
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Oscillator TypeExternal, Internal
Package / Case48-LQFP
PackagingTray
PackagingTray
PackagingTray
PeripheralsDMA, I2S, POR, PWM, WDT
Flash Memory Size64KB (64K x 8)
Program Memory TypeFLASH
RAM Size8K x 8 B
Clock Speed64MHz
Standard Pack Qty1500
Standard Pack Qty1500
Standard Pack Qty1500
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supplier Device Package48-LQFP (7x7)
Supply Voltage2V ~ 3.6V

Overview

Part: STM32G030x6/x8 — STMicroelectronics

Type: Arm Cortex-M0+ 32-bit MCU

Description: Arm Cortex-M0+ 32-bit MCU operating at up to 64 MHz, featuring up to 64 KB Flash memory, 8 KB SRAM, 2x USART, 2x I2C, 2x SPI, multiple timers, and a 12-bit ADC.

Operating Conditions:

  • Supply voltage: 2.0 V to 3.6 V
  • Operating temperature: -40°C to 85°C
  • Max CPU frequency: 64 MHz

Absolute Maximum Ratings:

  • Max supply voltage (V DD ): 4.0 V
  • Max input voltage (V IN ): V DD + 4.0 V
  • Max continuous supply current (I DD ): 100 mA
  • Max junction/storage temperature: 150 °C

Key Specs:

  • CPU core: Arm 32-bit Cortex-M0+
  • Flash memory: Up to 64 Kbytes
  • SRAM: 8 Kbytes with HW parity check
  • ADC resolution: 12-bit
  • ADC conversion time: 0.4 μs
  • I2C interfaces: Two, supporting Fast-mode Plus (1 Mbit/s)
  • SPI interfaces: Two, up to 32 Mbit/s
  • Internal HSI16 RC oscillator accuracy: ±1 % (at 25°C, 3.3V)
  • GPIOs: Up to 44 fast I/Os, multiple 5 V-tolerant

Features:

  • 5-channel DMA controller with flexible mapping
  • Power-on/Power-down reset (POR/PDR)
  • Low-power modes: Sleep, Stop, Standby
  • VBAT supply for RTC and backup registers
  • Calendar RTC with alarm and periodic wakeup
  • Serial wire debug (SWD) support

Package:

  • LQFP48
  • LQFP32
  • TSSOP20
  • SO8N

Features

  • Core: Arm ® 32-bit Cortex ® -M0+ CPU, frequency up to 64 MHz
  • -40°C to 85°C operating temperature
  • Memories
  • -Up to 64 Kbytes of Flash memory with protection
  • -8 Kbytes of SRAM with HW parity check
  • CRC calculation unit
  • Reset and power management
  • -Voltage range: 2.0 V to 3.6 V
  • -Power-on/Power-down reset (POR/PDR)
  • -Low-power modes: Sleep, Stop, Standby
  • -VBAT supply for RTC and backup registers
  • Clock management
  • -4 to 48 MHz crystal oscillator
  • -32 kHz crystal oscillator with calibration
  • -Internal 16 MHz RC with PLL option
  • -Internal 32 kHz RC oscillator (±5 %)
  • Up to 44 fast I/Os
  • -All mappable on external interrupt vectors
  • -Multiple 5 V-tolerant I/Os
  • 5-channel DMA controller with flexible mapping
  • 12-bit, 0.4 μs ADC (up to 16 ext. channels)
  • -Up to 16-bit with hardware oversampling
  • -Conversion range: 0 to 3.6V
  • 8 timers: 16-bit for advanced motor control, four 16-bit general-purpose, two watchdogs, SysTick timer
  • Calendar RTC with alarm and periodic wakeup from Stop/Standby

Pin Configuration

Figure 3. STM32G030CxT LQFP48 pinout

Figure 4. STM32G030KxT LQFP32 pinout

34

Figure 5. STM32G030Fx TSSOP20 pinout

MSv47963V1

20

19

18

17

16

15

14

13

1

2

3

4

5

6

7

8

PB7/PB8

VDD/VDDA

PA1

NRST

PB3/PB4/PB5/PB6

PA13

PA5

PA6

PA7

PB0/PB1/PB2/PA8

12

11

9

10

PA3

PA15/PA14-BOOT0

VSS/VSSA

PA4

PB9/PC14-OSC32_IN

PC15-OSC32_OUT

PA11[PA9]

PA12[PA10]

PA0

PA2

Top view

Figure 6. STM32G030Jx SO8N pinout

MSv47964V1

1

2

3

4

  • 8 PB5/PB6/PA14-BOOT0/PA15

  • 7 PA13

  • 6 PA12[PA10]

  • 5 PA8/PA11[PA9]/PB0/PB1

PB7/PB8/PB9/PC14-OSC32_IN

PA0/PA1/PA2/NRST

  • VDD/VDDA

  • VSS/VSSA

Top view

Table 11. Terms and symbols used in Table 12

Table 11. Terms and symbols used in Table 12

ColumnSymbolDefinition
Pin nameTerminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name.Terminal name corresponds to its by-default function at reset, unless otherwise specified in parenthesis under the pin name.
Pin typeSSupply pin
Pin typeIInput only pin
Pin typeI/OInput / output pin
I/O structureFT5 V tolerant I/O
I/O structureRSTBidirectional reset pin with embedded weak pull-up resistor
I/O structureOptions for FT I/OsOptions for FT I/Os
I/O structure_fI/O, Fm+ capable
I/O structure_aI/O, with analog switch function
I/O structure_eI/O, with switchable diode to V DD
NoteUpon reset, all I/Os are set as analog inputs, unless otherwise specified.Upon reset, all I/Os are set as analog inputs, unless otherwise specified.

Table 11. Terms and symbols used in Table 12

Table 11. Terms and symbols used in Table 12 (continued)

ColumnColumnSymbolDefinition
Pin functionsAlternate functionsFunctions selected through GPIOx_AFR registersFunctions selected through GPIOx_AFR registers
Pin functionsAdditional functionsFunctions directly selected/enabled through peripheral registersFunctions directly selected/enabled through peripheral registers

Table 12. Pin assignment and description

PinPinPinPin
SO8NTSSOP20LQFP32LQFP48
---1
---2
122-
-333
---4
---5
2446
3557
---8
---9
46610
47711
48812

Table 12. Pin assignment and description

34

Table 12. Pin assignment and description (continued)

PinPinPinPin
SO8NTSSOP20LQFP32LQFP48
49913
-101014
---15
-1111-
-121216
-131317
-141418
5151519
5151620
-151721
---22
---23
---24
---25
---26
---27
5151828

Table 12. Pin assignment and description (continued)

Table 12. Pin assignment and description (continued)

PinPinPinPin
SO8NTSSOP20LQFP32LQFP48
--1929
--2030
---31
--2132
---33
51622-
---34
61723-
7182435
8192536
8192637
---38
---39
---40
---41

Table 12. Pin assignment and description (continued)

34

Table 12. Pin assignment and description (continued)

PinPinPinPinPin name (function
SO8NTSSOP20LQFP32LQFP48upon reset)
-202742PB3
-202843PB4
8202944PB5
8203045PB6
---46PB7
1131-PB7
113247PB8
12148PB9
  1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:
  • These GPIOs must not be used as current sources (for example to drive a LED).
  • The speed should not exceed 2 MHz with a maximum load of 30 pF
  1. After an RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers. The RTC registers are not reset upon system reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the RM0444 reference manual.
  2. For the device in SO8N package, the PA0, PA1, and PA2 GPIOs are bonded with NRST on the pin 4. In order not to interfere with device functions, they must not be set in alternate function or in output but remain at all times in input configuration.
  3. Pins PA9 and PA10 can be remapped in place of pins PA11 and PA12 (default mapping), using SYSCFG_CFGR1 register.
  4. Upon reset, these pins are configured as SW debug alternate functions, and the internal pull-up on PA13 pin and the internal pull-down on PA14 pin are activated.

Table 13. Port A alternate function mapping

Table 13. Port A alternate function mapping

PortAF0AF1AF2AF3AF4AF5AF6AF7
PA0SPI2_SCKUSART2_CTS------
PA1SPI1_SCK/ I2S1_CKUSART2_RTS _DE_CK----I2C1_SMBAEVENTOUT
PA2SPI1_MOSI/ I2S1_SDUSART2_TX------
PA3SPI2_MISOUSART2_RX-----EVENTOUT
PA4SPI1_NSS/ I2S1_WSSPI2_MOSI--TIM14_CH1--EVENTOUT
PA5SPI1_SCK/ I2S1_CK------EVENTOUT
PA6SPI1_MISO/ I2S1_MCKTIM3_CH1TIM1_BKIN--TIM16_CH1--
PA7SPI1_MOSI/ I2S1_SDTIM3_CH2TIM1_CH1N-TIM14_CH1TIM17_CH1--
PA8MCOSPI2_NSSTIM1_CH1----EVENTOUT
PA9MCOUSART1_TXTIM1_CH2-SPI2_MISO-I2C1_SCLEVENTOUT
PA10SPI2_MOSIUSART1_RXTIM1_CH3--TIM17_BKINI2C1_SDAEVENTOUT
PA11SPI1_MISO/ I2S1_MCKUSART1_CTSTIM1_CH4--TIM1_BKIN2I2C2_SCL-
PA12SPI1_MOSI/ I2S1_SDUSART1_RTS _DE_CKTIM1_ETR--I2S_CKINI2C2_SDA-
PA13SWDIOIR_OUT-----EVENTOUT
PA14SWCLKUSART2_TX-----EVENTOUT
PA15SPI1_NSS/ I2S1_WSUSART2_RX-----EVENTOUT

Table 13. Port A alternate function mapping

Table 14. Port B alternate function mapping

PortAF0AF1AF2AF3AF4AF5AF6AF7
PB0SPI1_NSS/ I2S1_WSTIM3_CH3TIM1_CH2N-----
PB1TIM14_CH1TIM3_CH4TIM1_CH3N----EVENTOUT
PB2-SPI2_MISO-----EVENTOUT
PB3SPI1_SCK/ I2S1_CKTIM1_CH2--USART1_RTS _DE_CK--EVENTOUT
PB4SPI1_MISO/ I2S1_MCKTIM3_CH1--USART1_CTSTIM17_BKIN-EVENTOUT
PB5SPI1_MOSI/ I2S1_SDTIM3_CH2TIM16_BKIN---I2C1_SMBA-
PB6USART1_TXTIM1_CH3TIM16_CH1N-SPI2_MISO-I2C1_SCLEVENTOUT
PB7USART1_RXSPI2_MOSITIM17_CH1N---I2C1_SDAEVENTOUT
PB8-SPI2_SCKTIM16_CH1---I2C1_SCLEVENTOUT
PB9IR_OUT-TIM17_CH1--SPI2_NSSI2C1_SDAEVENTOUT
PB10-----SPI2_SCKI2C2_SCL-
PB11SPI2_MOSI-----I2C2_SDA-
PB12SPI2_NSS-TIM1_BKIN----EVENTOUT
PB13SPI2_SCK-TIM1_CH1N---I2C2_SCLEVENTOUT
PB14SPI2_MISO-TIM1_CH2N---I2C2_SDAEVENTOUT
PB15SPI2_MOSI-TIM1_CH3N----EVENTOUT

Table 14. Port B alternate function mapping

Electrical Characteristics

The definition and values of input/output AC characteristics are given in Figure 18 and Table 51 , respectively.

Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions .

Table 51. I/O AC characteristics (1)(2)

SpeedSymbolParameterConditionsMinMaxUnit
00FmaxMaximum frequencyC=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-2MHz
00FmaxMaximum frequencyC=50 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V-0.35MHz
00FmaxMaximum frequencyC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-3MHz
00FmaxMaximum frequencyC=10 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V-0.45MHz
00Tr/TfOutput rise and fall timeC=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-100ns
00Tr/TfOutput rise and fall timeC=50 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V-225ns
00Tr/TfOutput rise and fall timeC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-75ns
00Tr/TfOutput rise and fall timeC=10 pF, 2.0 V ≤ V DDIO1 ≤ 2.7 V-150ns

Table 51. I/O AC characteristics (1)(2)

79

Table 51. I/O AC characteristics (1)(2) (continued)

SpeedParameterConditionsMinMaxUnit
01C=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-10MHz
01Maximum frequencyC=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-2MHz
01C=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-15MHz
01C=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-2.5MHz
01Tr/Tf Output rise and fallC=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-30ns
01timeC=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-60ns
01Tr/Tf Output rise and fallC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-15ns
01Tr/Tf Output rise and fallC=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-30ns
10Fmax Maximum frequencyC=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-30MHz
10Fmax Maximum frequencyC=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-15MHz
10Fmax Maximum frequencyC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-60MHz
10Fmax Maximum frequencyC=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-30MHz
10Tr/Tf Output rise and fallC=50 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-11ns
10timeC=50 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-22ns
10Tr/Tf Output rise and fallC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-4ns
10Tr/Tf Output rise and fallC=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-8ns
11Fmax Maximum frequencyC=30 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-60MHz
11Fmax Maximum frequencyC=30 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-30MHz
11Fmax Maximum frequencyC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-80 (3)MHz
11Fmax Maximum frequencyC=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-40MHz
11Tr/Tf Output rise and fallC=30 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-5.5ns
11timeC=30 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-11ns
11Tr/Tf Output rise and fallC=10 pF, 2.7 V ≤ V DDIO1 ≤ 3.6 V-2.5ns
11Tr/Tf Output rise and fallC=10 pF, 1.6 V ≤ V DDIO1 ≤ 2.7 V-5ns
Fm+Maximum frequencyC=50 pF, 1.6 V ≤ V DDIO1 ≤ 3.6 V-1MHz
Fm+Output fall time (4)C=50 pF, 1.6 V ≤ V DDIO1 ≤ 3.6 V-5ns
  1. Guaranteed by design.
  2. This value represents the I/O capability but the maximum system frequency is limited to 64 MHz.
  3. The fall time is defined between 70% and 30% of the output waveform, according to I 2 C specification.

Figure 18. I/O AC characteristics definition (1)

  1. Refer to Table 51: I/O AC characteristics .

Absolute Maximum Ratings

Stresses above the absolute maximum ratings listed in Table 18 , Table 19 and Table 20 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

All voltages are defined with respect to V SS .

Table 18. Voltage characteristics

SymbolRatingsMinMaxUnit
V DDExternal supply voltage- 0.34.0V
V BATExternal supply voltage on VBAT pin- 0.34.0V
V REF+External voltage on VREF+ pin- 0.3Min(V DD + 0.4, 4.0)V
V IN (1)Input voltage on FT_xx- 0.3V DD + 4.0 (2)V
V IN (1)Input voltage on any other pin- 0.34.0V

Table 19. Current characteristics

SymbolRatingsMaxUnit
I VDD/VDDACurrent into VDD/VDDA power pin (source) (1)100mA
I VSS/VSSACurrent out of VSS/VSSA ground pin (sink) (1)100mA
I IO(PIN)Output current sunk by any I/O and control pin except FT_f15mA
I IO(PIN)Output current sunk by any FT_f pin20mA
I IO(PIN)Output current sourced by any I/O and control pin15mA
∑I IO(PIN)Total output current sunk by sum of all I/Os and control pins80mA
∑I IO(PIN)Total output current sourced by sum of all I/Os and control pins80mA
I INJ(PIN) (2)Injected current on a FT_xx pin-5 / NA (3)mA
∑\I INJ(PIN) \Total injected current (sum of all I/Os and control pins) (4)

Table 20. Thermal characteristics

SymbolRatingsValueUnit
T STGStorage temperature range-65 to +150°C
T JMaximum junction temperature150°C

Thermal Information

The operating junction temperature T J must never exceed the maximum given in Table 21: General operating conditions

The maximum junction temperature in °C that the device can reach if respecting the operating conditions, is:

Package Information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com . ECOPACK is an ST trademark.

Related Variants

The following components are covered by the same datasheet.

Part NumberManufacturerPackage
STM32G030C6STMicroelectronics
STM32G030C8STMicroelectronics
STM32G030F6STMicroelectronics
STM32G030J6STMicroelectronics
STM32G030K6STMicroelectronics
STM32G030K8STMicroelectronics
STM32G030X6/X8STMicroelectronics
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