NLV14094B

Part: MC14094B — onsemi

Type: 8-Stage Shift/Store Register with Three-State Outputs (CMOS)

Description: CMOS 8-stage shift register with per-stage data latches and 3-state outputs, specified for 5–15 V supply operation and -55 to +125 °C, with dual serial outputs for cascading.

Operating Conditions:

• Supply voltage: tested at 5.0, 10 and 15 V (VDD)
• Operating temperature: -55 to +125 °C
• Clock frequency (typ., VDD = 5 / 10 / 15 V): 2.5 / 5.0 / 6.0 MHz

Absolute Maximum Ratings:

• Max supply voltage (VDD): -0.5 to +18.0 V
• Input/output voltage: -0.5 to VDD + 0.5 V
• Input/output current per pin: ±10 mA
• Power dissipation per package: 500 mW
• Storage temperature: -65 to +150 °C
• Lead temperature (8-second soldering): 260 °C

Key Specs:

• Quiescent current IDD (per package, 25 °C max): 5.0 μA at 5 V, 10 μA at 10 V, 20 μA at 15 V
• Output drive, source IOH at 25 °C (min): -0.51 mA at 5 V (VOH = 4.6 V), -1.3 mA at 10 V (VOH = 9.5 V), -3.4 mA at 15 V (VOH = 13.5 V)
• Output drive, sink IOL at 25 °C (min): 0.51 mA at 5 V, 1.3 mA at 10 V, 3.4 mA at 15 V
• Input leakage current: ±0.1 μA max at 25 °C (VDD = 15 V)
• Input capacitance: 5.0 pF typ
• Clock to parallel output propagation delay (CL = 50 pF, 25 °C, max): 840 ns at 5 V, 390 ns at 10 V, 270 ns at 15 V
• Data-in to clock setup time (min): 125 ns at 5 V, 55 ns at 10 V, 35 ns at 15 V
• Clock pulse width high (min): 200 ns at 5 V, 100 ns at 10 V, 83 ns at 15 V

Features:

• Drives two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range
• 3-state outputs
• Input diode protection
• Dual serial outputs for data out on both positive and negative clock transitions
• Data latch on each stage
• Useful for serial-to-parallel data conversion
• Pin-for-pin compatible with CD4094B
• NLV prefix: AEC-Q100 qualified and PPAP capable
• Pb-free and RoHS compliant

Applications:

• Serial-to-parallel data conversion
• Cascaded high-speed and low-speed shift register systems

Package:

• SOIC-16 (Case 751B, 9.90 x 3.90 x 1.37 mm, 1.27 mm pitch)
• TSSOP-16 (Case 948F)

• Capable of Driving Two Low -Power TTL Loads or One Low -Power Schottky TTL Load Over the Rated Temperature Range
• 3 -State Outputs
• Input Diode Protection
• Dual Outputs for Data Out on Both Positive and Negative Clock Transitions
• Data Latch
• Useful for Serial -to -Parallel Data Conversion
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC -Q100 Qualified and PPAP Capable
• Pin -for -Pin Compatible with CD4094B
• These Devices are Pb -Free and are RoHS Compliant

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Temperature Derating: 'D/DW' Packages: -7.0 mW/ _ C From 65 _ C To 125 _ C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high -impedance circuit. For proper operation, V in and V out should be constrained to the range V SS ≤ (V in or V out ) ≤ V DD .

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or V DD ). Unused outputs must be left open.

SOIC -16 D SUFFIX CASE 751B

TSSOP -16 DT SUFFIX CASE 948F