NLV14052B

Part: MC14051B, MC14052B, MC14053B

Type: Analog Multiplexer/Demultiplexer

Description: Digitally-controlled analog switches featuring low ON impedance and very low OFF leakage current, capable of controlling analog signals up to the complete supply voltage range. The MC14051B is an SP8T switch, the MC14052B is a DP4T, and the MC14053B is a Triple SPDT.

Operating Conditions:

• Supply voltage: 3.0 Vdc to 18 Vdc
• Operating temperature: -55 to +125 °C
• Analog voltage range (VDD - VEE): 3.0 to 18 V

Absolute Maximum Ratings:

• Max supply voltage: +18.0 V (referenced to VEE)
• Max continuous current: ±25 mA (Switch Through Current)
• Max junction/storage temperature: +150 °C

Key Specs:

• Power Supply Voltage Range (VDD): 3.0 to 18 V
• Quiescent Current Per Package (IDD): 0.005 μA (Typ, VDD=5.0V, 25°C)
• ON Resistance (Ron): 80 Ω (Typ, VDD=15V, ΔVswitch ≤ 500mV, 25°C)
• Off-Channel Leakage Current (Ioff): ±0.05 nA (Typ, VDD=15V, 25°C)
• Input Capacitance (Cin): 5.0 pF (Typ, 25°C)
• Bandwidth (BW): 17 MHz (Typ, VDD=10V, RL=50Ω, CL=50pF, 25°C)
• Propagation Delay (MC14053B, tPLH, tPHL): 6 ns (Typ, VDD-VEE=15V, CL=50pF, RL=1kΩ, 25°C)
• Second Harmonic Distortion: 0.07 % (Typ, VDD-VEE=10V, R=10kΩ, f=1kHz, V=5V)

Features:

• Switch Function is Break Before Make
• Triple Diode Protection on Control Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Linearized Transfer Characteristics
• Analog Voltage Range (VDD -VEE) = 3.0 to 18 V
• Low -noise -12 nV/ √ Cycle, f ≥ 1.0 kHz Typical
• Pin -for -Pin Replacement for CD4051, CD4052, and CD4053
• Pb -Free and RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC -Q100 Qualified and PPAP Capable

Package:

• SOIC-16
• TSSOP-16

• Switch Function is Break Before Make
• Triple Diode Protection on Control Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Linearized Transfer Characteristics
• Analog Voltage Range (VDD -VEE) = 3.0 to 18 V Note: VEE must be ≤ VSS
• Low -noise -12 nV/ √ Cycle, f ≥ 1.0 kHz Typical
• For 4PDT Switch, See MC14551B
• Pin -for -Pin Replacement for CD4051, CD4052, and CD4053
• For Lower RON, Use the HC4051, HC4052, or HC4053 High -Speed CMOS Devices
• These Devices are Pb -Free and are RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC -Q100 Qualified and PPAP Capable

Figure A illustrates use of the on -chip level converter detailed in Figures 2, 3, and 4. The 0 -to -5 V Digital Control signal is used to directly control a 9 V p -p analog signal.

The digital control logic levels are determined by V DD and VSS. The VDD voltage is the logic high voltage; the V SS voltage is logic low. For the example, V DD = +5 V = logic high at the control inputs; V SS = GND = 0 V = logic low.

peak. If voltage transients above V DD and/or below V EE are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure B. These diodes should be small signal types able to absorb the maximum anticipated current surges during clipping.

The maximum analog signal level is determined by V DD and VEE. The VDD voltage determines the maximum recommended peak above VSS. The VEE voltage determines the maximum swing below VSS. For the example, VDD -VSS = 5 V maximum swing above VSS; VSS -VEE = 5 V maximum swing below VSS. The example shows a ± 4.5 V signal which allows a 1/2 volt margin at each

The absolute maximum potential difference between VDD and VEE is 18.0 V . Most parameters are specified up to 15 V which is the recommended maximum difference between VDD and VEE.

Balanced supplies are not required. However, V SS must be greater than or equal to V EE . For example, V DD = +10 V , VSS = +5 V, and VEE - 3 V is acceptable. See the Table below.

Figure B. External Germanium or Schottky Clipping Diodes

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

1. Data labeled 'Typ' is not to be used for design purposes, but is intended as an indication of the IC's potential performance.

2. For voltage drops across the switch ( D Vswitch ) > 600 mV (> 300 mV at high temperature), excessive V DD current may be drawn, i.e. the current out of the switch may contain both V DD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.)

ELECTRICAL CHARACTERISTICS (Note 4) (C L = 50 pF, T A = 25 _ C) (V EE v V SS unless otherwise indicated)

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

1. The formulas given are for the typical characteristics only at 25 _ C.

2. Data labelled 'Typ' is not lo be used for design purposes but In intended as an indication of the IC's potential performance.

Figure 1. Switch Circuit Schematic

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Temperature Derating: 'D/DW' Packages: -7.0 mW/ _ C From 65 _ C To 125 _ C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high -impedance circuit. For proper operation, V in and V out should be constrained to the range V SS ≤ (V in or V out ) ≤ V DD .

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS, V EE or V DD ). Unused outputs must be left open.

1

SOIC -16 D SUFFIX CASE 751B

TSSOP -16 DT SUFFIX CASE 948F