NLV14017B

Part: MC14017B — onsemi

Type: CMOS Decade Counter / Divider with 1-of-10 Decoded Outputs

Description: Five-stage Johnson decade counter with built-in code converter, 3.0–18 Vdc supply, ten decoded outputs and a carry-out for cascading, in SOIC-16.

Operating Conditions:

• Supply voltage: 3.0–18 V
• Operating temperature: -55 to +125 °C (ambient)
• Clock frequency (typ): 5.0 MHz at VDD = 5 V, 12 MHz at 10 V, 16 MHz at 15 V

Absolute Maximum Ratings:

• Max supply voltage (VDD): -0.5 to +18.0 V
• Input/output voltage: -0.5 to VDD + 0.5 V
• Input/output current per pin: 10 mA
• Power dissipation per package: 500 mW (derate 7.0 mW/°C from 65 °C to 125 °C)
• Storage temperature: -65 to +150 °C
• Lead temperature (8 s soldering): 260 °C

Key Specs:

• VOL max: 0.05 V; VOH min: 4.95 V at 5 V, 9.95 V at 10 V, 14.95 V at 15 V
• VIL max: 1.5 V at 5 V, 3.0 V at 10 V, 4.0 V at 15 V
• Output source current (VOH = 2.5 V, VDD = 5 V): -3.0 mA min at -55 °C, -2.4 mA at 25 °C, -1.7 mA at 125 °C
• Output sink current (VOL = 0.4 V, VDD = 5 V): 0.64 mA min at -55 °C, 0.51 mA at 25 °C, 0.36 mA at 125 °C
• Quiescent current IDD max at 25 °C: 5.0 μA at 5 V, 10 μA at 10 V, 20 μA at 15 V
• Input current (VDD = 15 V): 0.1 μA max at 25 °C
• Input capacitance: 5.0 pF typ, 7.5 pF max
• Clock frequency fcl: 2.0 MHz min at 5 V, 5.0 MHz at 10 V, 6.7 MHz at 15 V
• Clock to decode output propagation delay: 1000 ns max at 5 V, 460 ns at 10 V, 350 ns at 15 V (CL = 50 pF)

Features:

• Fully static operation
• DC clock input circuit allows slow rise times
• Carry Out output for cascading
• Divide-by-N counting
• Drives two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range
• Pin-for-pin replacement for CD4017B
• Triple diode protection on all inputs
• NLV prefix for automotive applications; AEC-Q100 qualified and PPAP capable
• Pb-free and RoHS compliant

Applications:

• Frequency division
• Decade counting
• Decimal decode display

Package:

• SOIC-16 (D suffix, Case 751B, 9.90x3.90x1.37 mm, 1.27 mm pitch)

• Fully Static Operation
• DC Clock Input Circuit Allows Slow Rise Times
• Carry Out Output for Cascading
• Divide-by-N Counting
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range
• Pin-for-Pin Replacement for CD4017B
• Triple Diode Protection on All Inputs
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Qualified and PPAP Capable
• This Device is Pb-Free and is RoHS Coempliant

Figure 3 shows a technique for extending the number of decoded output states for the MC14017B. Decoded outputs are sequential within each stage and from stage to stage, with no dead time (except propagation delay).

Figure 3. Counter Expansion

Figure 3 shows a technique for extending the number of decoded output states for the MC14017B. Decoded outputs are sequential within each stage and from stage to stage, with no dead time (except propagation delay).

Figure 4. AC Measurement Definition and Functional Waveforms

Figure 3. Counter Expansion

13

14 3 CLOCK Q0

15 2 RESET Q1

16

9 8 Q8 VSS

10 7 Q4 Q3

11 6 Q9 Q7

12

5

4

1

Cout

CE

VDD

Q2

Q5

Q6

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Temperature Derating: 'D/DW' Packages: -7.0 mW/ _ C From 65 _ C To 125 _ C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high -impedance circuit. For proper operation, V in and V out should be constrained to the range V SS (V in or V out ) V DD .

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or V DD ). Unused outputs must be left open.

SOIC - 16 D SUFFIX CASE 751B