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NAU8810YG

Audio Codec

The NAU8810YG is a audio codec from Nuvoton Technology Corporation. View the full NAU8810YG datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

Official NAU8810YG datasheet (PDF) — the source this page was extracted from.

Package

QFN-20

NAU8810YG Key Specifications

ParameterValue
ADC SNR91dB
ADC THD-79dB
DAC SNR93dB
DAC THD-84dB
Sample Rate8kHz to 48kHz
QualificationAEC-Q100 Grade 3 available
Audio InterfaceI2S / PCM with time slot assignment
Control Interface2-Wire (I2C style)
Analog Supply Voltage2.5V to 3.6V
Operating Temperature-40°C to +85°C
Digital Supply Voltage1.71V to 3.6V
Microphone PGA Gain Range-12dB to +35.25dB
Nominal Operating Voltage3.3V
Headset Driver Output Power40mW (16Ω, 3.3V)
Speaker Driver Output Power1W (8Ω, 5V BTL)
Signal Processing Resolution24-bit

NAU8810YG Overview

Part: NAU8810 (NAU8810YG) — Nuvoton

Type: Mono Audio CODEC with Speaker Driver

Description: Low-power 24-bit mono audio CODEC with 2.5–3.6 V analog supply, 93 dB SNR DAC, 91 dB SNR ADC, 1 W BTL speaker driver, 5-band EQ, ALC and fractional-N PLL.

Operating Conditions:

  • Analog supply (VDDA): 2.5–3.6 V
  • Digital supply (VDDD): 1.71–3.6 V
  • Operating temperature: -40 to +85 °C
  • Sample rates: 8–48 kHz; nominal operating voltage 3.3 V

Absolute Maximum Ratings:

  • Max supply voltage (VDDD, VDDA): +3.63 V
  • Max VDDSPK: +3.63 V (MOUTBST=0, SPKBST=0); +5.50 V (MOUTBST=1, SPKBST=1)
  • Digital input voltage range: VSSD - 0.3 V to VDDD + 0.3 V
  • Analog input voltage range: VSSA - 0.3 V to VDDA + 0.3 V
  • Storage temperature: -65 to +150 °C

Key Specs:

  • Audio DAC: 93 dB SNR, -84 dB THD
  • Audio ADC: 91 dB SNR, -79 dB THD
  • Mic PGA gain: -12 dB to +35.25 dB
  • BTL speaker driver: 1 W (8 Ω, 5 V)
  • Headset driver: 40 mW (16 Ω, 3.3 V)
  • Sample rates: 8–48 kHz
  • Control interface: 2-wire (I2C style)
  • Audio interface: I2S, PCM, with PCM time slot assignment

Features:

  • 24-bit signal processing linear audio CODEC
  • Integrated programmable microphone amplifier and low-noise mic bias
  • Integrated BTL speaker driver and headset driver
  • On-chip full fractional-N PLL
  • 5-band graphic equalizer
  • Programmable ALC with noise gate
  • ADC notch filter and programmable high-pass filter
  • Digital ADC/DAC passthrough
  • Mono data output on both channels
  • AEC-Q100 grade 3 and TS16949 qualified option

Applications:

  • Wired/wireless telephony
  • Security systems
  • Mobile telephone hands-free kits
  • Residential and consumer intercoms

Package:

  • 20-pin QFN

NAU8810YG Features

  • 5-band Graphic Equalizer
  • Programmable ALC
  • ADC Notch Filter
  • Programmable High Pass Filter
  • Digital ADC/DAC Passthrough
  • Mono data output on both channels
  • Automotive AEC-Q100 grade 3 & TS16949 qualification, tested to a higher reliability standard
  • Temperature: -40 C to +85 C

NAU8810YG Applications

  • All types of wired/wireless telephony
  • Security Systems
  • Mobile Telephone Hands-free Kits
  • Residential & Consumer Intercoms

NAU8810YG Pin Configuration

Figure 1: 20-Pin QFN Package

NAU8810YG Electrical Characteristics

VDDD = 1.8V, VDDA = VDDSPK = 3.3V (VDDSPK = 1.5*VDDA when Boost), TA = +25 o C, 1kHz signal, fs = 48kHz, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Analogue to Digital Converter (ADC)Analogue to Digital Converter (ADC)Analogue to Digital Converter (ADC)Analogue to Digital Converter (ADC)Analogue to Digital Converter (ADC)Analogue to Digital Converter (ADC)Analogue to Digital Converter (ADC)
Full scale input signal 1V INFSPGABST = 0dB PGAGAIN = 0dB1.0 0V RMS dBV
Signal to Noise Ratio 2SNRGain = 0dB, A-weighted8791dB
Total Harmonic Distortion 3THDInput = -1dBFS, Gain = 0dB-79-65dB
Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)Digital to Analogue Converter (DAC) to MONO output (all data measured with 10kΩ / 50pF load)
Full Scale output signal 1MOUTBST=0
MOUTBST=1
1.0x (V REF )
1.5 x V REF
V RMS
V RMS
Signal to Noise Ratio 2SNRA-weighted (ADC/DAC oversampling rate of 128)9093dB
Total Harmonic Distortion 3THDR L = 10 KΩ; -1.0dBfs-84-70dB
Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)Microphone Inputs (MICN & MICP) and MIC Input Programmable Gain Amplifier (PGA)
Full-scale Input Signal Level 1V INFSPGABST = 0dB PGAGAIN = 0dB1 0V RMS dBV
Programmable input PGA gain-1235.25dB
Programmable Gain Step SizeGuaranteed monotonic0.75dB
Programmable Boost PGAPGABST = 00
gainPGABST = 120dB
Mute Attenuation100dB
PGA equivalent output noise0 to 20kHz, Gain set to 35.25dB110μV
Auxiliary Input resistancePGA Gain = 35.25dB1.6kΩ
R AUXPGA Gain = 0dB
PGA Gain = -12dB
47
75
kΩ
kΩ
Positive Microphone Input resistanceR MIC+PMICPGA = 194kΩ
Input CapacitanceC MIC10pF
Speaker Output PGASpeaker Output PGASpeaker Output PGASpeaker Output PGASpeaker Output PGASpeaker Output PGASpeaker Output PGA
Programmable Gain-576dB
Programmable Gain Step SizeGuaranteed monotonic1dB

VDDD = 1.8V, VDDA = VDDSPK = 3.3V (VDDSPK = 1.5*VDDA when Boost), TA = +25 o C, 1kHz signal, fs = 48kHz, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTESTCONDITIONSMINTYPMAXUNIT
BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)BTL Speaker Output (SPKOUT+, SPKOUT- with 8 Ω bridge tied load)
Full scale output 7SPKBST = 0 VDDSPK = VDDASPKBST = 0 VDDSPK = VDDASPKBST = 0 VDDSPK = VDDAVDDA / 3.3VDDA / 3.3VDDA / 3.3V RMS
Full scale output 7SPKBST = 1 VDDSPK = 1.5 * VDDASPKBST = 1 VDDSPK = 1.5 * VDDASPKBST = 1 VDDSPK = 1.5 * VDDA(VDDA / 3.3) * 1.5(VDDA / 3.3) * 1.5(VDDA / 3.3) * 1.5V RMS
Output PowerPOOutput power is very closely correlated with THD; see belowOutput power is very closely correlated with THD; see belowOutput power is very closely correlated with THD; see belowOutput power is very closely correlated with THD; see belowOutput power is very closely correlated with THD; see belowOutput power is very closely correlated with THD; see below
Signal to Noise RatioSNRVDDSPK = 3.3V RL = 8ΩVDDSPK = 3.3V RL = 8ΩVDDSPK = 3.3V RL = 8Ω90dB
Signal to Noise RatioSNRVDDSPK = 1.5*VDDA RL = 8ΩVDDSPK = 1.5*VDDA RL = 8ΩVDDSPK = 1.5*VDDA RL = 8Ω90dB
Total Harmonic DistortionTHDPO =180mWRL = 8ΩVDDSPK=3.3V-63dB
Total Harmonic DistortionTHDPO =400mWRL = 8ΩVDDSPK=3.3V-56dB
Total Harmonic DistortionTHDPO =360mWRL = 8ΩVDDSPK = 1.5*VDDA-60dB
Total Harmonic DistortionTHDPO =800mWRL = 8ΩVDDSPK = 1.5*VDDA-61dB
Total Harmonic DistortionTHDPO =1WPO =1WPO =1W-34dB
Power Supply Rejection Ratio (50Hz - 22kHz)PSRRVDDSPK = 3V, SPKBST = 0VDDSPK = 3V, SPKBST = 0VDDSPK = 3V, SPKBST = 050dB
Power Supply Rejection Ratio (50Hz - 22kHz)PSRRVDDSPK = 1.5*VDDA, SPKBST = 1VDDSPK = 1.5*VDDA, SPKBST = 1VDDSPK = 1.5*VDDA, SPKBST = 150dB
Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)Headphone' output (SPKOUTP, SPKOUTN with resistive load to ground)
Full scale output 7VDDA / 3.3V RMS
Signal to Noise RatioSNRA-weightedA-weightedA-weighted90dB
Total Harmonic DistortionTHDPo = 20mWRL=16 ΩVDDSPK=3.3V-84dB
Total Harmonic DistortionTHDPo = 20mWRL=32 ΩVDDSPK=3.3V-85dB
Microphone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone BiasMicrophone Bias
Bias VoltageV MICBIAS(MICBIASV = 0)(MICBIASV = 0)(MICBIASV = 0)0.9* VDD AV
Bias VoltageV MICBIAS(MICBIASV = 1)(MICBIASV = 1)(MICBIASV = 1)0.65* VDD AV
Bias Current SourceI MICBIAS3mA
Output Noise VoltageV NMICBIASM = 0 (1kHz to 20kHz)MICBIASM = 0 (1kHz to 20kHz)MICBIASM = 0 (1kHz to 20kHz)14nV/√Hz
Output Noise VoltageV NMICBIASM = 1 (1kHz to 20kHz)MICBIASM = 1 (1kHz to 20kHz)MICBIASM = 1 (1kHz to 20kHz)4nV/√Hz
Automatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC only
Target Record Level-28.5-6dB
Programmable Gain-1235.25dB
Programmable Gain Step SizeGuaranteed MonotonicGuaranteed MonotonicGuaranteed Monotonic0.75dB
Gain Hold Time 4, 6t HOLDMCLK=12.288MHzMCLK=12.288MHzMCLK=12.288MHz0 / 2.67 / …/ 436910 / 2.67 / …/ 436910 / 2.67 / …/ 43691ms
(time doubles with each step)

emPowerAudio

™

VDDD = 1.8V, VDDA = VDDSPK = 3.3V (VDDSPK = 1.5*VDDA when Boost), TA = +25 o C, 1kHz signal, fs = 48kHz, 24-bit audio data unless otherwise stated.

PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNIT
Automatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC onlyAutomatic Level Control (ALC)/Limiter - ADC only
Gain Ramp-Up (Decay) Time 5, 6t DCYALC Mode ALCM=0 MCLK=12.288MHz3.3 / 6.6 / 13.1 / …/ 3360 (time doubles every step)3.3 / 6.6 / 13.1 / …/ 3360 (time doubles every step)3.3 / 6.6 / 13.1 / …/ 3360 (time doubles every step)ms
Gain Ramp-Up (Decay) Time 5, 6t DCYLimiter Mode ALCM=1 MCLK=12.288MHz0.73 / 1.45 / 2.91 / …/ 744 (time doubles every step)0.73 / 1.45 / 2.91 / …/ 744 (time doubles every step)0.73 / 1.45 / 2.91 / …/ 744 (time doubles every step)ms
Gain Ramp-Down (Attack) Time 5, 6t ATKALC Mode ALCM=0 MCLK=12.288MHz0.83 / 1.66 / 3.33 / …/ 852 (time doubles every step)0.83 / 1.66 / 3.33 / …/ 852 (time doubles every step)0.83 / 1.66 / 3.33 / …/ 852 (time doubles every step)ms
Gain Ramp-Down (Attack) Time 5, 6t ATKLimiter Mode ALCM=1 MCLK=12.288MHz0.18 / 0.36 / 0.73 / …/ 186 (time doubles every step)0.18 / 0.36 / 0.73 / …/ 186 (time doubles every step)0.18 / 0.36 / 0.73 / …/ 186 (time doubles every step)ms
Digital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / OutputDigital Input / Output
Input HIGH LevelV IH0.7 × VDDDV
Input LOW LevelV IL0.3 × VDDDV
Output HIGH LevelV OHI OL = 1mA0.9 × VDDDV
Output LOW LevelV OLI OH = -1mA0.1 x VDDDV

NAU8810YG Absolute Maximum Ratings

CONDITIONMINMAXUnits
VDDD, VDDA supply voltages-0.3+3.63V
VDDSPK supply voltage (MOUTBST=0, SPKBST=0)-0.3+3.63V
VDDSPK supply voltage (MOUTBST=1, SPKBST=1)-0.3+5.50V
Core Digital Input Voltage rangeVSSD - 0.3VDDD + 0.30V
Analog Input Voltage rangeVSSA - 0.3VDDA + 0.30V
Industrial operating temperature-40+850 C
Storage temperature range-65+1500 C

CAUTION: Do not operate at or near the maximum ratings listed for extended period. Exposure to such conditions may adversely influence product reliability and result in failures not covered by warranty. These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

NAU8810YG Typical Application

Figure 48: Application Diagram For 20-Pin QFN

  • Note 1: All non-polar capacitors are assumed to be low ESR type parts, such as with MLC construction or similar. If capacitors are not low ESR, additional 0.1μF and/or 0.01μF capacitors may be necessary in parallel with the bulk 4.7μF capacitors on the supply rails.
  • Note 2: Load resistors to ground on outputs may be helpful in some applications to insure a DC path for the output capacitors to charge/discharge to the desired levels. If the output load is always present and the output load provides a suitable DC path to ground, then the additional load resistors may not be necessary. If needed, such load resistors are typically a high value, but a value dependent upon the application requirements.
  • Note 3: To minimize pops and clicks, large polarized output capacitors should be a low leakage type.
  • Note 4: Depending on the microphone device and PGA gain settings, common mode rejection can be improved by choosing the resistors on each node of the microphone such that the impedance presented to any noise on either microphone wire is equal.

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