IWRL6432

Part: IWRL6432 — Texas Instruments

Type: Single-Chip FMCW Industrial Radar Sensor (mmWave)

Description: 57–64 GHz FMCW radar transceiver with 3 Rx and 2 Tx channels, a 160 MHz Arm Cortex-M4F core, a radar hardware accelerator and 1 MB on-chip RAM, in a 6.45 mm × 6.45 mm FCCSP package.

Operating Conditions:

• Supply voltage: VDD 1.14–1.26 V (1.2 V digital); VIN_18CLK, VIN_18BB, VIN_18VCO and VIOIN_18 1.71–1.89 V
• I/O supply (VIOIN): 3.135–3.465 V (3.3 V mode) or 1.71–1.89 V (1.8 V mode)
• Operating junction temperature: -40 to 105 °C
• Primary clock: 40 MHz crystal or external clock

Absolute Maximum Ratings:

• VDD (1.2 V digital supply): -0.5 to 1.4 V
• VIOIN (3.3 V or 1.8 V I/O supply): -0.5 to 3.8 V
• VIOIN_18, VIN_18CLK, VIN_18BB, VIN_18VCO, VPP: -0.5 to 2 V
• Externally applied power on RF inputs (RX1–3) and outputs (TX1–2): 10 dBm max
• Clamp current: ±20 mA
• Operating junction temperature (TJ): -40 to 105 °C
• Storage temperature (TSTG): -55 to 150 °C

Key Specs:

• RF coverage: 57–64 GHz with 7 GHz continuous bandwidth
• Channels: 3 Rx and 2 Tx
• Typical Tx output power: 11 dBm per Tx
• Typical noise figure: 11 dB
• Typical phase noise: -89 dBc/Hz at 1 MHz
• IF bandwidth: 5 MHz, real-only Rx channels; max real sampling rate 12.5 Msps
• Typical range: up to 25 m
• Processing: Arm Cortex-M4F at 160 MHz; HWA 1.2 at 80 MHz
• Memory: 1 MB on-chip RAM
• Input thresholds (1.8 V mode): VIH min 1.17 V; VIL max 0.3×VIOIN
• Input thresholds (3.3 V mode): VIH min 2.25 V; VIL max 0.62 V
• Output levels (IOH/IOL = 6 mA): VOH min VIOIN - 450 mV; VOL max 450 mV

Features:

• FMCW transceiver with integrated PLL, transmitter, receiver, baseband and ADC
• Per-transmitter binary phase shifter and chirp engine based on a fractional-N PLL
• TI Radar Hardware Accelerator for FFT, log magnitude and CFAR
• Idle and deep sleep low-power modes
• 1.8 V and 3.3 V I/O support; built-in LDO network; BOM-optimized and power-optimized modes
• Built-in calibration, self-test and ROM firmware
• Host interfaces: UART, CAN-FD, SPI
• RDIF for raw ADC sample capture
• User interfaces: QSPI, I2C, JTAG, GPIOs, PWM
• Configurable L3 shared memory; data and code RAM of 512/640/768 KB
• Functional safety: hardware integrity up to SIL-2 compliant
• 32 kHz internal oscillator for low-power operation
• Authenticated boot on the IWRL6432BDBAAMF variants

Applications:

• Automated door/gate
• Motion detector
• Occupancy detection, people tracking and counting
• Video doorbell and IP network camera
• Thermostat and air conditioner
• Refrigerators and freezers
• Vacuum robot and lawn mower
• Personal electronics (PC/notebooks, TVs, tablets, smart watches, gaming)

Package:

• AMF FCCSP, 102 balls (12 × 12 BGA grid), 6.45 mm × 6.45 mm, supplied in tray or tape and reel

• FMCW Transceiver
• -Integrated PLL, transmitter, receiver, baseband and ADC
• -57GHz - 64GHz coverage with 7GHz continuous bandwidth
• -3 receive channels and 2 transmit channels
• -Range typically up to 25m
• -11dBm typical output power per Tx
• -11dB Typical noise figure
• --89dBc/Hz typical phase noise at 1MHz
• -FMCW operation
• -5MHz IF bandwidth, real-only Rx channels
• -Ultra-accurate chirp engine based on fractionalN PLL
• -Per transmitter binary phase shifter
• Processing elements
• -Arm ® M4F ® core with single precision FPU (160MHz)
• -TI Radar Hardware Accelerator (HWA 1.2) for FFT, log magnitude, and CFAR operations (80MHz)
• Supports multiple low-power modes
• -Idle mode and deep sleep mode
• Power management
• -1.8V and 3.3V IO support
• -Built-in LDO network for enhanced PSRR
• -BOM-Optimized and Power-Optimized modes
• -One or two power rails for 1.8V IO mode, two or three power rails for 3.3V IO mode
• Built-in calibration and self-test
• -Built-in Firmware (ROM)
• -Self-Contained on chip calibration system
• Host Interface
• -UART
• -CAN-FD
• -SPI
• RDIF (Radar Data Interface) for raw ADC sample capture
• Other interfaces available to user application
• -QSPI
• -I2C
• -JTAG
• -GPIOs
• -PWM Interface
• Internal memory
• -1MB of On-Chip RAM
• -Configurable L3 shared memory for Radar Cube
• -Data and Code RAM of (512/640/768KB)
• Functional Safety-Compliant
• -Developed for functional safety applications
• -Hardware integrity up to SIL-2 compliant
• FCCSP package having 12 x 12 BGA grid, 102 BGA balls; Package size: 6.45mm x 6.45mm
• Clock source
• -40.0MHz crystal for primary clock
• -Supports externally driven clock (Square/Sine) at 40.0MHz
• -32kHz internal oscillator for low power operations
• Supports temperature operating range
• -Operating junction temperature range: -40°C to 105°C

• Automated door/gate
• Motion detector
• Occupancy detection / people tracking / people counting
• Video doorbell
• IP network camera
• Thermostat
• Air conditioner
• Refrigerators and freezers

• JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
• JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
• JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
• JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements
• (4) Test Condition: Power=1.305W at 25°C

Application information can be found on IWR Application web page.