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CP2102N

USB-to-UART Bridge Controller

The CP2102N is a usb-to-uart bridge controller from Silicon Labs. View the full CP2102N datasheet below including key specifications, electrical characteristics, absolute maximum ratings.

CP2102N shares its datasheet with CP2102N-A02-GQFN28, whose page lists every part number it covers.

Official CP2102N datasheet (PDF) — the source this page was extracted from.

Manufacturer

Silicon Labs

CP2102N Key Specifications

ParameterValue
Applications FunctionTransceiver
Quiescent Current20mA
Quiescent Current20mA
Data Rate1Mbps
DigiKey ProgrammableNot Verified
FeaturesHardware flow control support;Programmable baud rate;Power-on reset;Built-in clock generator
FunctionBridge, USB to UART
InterfaceUART
Operating Temperature-40℃~+85℃ °C
Operating Temperature-40°C ~ 85°C
Package / Case28-VFQFN Exposed Pad
PackagingMouseReel
ProtocolUSB
Quiescent Supply Current80uA
Standard Pack Qty2500
StandardsUSB 2.0
Supplier Device Package28-QFN (5x5)
Supply Current20mA
USB ProtocolUSB 2.0
Supply Voltage3V~3.6V
Supply Voltage3V ~ 3.6V

CP2102N Overview

Part: CP2102N-A02-GQFN28 — Silicon Labs

Type: USB 2.0 Full-Speed to UART Bridge Controller

Description: Single-chip USB-to-UART bridge with an integrated USB transceiver, oscillator and 3.3 V regulator. It supports baud rates from 300 baud to 3 Mbaud and draws 9.5 mA typical in normal operation at 115200 baud.

Operating Conditions:

  • Supply voltage: VDD 3.0–3.6 V; VREGIN 3.0–5.25 V; VIO 1.71 V to VDD
  • Operating temperature: -40 to +85 °C
  • UART baud rates: 300 baud to 3 Mbaud

Absolute Maximum Ratings:

  • Max supply voltage: VDD 4.2 V; VREGIN 5.8 V
  • Max current sunk into supply pin (IVDD): 400 mA
  • Max current sourced or sunk by any UART/GPIO pin: ±100 mA
  • Max operating junction temperature: 105 °C
  • Storage temperature: -65 to 150 °C

Key Specs:

  • Normal operation supply current: 9.5 mA typ (115200 baud, continuous bidirectional data); 13.7 mA typ (3 Mbaud)
  • USB suspend current: 195 μA typ
  • Current while held in reset: 1.3 mA typ
  • USB pull-up current: 200 μA typ, 230 μA max
  • VDD supply monitor threshold: 1.95 V min, 2.05 V typ, 2.15 V max
  • POR threshold (rising VDD): 1.2 V typ
  • Reset delay from POR: 3 ms min, 10 ms typ, 31 ms max
  • GPIOs: 7 on the QFN28 device

Features:

  • USB 2.0 full-speed (12 Mbps) function controller with integrated transceiver; no external resistors required
  • Integrated clock; no external crystal required
  • On-chip 3.3 V voltage regulator and power-on reset circuit
  • USB Battery Charger Detection (USB BCS 1.2)
  • Remote wakeup for waking a suspended host
  • UART with full handshaking and modem signals; 5–8 data bits, 1/1.5/2 stop bits, odd/even/mark/space/no parity
  • 512-byte receive buffer and 512-byte transmit buffer
  • Hardware or Xon/Xoff handshaking
  • 960-byte programmable ROM for vendor ID, product ID, serial number and descriptor strings
  • Royalty-free Virtual COM port drivers for Windows, Mac and Linux
  • GUI-based configurator
  • Pin compatible with CP2101/2/9 (QFN28)

Applications:

  • POS terminals
  • USB dongles
  • Gaming controllers
  • Medical equipment
  • Data loggers

Package:

  • QFN28 (CP2102N-A02-GQFN28, Pb-free/RoHS compliant)

CP2102N Features

  • No firmware development required
  • Simple GUI-based configurator
  • Integrated USB transceiver; no external resistors required
  • Integrated clock; no external crystal required
  • USB 2.0 full-speed compatible
  • Data transfer rates up to 3 Mbaud
  • USB Battery Charger Detection (USB BCS 1.2 Specification)
  • Remote wakeup for waking a suspended host
  • Low operating current : 9.5 mA
  • Royalty-free Virtual COM port drivers
  • Medical equipment
  • Data loggers

CP2102N Electrical Characteristics

All electrical parameters in all tables are specified under the conditions listed in Table 3.1 Recommended Operating Conditions on page 10, unless stated otherwise.

CP2102N Absolute Maximum Ratings

Stresses above those listed in 3.3 Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at http://www.silabs.com/support/quality/pages/ default.aspx.

Table 3.10. Absolute Maximum Ratings

ParameterSymbolTest ConditionMinMaxUnit
Ambient Temperature Under BiasT BIAS-55125°C
Storage TemperatureT STG-65150°C
Voltage on VDDV DDGND-0.34.2V
Voltage on VIO 2V IOGND-0.34.2V
Voltage on VREGINV REGINGND-0.35.8V
Voltage on D+ or D-V USBDGND-0.3V DD +0.3V
Voltage on UART pins, GPIO, VBUS, RSTb, or any other non-power, non-V INV IO > 3.3 VGND-0.35.8V
USB pinV INV IO < 3.3 VGND-0.3V IO +2.5V
Total Current Sunk into Supply PinI VDD─400mA
Total Current Sourced out of Ground PinI GND400─mA
Current Sourced or Sunk by any UART pins, GPIO, VBUS, RSTb, or any other non-power, non-USB pinI IO-100100mA
Operating Junction TemperatureT J-40105°C
  1. Exposure to maximum rating conditions for extended periods may affect device reliability.

  2. On devices without a VIO pin, V IO = V DD

Table 3.1. Recommended Operating Conditions

ParameterSymbolTest ConditionMinTypMaxUnit
Operating Supply Voltage on VDD 1V DD3.0-3.6V
Operating Supply Voltage on VIO 3V IO1.71-V DDV
Operating Supply Voltage on VRE- GINV REGIN3.0-5.25V
Operating Ambient TemperatureT A-40-85°C
  1. Standard USB compliance tests require 3.0 V on VDD for compliant operation.
  2. All voltages with respect to GND.
  3. On devices without a VIO pin, V IO = V DD .
  4. GPIO levels are undefined whenever VIO is less than 1 V.

CP2102N Thermal Information

Table 3.9. Thermal Conditions

ParameterSymbolTest ConditionMinTypMaxUnit
Thermal Resistance (Junction to Ambient)θ JAQFN20 Packages─60─°C/W
QFN24 Packages─30─°C/W
QFN28 Packages─26─°C/W
Thermal Resistance (Junction to Case)θ JCQFN20 Packages─32.9─°C/W
QFN24 Packages─24.2─°C/W
QFN28 Packages─18.8─°C/W
Thermal Characterization Parame- ter (Junction to Top)Ψ JTQFN20 Packages─0.88─°C/W
QFN24 Packages─0.3─°C/W
QFN28 Packages─0.3─°C/W
  1. Thermal resistance assumes a multi-layer PCB with any exposed pad soldered to a PCB pad.

CP2102N Package Information

Figure 6.1. QFN28 Package Drawing

Table 6.1. QFN28 Package Dimensions

DimensionMinTypMax
A0.700.750.80
A10.00-0.05
A30.20 REF0.20 REF0.20 REF
b0.200.250.30
D5.00 BSC5.00 BSC5.00 BSC
D23.153.253.35
e0.50 BSC0.50 BSC0.50 BSC
E5.00 BSC5.00 BSC5.00 BSC
E23.153.253.35
L0.450.550.65
aaa0.100.100.10
bbb0.100.100.10
ddd0.050.050.05
DimensionMinTypMax
eee0.08
Z0.44
Y0.18
  1. All dimensions shown are in millimeters (mm) unless otherwise noted.
  2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
  3. This drawing conforms to JEDEC outline MO-220 except for custom features D2, E2, L, Z, and Y which are toleranced per supplier designation.
  4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.

Variants on the same datasheet

These parts have exact links to the same datasheet. They are candidates to compare, not verified drop-in replacements; check package, pinout and electrical limits.

Part NumberManufacturerPackage
CP2102Silicon LabsQFN-28
CP2102N-A02Silicon Labs—
CP2102N-A02-GQFN20Silicon LabsQFN-20
CP2102N-A02-GQFN24Silicon Labs24-VFQFN Exposed Pad
CP2102N-A02-GQFN28Silicon Labs28-WFQFN Exposed Pad

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All Interface ICs datasheetsAll Silicon Labs datasheets (179)

Data on this page is extracted from publicly available manufacturer datasheets using automated tools including AI. It may contain errors or omissions. Always verify specifications against the official manufacturer datasheet before making design or purchasing decisions. See our Terms of Service. Rights holders can submit a takedown request.

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