BQ25895

BQ25895 I2C Controlled Single Cell 5-A Fast Charger with MaxChargeTM for High Input Voltage and Adjustable Voltage 3.1-A Boost Operation

Manufacturer

ti

Overview

Part: BQ25895 from Texas Instruments

Type: I2C Controlled Single Cell 5-A Fast Charger with MaxChargeTM for High Input Voltage and Adjustable Voltage 3.1-A Boost Operation

Key Specs:

  • Charge current: 5-A
  • Charge efficiency: 93% at 2 A, 91% at 3 A
  • Boost output current: up to 3.1-A
  • Boost efficiency: 93% at 5 V at 1 A
  • Input voltage range: 3.9-V to 14-V
  • Input current limit: 100 mA to 3.25 A
  • Battery discharge MOSFET resistance: 11-mΩ
  • Battery leakage current: 12-µA
  • Charge voltage regulation: ±0.5%
  • Charge current regulation: ±5%
  • Input current regulation: ±7.5%

Features:

  • High efficiency 5-A, 1.5-MHz switch mode buck charge
  • Optimize for high voltage input (9 V to 12 V)
  • Low Power PFM Mode for light load operations
  • Boost Mode operation with adjustable output from 4.5 V to 5.5 V
  • Selectable 500-KHz to 1.5-MHz boost converter with up to 3.1-A output
  • Integrated control to switch between charge and Boost Mode
  • Single input to support USB input and adjustable high voltage adapters
  • Support 3.9-V to 14-V input voltage range
  • Input current limit (100 mA to 3.25 A with 50-mA resolution) to support USB2.0, USB3.0 standard and high voltage adapters
  • Maximum power tracking by input voltage limit up-to 14V for wide range of adapters
  • Auto detect USB SDP, CDP, DCP, and Nonstandard Adapters
  • Input current optimizer (ICO) to maximize input power without overloading adapters
  • Resistance compensation (IRCOMP) from charger output to cell terminal
  • Highest battery discharge efficiency with 11-mΩ battery discharge MOSFET up to 9 A
  • Integrated ADC for system monitor (voltage, temperature, charge current)
  • Narrow VDC (NVDC) power path management
  • Instant-on works with no battery or deeply discharged battery
  • Ideal diode operation in Battery Supplement Mode
  • BATFET Control to support Ship Mode, wake up, and full system reset
  • Flexible autonomous and I2C Mode for optimal system performance
  • High integration includes all MOSFETs, current sensing and loop compensation
  • 12-µA Low battery leakage current to support Ship Mode
  • High accuracy
  • ±0.5% Charge voltage regulation
  • ±5% Charge current regulation
  • ±7.5% Input current regulation
  • Safety
  • Battery temperature sensing for charge and Boost Mode
  • Thermal regulation and thermal shutdown

Applications:

  • Power bank, mobile Wi-Fi hotspot
  • Wireless Bluetooth speaker
  • Portable internet devices

Package:

  • WQFN (24): 4.00mm x 4.00mm

Features

  • High efficiency 5-A, 1.5-MHz switch mode buck charge

    • 93% Charge efficiency at 2 A and 91% charge efficiency at 3 A charge current
    • Optimize for high voltage input (9 V to 12 V)
    • Low Power PFM Mode for light load operations
  • Boost Mode operation with adjustable output from 4.5 V to 5.5 V

    • Selectable 500-KHz to 1.5-MHz boost converter with up to 3.1-A output
    • 93% Boost efficiency at 5 V at 1 A output
  • Integrated control to switch between charge and Boost Mode

  • Single input to support USB input and adjustable high voltage adapters

    • Support 3.9-V to 14-V input voltage range
    • Input current limit (100 mA to 3.25 A with 50-mA resolution) to support USB2.0, USB3.0 standard and high voltage adapters
    • Maximum power tracking by input voltage limit up-to 14V for wide range of adapters
    • Auto detect USB SDP, CDP, DCP, and Nonstandard Adapters
  • Input current optimizer (ICO) to maximize input power without overloading adapters

  • Resistance compensation (IRCOMP) from charger output to cell terminal

  • Highest battery discharge efficiency with 11-mΩ battery discharge MOSFET up to 9 A

  • Integrated ADC for system monitor (voltage, temperature, charge current)

  • Narrow VDC (NVDC) power path management

    • Instant-on works with no battery or deeply discharged battery
    • Ideal diode operation in Battery Supplement Mode
  • BATFET Control to support Ship Mode, wake up, and full system reset

  • Flexible autonomous and I2C Mode for optimal system performance

  • High integration includes all MOSFETs, current sensing and loop compensation

  • 12-µA Low battery leakage current to support Ship Mode

  • High accuracy

    • ±0.5% Charge voltage regulation
    • ±5% Charge current regulation
    • ±7.5% Input current regulation
  • Safety

    • Battery temperature sensing for charge and Boost Mode
    • Thermal regulation and thermal shutdown

Applications

Pin Configuration

Figure 6-1. BQ25895 RTW (WQFN) Top View

Table 6-1. Pin Functions

| PIN | |------|-----|---------|---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| | NAME | NO. | TYPE(1) | DESCRIPTION | | VBUS | 1 | P | Charger Input Voltage.
The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID with VBUS on
source. Place a 1-µF ceramic capacitor from VBUS to PGND and place it as close as possible to IC. | | D+ | 2 | AIO | Positive line of the USB data line pair.
D+/D- based USB host/charging port detection. The detection includes data contact detection (DCD), primary
and secondary detection in BC1.2, and Adjustable high voltage adapter (MaxCharge). | | D– | 3 | AIO | Negative line of the USB data line pair.
D+/D- based USB host/charging port detection. The detection includes data contact detection (DCD), primary
and secondary detection in BC1.2, and Adjustable high voltage adapter (MaxCharge). | | STAT | 4 | DO | Open drain charge status output to indicate various charger operation.
Connect to the pull up rail via 10-kΩ resistor. LOW indicates charge in progress. HIGH indicates charge
complete or charge disabled. When any fault condition occurs, STAT pin blinks in 1 Hz.
The STAT pin function can be disabled when STAT_DIS bit is set. | | SCL | 5 | DI | 2C Interface clock.
I
Connect SCL to the logic rail through a 10-kΩ resistor. | | SDA | | DIO | 2C Interface data.
I
Connect SDA to the logic rail through a 10-kΩ resistor. | | INT | 7 | DO | Open-drain Interrupt Output.
Connect the INT to a logic rail via 10-kΩ resistor. The INT pin sends active low, 256-µs pulse to host to report
charger device status and fault. | | OTG | 8 | DI | Boost mode enable pin.
The boost mode is activated when OTG_CONFIG =1, OTG pin is high, and no input source is detected at
VBUS | | CE | 9 | DI | Active low Charge Enable pin.
Battery charging is enabled when CHG_CONFIG = 1 and CE pin = Low. CE pin must be pulled High or Low. | | ILIM | 10 | AI | Input current limit Input. ILIM pin sets the maximum input current and can be used to monitor input current
ILIM pin sets the maximum input current limit by regulating the ILIM voltage at 0.8 V. A resistor is connected
from ILIM pin to ground to set the maximum limit as IINMAX = KILIM/RILIM . The actual input current limit is the
lower limit set by ILIM pin (when EN_ILIM bit is high) or IIINLIM register bits. Input current limit of less than 500
mA is not support on ILIM pin.
ILIM pin can also be used to monitor input current when the voltage is below 0.8V. The input current is
proportional to the voltage on ILIM pin and can be calculated by IIN = (KILIM x VILIM) / (RILIM x 0.8)
The ILIM pin function can be disabled when EN_ILIM bit is 0. |

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Table 6-1. Pin Functions (continued)

| PIN | |-----------|-------|---------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| | NAME | NO. | TYPE(1) | DESCRIPTION | | TS | 11 | AI | Temperature qualification voltage input.
Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from
REGN to TS to GND. Charge suspends when either TS pin is out of range. Recommend 103AT-2 thermistor. | | QON | 12 | DI | BATFET enable/reset control input.
When BATFET is in ship mode, a logic low of tSHIPMODE duration turns on BATFET to exit shipping mode.
When VBUS is not plugged-in, a logic low of tQON_RST duration resets SYS (system power) by turning BATFET
off for tBATFET_RST and then re-enable BATFET to provide full system power reset.
The pin contains an internal pull-up to maintain default high logic | | BAT | 13,14 | P | Battery connection point to the positive terminal of the battery pack.
The internal BATFET is connected between BAT and SYS. Connect a 10uF closely to the BAT pin. | | SYS | 15,16 | P | System connection point.
The internal BATFET is connected between BAT and SYS. When the battery falls below the minimum system
voltage, switch-mode converter keeps SYS above the minimum system voltage. Connect a 20uF closely to the
SYS pin. | | PGND | 17,18 | P | Power ground connection for high-current power converter node.
Internally, PGND is connected to the source of the n-channel LSFET. On PCB layout, connect directly to ground
connection of input and output capacitors of the charger. A single point connection is recommended between
power PGND and the analog GND near the IC PGND pin. | | SW | 19,20 | P | Switching node connecting to output inductor.
Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET.
Connect the 0.047µF bootstrap capacitor from SW to BTST. | | BTST | 21 | P | PWM high side driver positive supply.
Internally, the BTST is connected to the anode of the boost-strap diode. Connect the 0.047µF bootstrap
capacitor from SW to BTST. | | REGN | 22 | P | PWM low side driver positive supply output.
Internally, REGN is connected to the cathode of the boost-strap diode. Connect a 4.7µF (10 V rating) ceramic
capacitor from REGN to analog GND. The capacitor should be placed close to the IC. REGN also serves as
bias rail of TS pin. | | PMID | 23 | DO | Battery boost mode output.
Connected to the drain of the reverse blocking MOSFET (RBFET) and the drain of HSFET. If OTG is not used,
the minimum capacitance required on PMID to PGND is 8.2 μF. If OTG is used, the minimum capacitance
required on PMID to PGND is 40 μF for up-to 2.4A output and 60 μF for up-to 3.1A output. | | DSEL | 24 | DO | Open-drain D+/D- multiplexer selection control.
Connect the DSEL to a logic rail via 10-KΩ resistor. The pin is normally float and pull-up by external resistor.
During Section 8.2.3.3, the pin drives low to indicate the device D+/D- detection is in progress and needs to
take control of D+, D- signals. When detection is completed, the pin keeps low when MaxCharge is detected.
The pin returns to float and pulls high by external resistor when other input source type is detected. | | PowerPAD™ | | P | Exposed pad beneath the IC for heat dissipation. Always solder PowerPAD Pad to the board, and have vias on
the PowerPAD plane star-connecting to PGND and ground plane for high-current power converter. |

(1) DI (Digital Input), DO (Digital Output), DIO (Digital Input/Output), AI (Analog Input), AO (Analog Output), AIO (Analog Input/Output)

Electrical Characteristics

VVBUS_UVLOZ < VVBUS < VACOV and VVBUS > VBAT + VSLEEP, TJ = –40°C to +125°C and TJ = 25°C for typical values (unless otherwise noted)

PARAMETERTEST CONDITIONSMINTYPMAXUNIT
QUIESCENT CURRENTS
VBAT = 4.2 V, V(VBUS) < V(UVLO), leakage
between BAT and VBUS
5µA
IBATBattery discharge current (BAT, SW, SYS) in buck modeHigh-Z mode, no VBUS, BATFET disabled
(REG09[5]=1), battery monitor disabled, TJ
<
85°C
1223µA
High-Z mode, no VBUS, BATFET enabled
(REG09[5]=0), battery monitor disabled, TJ
<
85°C
3260µA
Input supply current (VBUS) in buck mode when High-Z modeV(VBUS)= 5 V, High-Z mode, no battery, battery
monitor disabled
1535µA
I(VBUS_HIZ)is enabledV(VBUS)= 12 V, High-Z mode, no battery, battery
monitor disabled
2550µA
VBUS > V(UVLO), VBUS > VBAT, converter not
switching
1.53mA
I(VBUS)Input supply current (VBUS) in buck modeVBUS > V(UVLO), VBUS > VBAT, converter
switching, VBAT = 3.2 V, ISYS = 0A
3mA
VBUS > V(UVLO), VBUS > VBAT, converter
switching, VBAT = 3.8 V, ISYS = 0 A
3mA
I(BOOST)Battery discharge current in boost modeVBAT = 4.2 V, boost mode, I(VBUS)= 0 A,
converter switching
5mA
VBUS/BAT POWER UP
V(VBUS_OP)VBUS operating range3.914V
V(VBUS_UVLOZ)VBUS for active I2C, no battery3.6V
V(SLEEP)Sleep mode falling threshold2565120mV
V(SLEEPZ)Sleep mode rising threshold130250370mV
VBUS over-voltage rising threshold1414.6V
V(ACOV)VBUS over-voltage falling threshold13.514V
VBAT(UVLOZ)Battery for active I2C, no VBUS2.3V
VBAT(DPL)Battery depletion falling threshold2.152.5V
VBAT(DPLZ)Battery depletion rising threshold2.352.7V
V(VBUSMIN)Bad adapter detection threshold3.8V
I(BADSRC)Bad adapter detection current source30mA
POWER-PATH MANAGEMENT
I(SYS) = 0 A, VBAT> VSYS(MIN), BATFET Disabled
(REG09[5]=1)
VBAT+
50 mV
V
VSYSTypical system regulation voltageI(SYS) = 0 A, VBAT< VSYS(MIN), BATFET Disabled
(REG09[5]=1)
VSYS(MIN) +
150 mV
V
VSYS(MIN)Minimum DC system voltage outputVBAT< VSYS(MIN), SYS_MIN = 3.5 V
(REG03[3:1]=101), ISYS= 0 A
3.503.65V
VSYS(MAX)Maximum DC system voltage outputVBAT = 4.35 V, SYS_MIN = 3.5V
(REG03[3:1]=101), ISYS= 0 A
4.404.42V

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

MINMAXVALUE
VBUS (converter not switching)–222V
PMID (converter not switching)–0.322V
STAT–0.320V
DSEL–0.320V
BTST–0.320V
SW–216V
Voltage range (with respect to GND)SW (peak for 10 ns duration)–316V
BAT, SYS (converter not switching)–0.36V
SDA, SCL, INT, OTG, REGN, TS, CE, QON–0.37V
D+, D––0.37V
BTST TO SW–0.37V
PGND to GND–0.30.3V
ILIM–0.35V
INT, STAT6mA
Output sink currentDSEL6mA
Junction temperature–40150°C
Storage temperature range, Tstg–65150°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted.

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN
NOM
MAXUNIT
VINInput voltage3.914(1)V
IINInput current (VBUS)3.25A
ISYSOutput current (SW)5A
VBATBattery voltage4.608V
Fast charging current5A
IBATUp to 6 (continuos)A
Discharging current with internal MOSFET9 (peak)
(Up to 1 sec duration)
A
TAOperating free-air temperature range–4085°C

(1) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BTST or SW pins. A tight layout minimizes switching noise.

Product Folder Links: BQ25895

Thermal Information

| | | BQ25895 | |-----------|----------------------------------------------|------------|------| | | THERMAL METRIC(1) | RTW (WQFN) | UNIT | | | | 24-PINS | | RθJA | Junction-to-ambient thermal resistance | 31.8 | °C/W | | RθJC((op) | Junction-to-case (top) thermal resistance | 27.9 | °C/W | | RθJB | Junction-to-board thermal resistance | 8.7 | °C/W | | ψJT | Junction-to-top characterization parameter | 0.3 | °C/W | | ψJB | Junction-to-board characterization parameter | 8.7 | °C/W | | RθJC(bot) | Junction-to-case (bottom) thermal resistance | 2.0 | °C/W |

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

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