CD4051

Part: CD405xB

Type: CMOS Single 8-Channel Analog Multiplexer or Demultiplexer With Logic-Level Conversion

Key Specs:

• Digital signal levels: 3V to 20V
• Analog signal levels: ≤ 20Vp-p
• Single supply range: 3V to 20V
• Dual supply range: ± 3V to ± 10V
• ON resistance: 125Ω (typical) for VDD = 15V
• Channel leakage: ±10pA (typical) at VDD = 15V
• Quiescent power dissipation: 0.2µW (typical)
• ESD protection HBM: 3000V
• ESD protection CDM: 2000V

Features:

• Wide range of digital and analog signal levels
• Low ON resistance
• Low channel leakage
• Low quiescent power dissipation
• Break-before-make switching eliminates channel overlap
• Bidirectional signal path
• ESD protection
• Pin compatible with industry standard 4051 muxes
• Digitally-controlled analog switches

Applications:

• Analog and digital multiplexing and demultiplexing
• Analog to digital and digital to analog conversion
• Signal gating
• Factory automation
• Televisions
• Appliances
• Consumer audio
• Programmable logic circuits
• Sensors

Package:

• J (CDIP, 16): 19.50mm × 6.92mm
• N (PDIP, 16): 19.3mm × 9.4mm
• D (SOIC, 16): 9.9mm x [width not specified]
• NS (SOP, 16): 10.2mm × 7.8mm
• PW (TSSOP, 16): 5mm × 6.4mm

• Wide range of digital and analog signal levels:
  • Digital: 3V to 20V
  • Analog: ≤ 20V_P-P
• Single supply range: 3V to 20V (performance degrades for VDD < 3V)
• Dual Supply range: ± 3V to ± 10V
• Low ON resistance, 125Ω (typical) over input range for V_DD = 15V
• Low channel leakage of ±10pA (typical) at V_DD = 15V
• Low guiescent power dissipation: 0.2µW (typical)
• Break-before-make switching eliminates channel overlap
• Bidirectional signal path
• ESD protection HBM: 3000V, CDM: 2000V
• Pin compatible with industry standard 4051 muxes

• Analog and digital multiplexing and demultiplexing
• Analog to digital and digital to analog conversion
• Signal gating
• Factory automation
• Televisions
• Appliances
• Consumer audio
• Programmable logic circuits
• Sensors

Figure 4-1. CD4051B E, M, NS, and PW Package, 16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP (Top View)

Figure 4-2. CD4052B E, M, NS, and PW Package, 16-Pin PDIP, CDIP, SOP, and TSSOP (Top View)

Figure 4-3. CD4053B E, M, NS, and PW Package, 16-Pin PDIP, CDIP, SOP, and TSSOP (Top View)

| PIN | |-------------|-----|---------------------------------------|--|--|--|--|--|--| | NAME | | DESCRIPTION | | CH 4 IN/OUT | I/O | Channel 4 in/out | | CH 6 IN/OUT | I/O | Channel 6 in/out | | COM OUT/IN | I/O | Common out/in | | CH 7 IN/OUT | I/O | Channel 7 in/out | | CH 5 IN/OUT | I/O | Channel 5 in/out | | INH | I | Disables all channels. See Table 7-1. | | VEE | — | Negative power input | | VSS | — | Ground | | C | I | Channel select C. See Table 7-1. | | B | I | Channel select B. See Table 7-1. | | A | I | Channel select A. See Table 7-1. | | CH 3 IN/OUT | I/O | Channel 3 in/out | | CH 0 IN/OUT | I/O | Channel 0 in/out | | CH 1 IN/OUT | I/O | Channel 1 in/out | | CH 2 IN/OUT | I/O | Channel 2 in/out | | VDD | — | Positive power input | | | | TYPE(1) | Table 4-1. Pin Functions CD4051B

(1) I = input, O = output

Table 4-2. Pin Functions CD4052B

| | PIN | TYPE(1) | |-----|---------------|---------|---------------------------------------| | NO. | NAME | | DESCRIPTION | | 1 | Y CH 0 IN/OUT | I/O | Channel Y0 in/out | | 2 | Y CH 2 IN/OUT | I/O | Channel Y2 in/out | | 3 | Y COM OUT/IN | I/O | Y common out/in | | 4 | Y CH 3 IN/OUT | I/O | Channel Y3 in/out | | 5 | Y CH 1 IN/OUT | I/O | Channel Y1 in/out | | 6 | INH | I | Disables all channels. See Table 7-1. | | 7 | VEE | — | Negative power input | | 8 | VSS | — | Ground | | 9 | B | I | Channel select B. See Table 7-1. | | 10 | A | I | Channel select A. See Table 7-1. | | 11 | X CH 3 IN/OUT | I/O | Channel X3 in/out | | 12 | X CH 0 IN/OUT | I/O | Channel X0 in/out | | 13 | X COM IN/OUT | I/O | X common out/in | | 14 | X CH 1 IN/OUT | I/O | Channel in/out | | 15 | X CH 2 IN/OUT | I/O | Channel in/out | | 16 | VDD | — | Positive power input |

(1) I = input, O = output

Table 4-3. Pin Functions CD4053B

| | PIN | TYPE(1) | |-----|--------------------|---------|---------------------------------------| | NO. | NAME | | DESCRIPTION | | 1 | BY IN/OUT | I/O | B channel Y in/out | | 2 | BX IN/OUT | I/O | B channel X in/out | | 3 | CY IN/OUT | I/O | C channel Y in/out | | 4 | CX OR CY
OUT/IN | I/O | C common out/in | | 5 | CX IN/OUT | I/O | C channel X in/out | | 6 | INH | I | Disables all channels. See Table 7-1. | | 7 | VEE | — | Negative power input | | 8 | VSS | — | Ground | | 9 | C | I | Channel select C. See Table 7-1. | | 10 | B | I | Channel select B. See Table 7-1. | | 11 | A | I | Channel select A. See Table 7-1. | | 12 | AX IN/OUT | I/O | A channel X in/out | | 13 | AY IN/OUT | I/O | A channel Y in/out | | 14 | AX OR AY OUT/IN | I/O | A common out/in | | 15 | BX OR BY OUT/IN | I/O | B common out/in | | 16 | VDD | — | Positive power input |

⁽¹⁾ I = input, O = output

Over operating free-air temperature range, VSUPPLY = ±5V, and RL = 100Ω, (unless otherwise noted)(1)

| Over operating free-air temperature range, VSUPPLY = ±5V, and RL = 100Ω, (unless otherwise noted)(1)
PARAMETER | | | TEST CONDITIONS | | | MIN
TYP | MAX UNIT | |-------------------------------------------------------------------------------------------------------------------|---------|---------|-----------------|---------|-------|------------|----------|----| | SIGNAL INPUTS (VIS) AND OUTPUTS (VOS) | | | VIS (V) | VEE (V) | VSS (V) | VDD (V) | TEMP | | | | | | | –55°C | | 60 | | | | | | | –40°C | | 60 | | | | 0V | 0V | 5V | 25°C | 17 | 60 | | | | | | | 85°C | | 150 | | | | | | | 125°C | | 150 | | | | | | | –55°C | | 60 | | | | | | | –40°C | | 60 | | | | 0V | 0V | 10V | 25°C | 18 | 60 | | | | | | | 85°C | | 300 | | Quiescent Device Current, IDD Max | | | | | 125°C | | 300 | | | | | | | –55°C | | 60 | µA | | | | | | | –40°C | | 60 | | | | 0V | 0V | 15V | 25°C | 18 | 60 | | | | | | | 85°C | | 600 | | | | | | | 125°C | | 600 | | | | | | | –55°C | | 100 | | | | | | | –40°C | | 100 | | | | 0V | 0V | 20V | 25°C | 18 | 100 | | | | | | | 85°C | | 3000 | | | | | | | 125°C | | 3000 | | | | | | | –55°C | | 800 | | | | | | | –40°C | | 850 | | | | 0V | 0V | 5V | 25°C | 470 | 1050 | | | | | | | 85°C | | 1200 | | | | | | | 125°C | | 1300 | | | | | | | –55°C | | 310 | | | | | | | –40°C | | 300 | | Drain to Source ON Resistance rON
Max | | 0V | 0V | 10V | 25°C | 180 | 400 | Ω | | 0 ≤ VIS ≤ VDD | | | | | 85°C | | 520 | | | | | | | 125°C | | 550 | | | | | | | –55°C | | 200 | | | | | | | –40°C | | 210 | | | | 0V | 0 | 15V | 25°C | 125 | 240 | | | | | | | 85°C | | 300 | | | | | | | 125°C | | 300 | | | | 0V | 0V | 5V | | 15 | | Change in ON Resistance
(Between Any Two Channels), | | 0V | 0V | 10V | 25°C | 10 | | Ω | | ΔRON | | 0V | 0V | 15V | | 5 | Product Folder Links: CD4051B CD4052B CD4053B

over operating free-air temperature range (unless otherwise noted)(1) (2)

⁽¹⁾ Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to ground, unless otherwise specified.

over operating free-air temperature range (unless otherwise noted)

| THERMAL METRIC(1) | | CD405x | |-------------------|----------------------------------------|----------|----------|----------|------------|------|--| | | | E (PDIP) | M (SOIC) | NS (SOP) | PW (TSSOP) | UNIT | | | | 16 PINS | 16 PINS | 16 PINS | 16 PINS | | RθJA | Junction-to-ambient thermal resistance | 67 | 73 | 64 | 116.5 | °C/W | ⁽¹⁾ For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

⁽²⁾ JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.