OPA2134
OPAx134 High-Performance, SoundPlus™ Audio Operational Amplifiers
Manufacturer
ti
Overview
Part: OPAx134
Type: Audio Operational Amplifiers
Key Specs:
- Ultra-low distortion: 0.00008%
- Low noise: 8nV/√Hz
- Input bias current: 5pA
- Slew rate: 20V/µs
- Bandwidth: 8MHz
- Open-loop gain: 120dB (2kΩ)
- Supply range: ±2.5V to ±18V
Features:
- Excellent sound quality
- True FET-input
- High speed
- High open-loop gain
- Single, dual, and quad versions
- High output drive capability
- Excellent DC performance
- Wide output swing (to within 1V of the rails)
- Easy to use and free from phase-inversion and overload problems
- Unity-gain stable
- Excellent dynamic behavior over a wide range of load conditions
- Input cascode circuitry provides excellent common-mode rejection
- Maintains low input bias current over wide input voltage range
- Dual and quad versions feature completely independent circuitry
- Specified for –40°C to +85°C operation
Applications:
- Professional audio and music
- Line drivers
- Line receivers
- Multimedia audio
- Active filters
- Preamplifiers
- Integrators
- Crossover networks
Package:
- OPA134 (Single): D (SOIC, 8), P (PDIP, 8)
- OPA2134 (Dual): D (SOIC, 8), P (PDIP, 8)
- OPA4134 (Quad): D (SOIC, 14)
Features
• Excellent sound quality
• Ultra-low distortion: 0.00008%
• Low noise: 8nV/√Hz • True FET-input: IB = 5pA
• High speed:
– Slew rate: 20V/µs – Bandwidth: 8MHz
• High open-loop gain: 120dB (2kΩ) • Wide supply range: ±2.5V to ±18V • Single, dual, and quad versions
Applications
• Professional audio and music
• Line drivers
• Line receivers
• Multimedia audio
• Active filters
• Preamplifiers
• Integrators
• Crossover networks
THD+Noise vs Frequency
Pin Configuration
Figure 4-1. OPA134: D Package, 8-Pin SOIC, and P Package, 8-Pin PDIP (Top View)
Pin Functions: OPA134
| | PIN | |--------|------|--------|-----------------------------------------| | NAME | NO. | TYPE | DESCRIPTION | | +IN | 3 | Input | Noninverting input | | –IN | 2 | Input | Inverting input | | NC | 1, 5 | — | Do not connect these pins(1) | | NC | 8 | — | No internal connection. Float this pin. | | Output | 6 | Output | Output | | V+ | 7 | Power | Positive power supply | | V– | 4 | Power | Negative power supply |
(1) Existing layouts for the OPA134 before revision B of this data sheet do not need to be redesigned.
Figure 4-2. OPA2134: D Package, 8-Pin SOIC, and P Package, 8-Pin PDIP (Top View)
Table 4-1. Pin Functions: OPA2134
| PIN |
|-------|-----|--------|---------------------------------|--|
| NAME | NO. | TYPE | DESCRIPTION |
| +IN A | 3 | Input | Noninverting input, channel A |
| +IN B | 5 | Input | Noninverting input, channel B |
| –IN A | 2 | Input | Inverting input, channel A |
| –IN B | 6 | Input | Inverting input, channel B |
| OUT A | 1 | Output | Output, channel A |
| OUT B | 7 | Output | Output, channel B |
| V+ | 8 | Power | Positive (highest) power supply |
| V– | 4 | Power | Negative (lowest) power supply |
Figure 4-3. OPA4134: D Package, 14-Pin SOIC (Top View)
Table 4-2. Pin Functions: OPA4134
| PIN | |-------|-----|--------|---------------------------------| | NAME | NO. | TYPE | DESCRIPTION | | +IN A | 3 | Input | Noninverting input, channel A | | +IN B | 5 | Input | Noninverting input, channel B | | +IN C | 10 | Input | Noninverting input, channel C | | +IN D | 12 | Input | Noninverting input, channel D | | –IN A | 2 | Input | Inverting input, channel A | | –IN B | 6 | Input | Inverting input, channel B | | –IN C | 9 | Input | Inverting input, channel C | | –IN D | 13 | Input | Inverting input, channel D | | OUT A | 1 | Output | Output, channel A | | OUT B | 7 | Output | Output, channel B | | OUT C | 8 | Output | Output, channel C | | OUT D | 14 | Output | Output, channel D | | V+ | 4 | Power | Positive (highest) power supply | | V– | 11 | Power | Negative (lowest) power supply |
Product Folder Links: OPA134 OPA2134 OPA4134
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Electrical Characteristics
at TA = 25°C, VS = ±15V, RL = 2kΩ connected to midsupply, and VCM = VOUT = midsupply (unless otherwise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| AUDIO PERFORMANCE | |||||||
| Total harmonic distortion plus | f = 1kHz, G = 1, | RL = 2kΩ | 0.00008 | ||||
| THD+N | noise | VO = 3Vrms | RL = 600Ω | 0.00015 | % | ||
| Intermodulation distortion | f = 1kHz, G = 1, VO = 1VPP | –98 | dB | ||||
| Headroom(1) | THD < 0.01%, RL = 2kΩ, VS = 18V | 21.3 | dBu | ||||
| FREQUENCY RESPONSE | |||||||
| GBW | Gain bandwidth product | 8 | MHz | ||||
| SR | Slew rate(2) | ±20 | V/μs | ||||
| 10V step, G = 1, | 0.1% | 0.7 | |||||
| Settling time | CL = 100pF | 0.01% | 1 | μs | |||
| FPBW | Full power bandwidth | 1.3 | MHz | ||||
| Overload recovery time | VIN × G = VS | 0.6 | µs | ||||
| NOISE | |||||||
| Input voltage noise | f = 20Hz to 20kHz | 1.2 | µVrms | ||||
| en | Input voltage noise density | f = 1kHz | 8 | nV/√Hz | |||
| In | Input current noise density | f = 1kHz | 3 | fA/√Hz | |||
| OFFSET VOLTAGE | |||||||
| ±1 | ±3.5 | ||||||
| VOS | Input offset voltage | TA = –40°C to +85°C | ±1 | mV | |||
| dVOS/dT | Input offset voltage drift | TA = –40°C to +85°C | ±2 | μV/°C | |||
| PSRR | Power-supply rejection ratio | 5V ≤ VS ≤ 36V | 90 | 106 | dB | ||
| DC, RL = 2kΩ | 128 | ||||||
| Channel separation (dual, quad) | f = 20kHz, RL = 2kΩ | 126 | dB | ||||
| INPUT BIAS CURRENT | |||||||
| ±5 | ±100 | pA | |||||
| IB | Input bias current(3) | TA = –40°C to +85°C | See Section 5.8 | ±5 | nA | ||
| IOS | Input offset current(3) | ±2 | ±50 | pA | |||
| INPUT VOLTAGE | |||||||
| VCM | Common-mode voltage | (V–) + 2.5 | ±13 (V+) – 3.5 | V | |||
| 86 | 100 | ||||||
| CMRR | Common-mode rejection ratio | –12.5V ≤ VCM ≤ 11.5V | TA = –40°C to +85°C | 90 | dB | ||
| INPUT IMPEDANCE | |||||||
| Differential | 1013 8 | Ω pF | |||||
| Common-mode | –12.5V ≤ VCM ≤ 11.5V | 1013 6 | Ω pF | ||||
| OPEN-LOOP GAIN | |||||||
| RL = 10kΩ, –14.5V ≤ VO ≤ 13.8V | 104 | 120 | |||||
| AOL | Open-loop voltage gain | RL = 2kΩ, –13.8V ≤ VO ≤ 13.5V | 104 | 120 | dB |
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
| MIN MAX | UNIT | |||
|---|---|---|---|---|
| VS | Supply voltage, (V+) – (V–) | Single supply | 36 V | |
| Input voltage(2) | (V–) – 0.5 (V+) + 0.5 | V | ||
| Input current(2) | ±10 | mA | ||
| ISC | Output short-circuit(3) | |||
| TA | Operating temperature | –40 125 | °C | |
| TJ | Junction temperature | 150 | °C | |
| Tstg | Storage temperature | –55 125 | °C |
- (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
- (2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails must be current limited to 10mA or less.
- (3) Short-circuit to ground, one amplifier per package.
5.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| OPA134 in SOIC and PDIP Packages, and OPA2134 in PDIP Package | ||||
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
| OPA2134 in SOIC Package | ||||
| Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | |||
| V(ESD) | Electrostatic discharge | Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 | V |
| OPA4134 in SOIC Package | ||||
| Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | ||
| V(ESD) | Electrostatic discharge | Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±200 | V |
- (1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
- (2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.
5.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Supply voltage, (V+) – (V–) | Dual supply | ±2.5 | ±15 | ±18 | ||
| VS | Single supply | 5 | 30 | 36 | V | |
| TA | Ambient temperature | –40 | +85 | °C |
5.4 Thermal Information - OPA134
| | | OPA134 | |-----------|----------------------------------------------|----------|----------|------| | | THERMAL METRIC(1) | D (SOIC) | P (PDIP) | UNIT | | | | 8 PINS | 8 PINS | | RθJA | Junction-to-ambient thermal resistance | 160 | 73 | °C/W | | RθJC(top) | Junction-to-case (top) thermal resistance | 75 | 50 | °C/W | | RθJB | Junction-to-board thermal resistance | 60 | 36 | °C/W | | ΨJT | Junction-to-top characterization parameter | 9 | 17 | °C/W | | ΨJB | Junction-to-board characterization parameter | 50 | 35 | °C/W | | RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| Supply voltage, (V+) – (V–) | Dual supply | ±2.5 | ±15 | ±18 | ||
| VS | Single supply | 5 | 30 | 36 | V | |
| TA | Ambient temperature | –40 | +85 | °C |
Thermal Information
| | | OPA134 | |-----------|----------------------------------------------|----------|----------|------| | | THERMAL METRIC(1) | D (SOIC) | P (PDIP) | UNIT | | | | 8 PINS | 8 PINS | | RθJA | Junction-to-ambient thermal resistance | 160 | 73 | °C/W | | RθJC(top) | Junction-to-case (top) thermal resistance | 75 | 50 | °C/W | | RθJB | Junction-to-board thermal resistance | 60 | 36 | °C/W | | ΨJT | Junction-to-top characterization parameter | 9 | 17 | °C/W | | ΨJB | Junction-to-board characterization parameter | 50 | 35 | °C/W | | RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
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