MP1482DS-LF-Z

Part: MP1482DS-LF-Z — Monolithic Power Systems, Inc.

Type: Synchronous Buck Regulator

Description: The MP1482 is a monolithic synchronous buck regulator that provides 2A of continuous load current over a wide input voltage of 4.75V to 18V, integrates two 130mΩ MOSFETs, and achieves up to 93% efficiency.

Operating Conditions:

• Supply voltage: 4.75V to 18V
• Operating temperature: -40°C to +125°C (Junction Temperature)
• Output voltage: 0.923V to 15V

Absolute Maximum Ratings:

• Max supply voltage: +20V
• Max continuous current: 2A
• Max junction/storage temperature: 150°C

Key Specs:

• Shutdown Supply Current: 1 μA (Typ, V EN = 0V)
• Supply Current: 1.3 mA (Typ, V EN = 2.0V; V FB = 1.0V)
• Feedback Voltage: 0.923 V (Typ, 4.75V ≤ V IN ≤ 18V)
• High-Side Switch On Resistance: 130 mΩ (Typ)
• Low-Side Switch On Resistance: 130 mΩ (Typ)
• Upper Switch Current Limit: 3.4 A (Typ, Minimum Duty Cycle)
• Oscillation Frequency: 340 kHz (Typ)
• Thermal Shutdown: 160 °C (Typ)

Features:

• 2A Output Current
• Integrated 130mΩ Power MOSFET Switches
• Wide 4.75V to 18V Operating Input Range
• Output Adjustable from 0.923V to 15V
• Up to 93% Efficiency
• Programmable Soft-Start
• Stable with Low ESR Ceramic Output Capacitors
• Fixed 340kHz Frequency
• Input Under Voltage Lockout
• Cycle-by-Cycle Over Current Protection

Applications:

• Distributed Power Systems
• FPGA, DSP, ASIC Power Supplies
• Networking Systems
• Green Electronics/ Appliances

Package:

• SOIC8

• 2A Output Current
• Integrated 130m Ω Power MOSFET Switches
• Wide 4.75V to 18V Operating Input Range
• Output Adjustable from 0.923V to 15V
• Up to 93% Efficiency
• Programmable Soft-Start
• Stable with Low ESR Ceramic Output Capacitors

An adjustable soft-start prevents inrush current at turn-on, and in shutdown mode the supply current drops to 1μA.

• Fixed 340kHz Frequency
• Input Under Voltage Lockout
• Cycle-by-Cycle Over Current Protection
• 8-Pin SOIC

• Distributed Power Systems
• FPGA, DSP, ASIC Power Supplies
• Networking Systems
• Green Electronics/ Appliances

All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. 'MPS' and 'The Future of Analog IC Technology' are registered trademarks of Monolithic Power Systems, Inc.

Notebook Computers REFR TO MP1476

This device, available in an 8-pin SOIC package, provides a very compact solution with minimal external components. TYPICAL APPLICATION T RECOMMEND FOR

Part Number	Package	Top Marking	Free Air Temperature (T A )
MP1482DS *	SOIC8	MP1482DS	-40 C to +85 C

• Supply Voltage V IN ........................-0.3V to +20V
• Switch Node Voltage V SW ............................ 21V
• Boost Voltage V BS ..........V SW - 0.3V to V SW + 6V All Other Pins..................................-0.3V to +6V NEW
• Junction Temperature...............................150°C
• Continuous Power Dissipation (T A = +25°C) (2)
• SOIC8……………………………………….1.38W
• Lead Temperature ....................................260°C
• Storage Temperature .............. -65°C to +150°C
• Recommended Operating Conditions (3)
• Input Voltage V IN ............................4.75V to 18V
• Output Voltage V OUT .....................0.923V to 15V
• Operating Junct. Temp (T J )........-40°C to +125°C

ORDERING INFORMATION * For Tape & Reel, add suffix -Z (e.g. MP1482DS-Z); For RoHS Compliant Packaging, add suffix -LF (e.g. MP1482DS-LF-Z) PACKAGE REFERENCE SOIC8 ABSOLUTE MAXIMUM RATINGS (1) Notes: 1) Exceeding these ratings may damage the device 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θ JA , and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-TA)/ θ JA . Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage.. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer board. OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

Thermal Resistance

(4)

θ

JA

θ

JC

SOIC8..................................... 90 ...... 45...

C/W

Parameter	Symbol	Condition	Min	Typ	Max	Units
Shutdown Supply Current		V EN = 0V		1	3.0	μ A
Supply Current		V EN = 2.0V; V FB = 1.0V		1.3	1.5	mA
Feedback Voltage	V FB	4.75V V IN 18V	0.9	0.923	0.946	V
Feedback Overvoltage Threshold				1.1		V
Error Amplifier Voltage Gain (5)	A EA			400		V/V
Error Amplifier Transconductance	G EA	I C = 10 μ A		800		μ A/V
High-Side Switch On Resistance (5)	R DS(ON)1			130		m Ω
Low-Side Switch On Resistance (5)	R DS(ON)2			130		m Ω
High-Side Switch Leakage Current		V EN = 0V, V SW = 0V			10	μ A
Upper Switch Current Limit		Minimum Duty Cycle	2.4	3.4		A
Lower Switch Current Limit		From Drain to Source		1.1		A
COMP to Current Sense Transconductance	GCS	DESIGNS		3.5	MP1476	A/V
Oscillation Frequency	F osc1		305	340	375	kHz
Short Circuit Oscillation Frequency	F osc2	V FB = 0V		100		kHz
Maximum Duty Cycle	D MAX	V FB = 1.0V		90		%
Minimum On Time (5)				220		ns
EN Shutdown Threshold Voltage		V EN Rising	1.1	1.5	2.0	V
EN Shutdown Threshold Voltage Hysteresis RECOMMENDED				210		mV
EN Lockout Threshold Voltage			2.2	2.5	2.7	V
EN Lockout Hysterisis				210		mV
Input Under Voltage Lockout Threshold		V IN Rising TO	3.8	4.1	4.40	V
Input Under Voltage Lockout Threshold Hysteresis	NEW			210		mV
Soft-Start Current		V SS = 0V		6		μ A
Soft-Start Period		C SS = 0.1 μ F		15		ms
Thermal Shutdown (5)				160		°C

ELECTRICAL CHARACTERISTICS VIN = 12V, TA = +25°C, unless otherwise noted. Note: 5) Guaranteed by design, not tested. OT RECOMMENDED FOR

REFER TO MP1476

SOIC8 Pin #	Name	Description
1	BS	High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET switch. Connect a 0.01 μ F or greater capacitor from SW to BS to power the high side switch.
2	IN	Power Input. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.75V to 18V power source. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. See Input Capacitor . FOR
3	SW	Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch.
4	GND	Ground.
5	FB	Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a resistive voltage divider from the output voltage. The feedback threshold is 0.923V. See Setting the Output Voltage .
6	COMP	Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND to compensate the regulation control loop. In some cases, an additional capacitor from COMP to GND is required. See Compensation Components.
7	EN	Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn it off. Pull up with 100k Ω resistor for automatic startup.
8	SS	Soft-Start Control Input. SS controls the soft start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1 μ F capacitor sets the soft-start period to 15ms. To disable the soft-start feature, leave SS unconnected.

OPERATION FUNCTIONAL DESCRIPTION The MP1482 is a synchronous rectified, current-mode, step-down regulator. It regulates input voltages from 4.75V to 18V down to an output voltage as low as 0.923V, and supplies up to 2A of load current. The MP1482 uses current-mode control to regulate the output voltage. The output voltage is measured at FB through a resistive voltage divider and amplified through the internal transconductance error amplifier. The voltage at the COMP pin is compared to the switch current measured internally to control the output voltage. The converter uses internal N-Channel MOSFET switches to step-down the input voltage to the regulated output voltage. Since the high side MOSFET requires a gate voltage greater than the input voltage, a boost capacitor connected between SW and BS is needed to drive the high side gate. The boost capacitor is charged from the internal 5V rail when SW is low. When the MP1482 FB pin exceeds 20% of the nominal regulation voltage of 0.923V, the over voltage comparator is tripped and the COMP pin and the SS pin are discharged to GND, forcing the high-side switch off. OT RECOMMENDED FOR

APPLICATIONS INFORMATION COMPONENT SELECTION Setting the Output Voltage The output voltage is set using a resistive voltage divider from the output voltage to FB pin. The voltage divider divides the output voltage down to the feedback voltage by the ratio: R2 R1 R2 V V OUT FB Where VFB is the feedback voltage and VOUT is the output voltage. Thus the output voltage is: R2 R2 R1 0.923 VOUT R2 can be as high as 100k Ω , but a typical value is 10k Ω . Using the typical value for R2, R1 is determined by: 0.923) (V 10.83 R1 OUT (k Ω ) For example, for a 3.3V output voltage, R2 is 10k Ω , and R1 is 26.1k Ω . Inductor The inductor is required to supply constant current to the output load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will result in lower output ripple voltage. However, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. A good rule for determining the inductance to use is to allow the peak-to-peak ripple current in the inductor to be approximately 30% of the maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit. The inductance value can be calculated by: IN OUT L S OUT V V 1 I f V L Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated by: IN OUT S OUT LOAD LP V V 1 L f 2 V I I Where ILOAD is the load current. The choice of which style inductor to use mainly depends on the price vs. size requirements and any EMI requirements. Optional Schottky Diode During the transition between high-side switch and low-side switch, the body diode of the lowside power MOSFET conducts the inductor current. The forward voltage of this body diode is high. An optional Schottky diode may be paralleled between the SW pin and GND pin to improve overall efficiency. Table 1 lists example Schottky diodes and their Manufacturers. Table 1-Diode Selection Guide Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors may also suffice. Choose X5R or X7R dielectrics when using ceramic capacitors. Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

Part Number	Voltage/Current Rating	Vendor
B130	30V, 1A	Diodes, Inc.
SK13	30V, 1A	Diodes, Inc.
MBRS130	30V, 1A	International Rectifier

Where VOUT is the output voltage, V IN is the input voltage, f S is the switching frequency, and Δ I L is the peak-to-peak inductor ripple current.

The worst-case condition occurs at V IN = 2VOUT, where I C1 = I LOAD /2. For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1 μ F, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple for low ESR capacitors can be estimated by: IN OUT IN OUT S LOAD IN V V 1 V V f C1 I V Where C1 is the input capacitance value. Output Capacitor The output capacitor is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: C2 f 8 1 R V V 1 L f V V S ESR IN OUT S OUT OUT Where C2 is the output capacitance value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: IN OUT 2 S OUT OUT V V 1 C2 L f 8 V Δ V The characteristics of the output capacitor also affect the stability of the regulation system. The MP1482 can be optimized for a wide range of capacitance and ESR values. Compensation Components MP1482 employs current mode control for easy compensation and fast transient response. The system stability and transient response are controlled through the COMP pin. COMP pin is the output of the internal transconductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of the control system. The DC gain of the voltage feedback loop is given by: OUT FB EA CS LOAD VDC V V A G R A Where AVEA is the error amplifier voltage gain; GCS is the current sense transconductance and RLOAD is the load resistor value. The system has two poles of importance. One is due to the compensation capacitor (C3) and the output resistor of the error amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at: VEA EA P1 A C3 2 G f LOAD P2 R C2 2 1 f Where GEA is the error amplifier transconductance. The system has one zero of importance, due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at: R3 C3 2 1 f Z1 OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to:

The system may have another zero of importance, if the output capacitor has a large capacitance and/or a high ESR value. The zero, due to the ESR and capacitance of the output capacitor, is located at:

In this case (as shown in Figure 2), a third pole set by the compensation capacitor (C6) and the compensation resistor (R3) is used to compensate the effect of the ESR zero on the loop gain. This pole is located at: R3 C6 2 1 f P3 The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause system instability. A good rule of thumb is to set the crossover frequency below one-tenth of the switching frequency. To optimize the compensation components, the following procedure can be used. 1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine the R3 value by the following equation: FB OUT CS EA S FB OUT CS EA C V V G G f 0.1 C2 2 V V G G f C2 2 R3 Where fC is the desired crossover frequency which is typically below one tenth of the switching frequency. 2. Choose the compensation capacitor (C3) to achieve the desired phase margin. For applications with typical inductor values, setting the compensation zero, f Z1 , below one-forth of the crossover frequency provides sufficient phase margin. Determine the C3 value by the following equation: C f R3 2 4 C3 Where R3 is the compensation resistor. 3. Determine if the second compensation capacitor (C6) is required. It is required if the ESR zero of the output capacitor is located at less than half of the switching frequency, or the following relationship is valid: 2 f R C2 2 1 S ESR If this is the case, then add the second compensation capacitor (C6) to set the pole f P3 at the location of the ESR zero. Determine the C6 value by the equation: R3 R C2 C6 ESR External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, and it will be a must if the applicable condition is: VOUT is 5V or 3.3V, and duty cycle is high: D= IN OUT V V >65% In these cases, an external BST diode is recommended from the output of the voltage regulator to BST pin, as shown in Figure.2 Figure 2-Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1μF. OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

INPUT MP1482 BS IN FB SW SS GND COMP EN 1 2 3 5 6 4 8 7 Figure 3-MP1482 with 3.3V Output, 22μF/6.3V Ceramic Output Capacitor OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

INPUT MP1482 BS IN FB SW SS GND COMP EN 1 2 3 5 6 4 8 7 Figure 3-MP1482 with 3.3V Output, 22μF/6.3V Ceramic Output Capacitor OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

PCB LAYOUT GUIDE PCB layout is very important to achieve stable operation. It is highly recommended to duplicate EVB layout for optimum performance. If change is necessary, please follow these guidelines and take Figure 4 for reference. 1) Keep the path of switching current short and minimize the loop area formed by input cap, high-side MOSFET and low-side MOSFET. 2) Bypass ceramic capacitors are suggested to be put close to the Vin Pin. 3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. 5) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. MP1482 Typical Application Circuit OT RECOMMENDED FOR NEW DESIGNS REFER TO MP1476

Figure 4-MP1482 Typical Application Circuit and PCB Layout Guide

NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications.