IRLML2803PBF

Part: International Rectifier IRLML2803PbF

Type: N-Channel Power MOSFET

Key Specs:

• Drain-to-Source Voltage (Vdss) = 30V
• Static Drain-to-Source On-Resistance (Rds(on)) = 0.25Ω (max, at Vgs=10V)
• Continuous Drain Current (ID) = 1.2A (at TA=25°C, VGS=10V)
• Gate-to-Source Voltage (VGS) = ±20V

Features:

• Generation V Technology
• Ultra Low On-Resistance
• N-Channel MOSFET
• SOT-23 Footprint
• Low Profile (<1.1mm)
• Available in Tape and Reel
• Fast Switching
• Lead-Free
• RoHS Compliant, Halogen-Free
• Industry's smallest footprint (Micro3)
• Ruggedized device design

Applications:

• Wide variety of applications
• Applications where printed circuit board space is at a premium
• Portable electronics
• PCMCIA cards

Package:

• Micro3™ (SOT-23): <1.1mm profile

	Parameter	Min.	Typ.	Max.	Units	Conditions
V (BR)DSS	Drain-to-Source Breakdown Voltage	30			V	V GS = 0V, I D = 250μA
\Delta V_{(BR)DSS}/\Delta T_J$	Breakdown Voltage Temp. Coefficient		0.029		V/°C	Reference to 25°C, I D = 1mA
Б	Static Ducin to Service On Besintance			0.25		V GS = 10V, I D = 0.91A [3]
R DS(on)	Static Drain-to-Source On-Resistance			0.40	Ω	V GS = 4.5V, I D = 0.46A [3]
V GS(th)	Gate Threshold Voltage	1.0			V	$V_{DS} = V_{GS}$ , $I_D = 250\mu A$
9fs	Forward Transconductance	0.87			S	V DS = 10V, I D = 0.46A
I DSS	Drain-to-Source Leakage Current			1.0	μA	V DS = 24V, V GS = 0V
1055	Brain to obtaine Educage Garrent			25	μΑ	V DS = 24V, V GS = 0V, T J = 125°C
I GSS	Gate-to-Source Forward Leakage			-100	nA	$V_{GS} = -20V$
IGSS	Gate-to-Source Reverse Leakage			100	11/	V GS = 20V
Qg	Total Gate Charge		3.3	5.0		$I_D = 0.91A$
Q gs	Gate-to-Source Charge		0.48	0.72	nC	V DS = 24V
Q gd	Gate-to-Drain ("Miller") Charge		1.1	1.7		V GS = 10V, See Fig. 6 and 9 [3]
t d(on)	Turn-On Delay Time		3.9			V DD = 15V
t r	Rise Time		4.0			$I_D = 0.91A$
t d(off)	Turn-Off Delay Time		9.0		ns	$R_G = 6.2\Omega$
t f	Fall Time		1.7			$R_D= 16Ω, See Fig. 10 [3]
C iss	Input Capacitance		85			V GS = 0V
C oss	Output Capacitance		34		pF	V DS = 25V
C rss	Reverse Transfer Capacitance		15			f = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

	Parameter	Min.	Typ.	Max.	Units	Conditions
Is	Continuous Source Current (Body Diode)	_		0.54	Α	MOSFET symbol showing the
I SM	Pulsed Source Current (Body Diode) [1]			7.3		integral reverse p-n junction diode.
V SD	Diode Forward Voltage			1.2	V	T_J = 25$ °C, $I_S = 0.91$ A, $V_{GS} = 0$ V [3]
t rr	Reverse Recovery Time		26	40	ns	$T_J = 25$ °C, $I_F = 0.91$ A
Q rr	Reverse RecoveryCharge		22	32	nC	di/dt = 100A/μs [3]

Notes:

• [1] Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 )
• T_J ≤ 150°C
• $\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ $
• 4 Surface mounted on FR-4 board, $t \leq 5$ sec.
• $\textcircled{3} \quad I_{SD} \leq 0.91A, \ di/dt \leq 120A/\mu s, \ V_{DD} \leq V_{(BR)DSS}, \qquad \textcircled{3} \quad Limited \ by \ T_{Jmax}, \ starting \ T_J = 25^{\circ}C, \ L = 9.4mH, \ R_G = 25\Omega, \ I_{AS} = 0.9A.Submit Datasheet Feedback



Fig 1. Typical Output Characteristics


Fig 3. Typical Transfer Characteristics


Fig 2. Typical Output Characteristics


Fig 4. Normalized On-Resistance Vs. Temperature



Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage


Fig 7. Typical Source-Drain Diode Forward Voltage


Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage


Fig 8. Maximum Safe Operating Area



Fig 9a. Basic Gate Charge Waveform


Fig 9b. Gate Charge Test Circuit


Fig 10a. Switching Time Test Circuit


Fig 10b. Switching Time Waveforms


Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient



Fig 12a. Unclamped Inductive Test Circuit


Fig 12b. Unclamped Inductive Waveforms


Fig 12c. Maximum Avalanche Energy vs. Drain Current


Fig 13. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETsI_{SD}$

Micro3 (SOT-23) (Lead-Free) Package Outline

Dimensions are shown in millimeters (inches)

	Parameter	Typ.	Max.	Units
$R_{\theta JA}	Maximum Junction-to-Ambient ®		230	°C/W