DRV8323/PART
Three-Phase Smart Gate DriverThe DRV8323/PART is a three-phase smart gate driver from Texas Instruments. View the full DRV8323/PART datasheet below including electrical characteristics, absolute maximum ratings.
Manufacturer
Texas Instruments
Category
Three-Phase Smart Gate Driver
Overview
The DRV832x family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV832x generates the correct gate drive voltages using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The Smart Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A. The DRV832x can operate from a single power supply and supports a wide input supply range of 6 to 60 V for the gate driver and 4 to 60 V for the optional buck regulator.
The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. The configuration settings for the gate driver and device are highly configurable through the SPI or hardware (H/W) interface. The DRV8323 and DRV8323R devices integrate three low-side current sense amplifiers that allow bidirectional current sensing on all three phases of the drive stage. The DRV8320R and DRV8323R devices integrate a 600-mA buck regulator.
A low-power sleep mode is provided to achieve low quiescent current draw by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for SPI device variants.
Features
- Triple Half-Bridge Gate Driver
- -Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
- Smart Gate Drive Architecture
- -Adjustable Slew Rate Control
- -10-mA to 1-A Peak Source Current
- -20-mA to 2-A Peak Sink Current
- Integrated Gate Driver Power Supplies
- -Supports 100% PWM Duty Cycle
- -High-Side Charge Pump
- -Low-Side Linear Regulator
- 6 to 60-V Operating Voltage Range
- Optional Integrated Buck Regulator
- -LMR16006X SIMPLE SWITCHER ®
- -4 to 60-V Operating Voltage Range
- -0.8 to 60-V, 600-mA Output Capability
- Optional Integrated Triple Current Sense Amplifiers (CSAs)
- -Adjustable Gain (5, 10, 20, 40 V/V)
- -Bidirectional or Unidirectional Support
- SPI and Hardware Interface Available
- 6x, 3x, 1x, and Independent PWM Modes
- Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
- Low-Power Sleep Mode (12 μA)
- Linear Voltage Regulator, 3.3 V, 30 mA
- Compact QFN Packages and Footprints
- Efficient System Design With Power Blocks
- Integrated Protection Features
- -VM Undervoltage Lockout (UVLO)
- -Charge Pump Undervoltage (CPUV)
- -MOSFET Overcurrent Protection (OCP)
- -Gate Driver Fault (GDF)
- -Thermal Warning and Shutdown (OTW/OTSD)
- -Fault Condition Indicator (nFAULT)
Applications
- Brushless-DC (BLDC) Motor Modules and PMSM
- Fans, Pumps, and Servo Drives
- E-Bikes, E-Scooters, and E-Mobility
- Cordless Garden and Power Tools, Lawnmowers
- Cordless Vacuum Cleaners
- Drones, Robotics, and RC Toys
- Industrial and Logistics Robots
Pin Configuration
Pin Functions-32-Pin DRV8320 Devices
Pin Functions-32-Pin DRV8320 Devices
| PIN | PIN | PIN |
|---|---|---|
| NAME | NO. | NO. |
| NAME | DRV8320H | DRV8320S |
| AGND | 23 | 23 |
| CPH | 1 | 1 |
| CPL | 32 | 32 |
| DVDD | 24 | 24 |
| ENABLE | 22 | 22 |
| GHA | 5 | 5 |
| GHB | 12 | 12 |
| GHC | 13 | 13 |
Electrical Characteristics
at TA = -40°C to +125°C, VVM = 6 to 60 V (unless otherw ise noted)
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWERSUPPLIES (DVDD, VCP, VM) | POWERSUPPLIES (DVDD, VCP, VM) | POWERSUPPLIES (DVDD, VCP, VM) | POWERSUPPLIES (DVDD, VCP, VM) | POWERSUPPLIES (DVDD, VCP, VM) | POWERSUPPLIES (DVDD, VCP, VM) | POWERSUPPLIES (DVDD, VCP, VM) |
| I VM | VM operating supply current | V VM = 24 V, ENABLE = 3.3 V, INHx/INLx = 0 V | 10.5 | 14 | mA | |
| I | VM sleep mode supply current | ENABLE = 0 V, V VM = 24 V, T A = 25°C | 12 | 20 | μA | |
| VMQ | ENABLE = 0 V, V VM = 24 V, T A = 125°C (1) | 50 | ||||
| t RST (1) | Reset pulse time | ENABLE = 0 V period to reset faults | 8 | 40 | μs | |
| t WAKE t | Turnon time | V VM > V UVLO , ENABLE = 3.3 V to outputs ready mode | 1 1 | ms | ||
| SLEEP | Turnoff time DVDD regulator | ENABLE = 0 V to device sleep | ms | |||
| V DVDD | voltage | I DVDD = 0 to 30 mA | 3 | 3.3 | 3.6 | V |
| V VCP | VCP operating voltage with respect to VM | V VM = 13 V, I VCP = 0 to 25 mA V VM = 10 V, I VCP = 0 to 20 mA V VM = 8 V, I VCP = 0 to 15mA | 8.4 6.3 5.4 | 11 9 7 | 12.5 10 8 | V |
| LOGIC-LEVELINPUTS V IL | (CAL, ENABLE, INHx, Input logic lowvoltage Input logic highvoltage Input logic hysteresis | V VM = 6 V, I VCP = 0 to 10mA INLx, nSCS, SCLK, SDI) | 4 | 5 100 | 6 0.8 5.5 | |
| V IH | Input logic lowcurrent Input logic highcurrent Pulldown resistance Propagation delay INPUTS (GAIN, | V VIN = 0 V V VIN = 5 V Hi-Z Tied to DVDD | 0 1.5 -5 | 0.5 1.1 | V V | |
| V HYS I IL I IH R PD t PD V I1 V I2 | Input mode 1 voltage Input mode 2 voltage | Internal pullup to DVDD | 3.3 50 84 | V | ||
| V I3 V I4 | Input mode 4 voltage Pullup resistance | Hi-Z 75 k Ω ± 5%tied to DVDD | 50 100 150 | |||
| V I1 V I2 V I3 | Pulldown resistance | Internal pulldown to AGND | 0 1.2 2 | V V mV | ||
| (nFAULT, SDO) | Tied to AGND | 2.2 | 5 70 | |||
| V I4 V I5 V I6 | (IDRIVE, Input mode 1 voltage Input mode 2 voltage Input mode 3 voltage Input mode 4 voltage Input mode 5 voltage Input mode 6 voltage | 45 k Ω ± 5%to | 2.8 3.3 73 73 | μA μA k Ω | ||
| Input mode 3 voltage | I O = 5 mA To AGND INHx/INLx transition to GHx/GLx transition | -2 | ns | |||
| FOUR-LEVEL H/W MODE) | FOUR-LEVEL H/W MODE) | FOUR-LEVEL H/W MODE) Tied to AGND tied AGND | FOUR-LEVEL H/W MODE) | FOUR-LEVEL H/W MODE) | FOUR-LEVEL H/W MODE) | FOUR-LEVEL H/W MODE) V |
| R PU | k Ω | |||||
| R PD | Pulldown resistance | Internal pulldown to AGND | k Ω | |||
| SEVEN-LEVELH/WINPUTS VDS) | SEVEN-LEVELH/WINPUTS VDS) | SEVEN-LEVELH/WINPUTS VDS) 18 k Ω ± 5%tied to AGND 75 k Ω ± 5%tied to AGND 18 k Ω ± 5%tied to DVDD | SEVEN-LEVELH/WINPUTS VDS) | SEVEN-LEVELH/WINPUTS VDS) 0 1.65 | SEVEN-LEVELH/WINPUTS VDS) | SEVEN-LEVELH/WINPUTS VDS) V V V V V V |
| V I7 | Input mode 7 voltage | Tied to DVDD | V | |||
| R PU | Pullup resistance | Internal pullup to DVDD | k Ω | |||
| R PD | k Ω | |||||
| OPENDRAIN OUTPUTS | OPENDRAIN OUTPUTS | OPENDRAIN OUTPUTS | OPENDRAIN OUTPUTS | OPENDRAIN OUTPUTS | OPENDRAIN OUTPUTS | OPENDRAIN OUTPUTS |
| V OL | Output logic lowvoltage | 0.1 | V | |||
| I OZ | Output high impedance leakage | V O = 5 V | 2 | μA |
Absolute Maximum Ratings
at TA = -40°C to +125°C (unless otherw ise noted) (1)
| MIN | MAX | UNIT | |
|---|---|---|---|
| GATE DRIVER | |||
| Powersupply pin voltage (VM) | -0.3 | 65 | V |
| Voltage differentialbetween ground pins(AGND, BGND, DGND, PGND) | -0.3 | 0.3 | V |
| MOSFET drain sense pin voltage (VDRAIN) | -0.3 | 65 | V |
| Charge pump pin voltage(CPH, VCP) | -0.3 | V VM + 13.5 | V |
| Charge pump negative-switching pinvoltage(CPL) | -0.3 | V VM | V |
| Internal logic regulator pinvoltage (DVDD) | -0.3 | 3.8 | V |
| Digital pin voltage (CAL, ENABLE,GAIN, IDRIVE, INHx, INLx, MODE,nFAULT, nSCS, SCLK, SDI, SDO, VDS) | -0.3 | 5.75 | V |
| Continuoushigh-side gate drivepinvoltage (GHx) | -5 (2) | V VCP + 0.5 | V |
| Transient 200-nshigh-side gate drive pin voltage (GHx) | -7 | V VCP + 0.5 | V |
| High-side gate drive pinvoltage withrespect to SHx(GHx) | -0.3 | 13.5 | V |
| Continuoushigh-side source sense pin voltage(SHx) | -5 (2) | V VM + 5 | V |
| Transient 200-nshigh-side source sense pin voltage (SHx) | -7 | V VM + 7 | V |
| Continuouslow-side gate drivepin voltage (GLx) | -0.5 | 13.5 | V |
| Gate drive pin source current (GHx, GLx) | Internally limited | Internally limited | A |
| Gate drive pin sinkcurrent (GHx, GLx) | Internally limited | Internally limited | A |
| Continuouslow-side source sense pin voltage(SLx) | -1 | 1 | V |
| Transient 200-nslow-side source sense pin voltage (SLx) | -3 | 3 | V |
| Continuousinput pinvoltage (SNx, SPx) | -1 | 1 | V |
| Transient 200-nsinput pin voltage (SNx, SPx) | -3 | 3 | V |
| Reference input pin voltage(VREF) | -0.3 | 5.75 | V |
| output pin voltage(SOx) | -0.3 | V VREF + 0.3 | V |
| BUCK REGULATOR | |||
| Powersupply pin voltage (VIN) | -0.3 | 65 | V |
| Shutdown control pin voltage (nSHDN) | -0.3 | V VIN | V |
| Voltage feedbackpin voltage (FB) | -0.3 | 7 | V |
| Bootstrap pin voltagewith respect to SW(CB) | -0.3 | 7 | V |
| Switching node pinvoltage(SW) | -0.3 | V VIN | V |
| Switching node pinvoltagelessthan 30-nstransients(SW) | -2 | V VIN | V |
| DRV832x | |||
| Operating junctiontemperature, T J | -40 | 150 | °C |
| Storage temperature, T stg | -65 | 150 | °C |
Recommended Operating Conditions
at TA = -40°C to +125°C (unless otherw ise noted)
| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| GATE DRIVER | GATE DRIVER | |||
| V VM | Powersupply voltage (VM) | 6 | 60 | V |
| V I | Input voltage(CAL, ENABLE, GAIN, IDRIVE, INHx, INLx, MODE,nSCS, SCLK, SDI, VDS) | 0 | 5.5 | V |
| f PWM | AppliedPWM signal (INHx, INLx) | 0 | 200 (1) | kHz |
| I GATE_HS | High-side average gate drivecurrent (GHx) | 0 | 25 (1) | mA |
| I GATE_LS | Low-side average gate drive current (GLx) | 0 | 25 (1) | mA |
| I DVDD | External loadcurrent (DVDD) | 0 | 30 (1) | mA |
| V VREF | Reference voltageinput (VREF) | 3 | 5.5 | V |
| I SO | output current (SOx) | 0 | 5 | mA |
| V OD | Open drain pullupvoltage(nFAULT, SDO) | 0 | 5.5 | V |
| I OD | Open drain output current (nFAULT, SDO) | 0 | 5 | mA |
| BUCK REGULATOR | BUCK REGULATOR | |||
| V VIN | Powersupply voltage (VIN) | 4 | 60 | V |
| V nSHDN | Shutdown control input voltage(nSHDN) | 0 | 60 | V |
| DRV832x | DRV832x | |||
| T A | Operating ambient temperature | -40 | 125 | °C |
Thermal Information
| DRV832x | DRV832x | DRV832x | DRV832x | ||
|---|---|---|---|---|---|
| THERMAL METRIC (1) | RTV (WQFN) | RHA (VQFN) | RTA (WQFN) | RGZ (VQFN) | |
| 32 PINS | 40 PINS | 40 PINS | 48 PINS | ||
| R θ JA | Junction-to-ambient thermal resistance | 32.9 | 30.1 | 32.1 | 26.6 |
| R θ JC(top) | Junction-to-case (top) thermal resistance | 15.8 | 16.7 | 11 | 13.9 |
| R θ JB | Junction-to-board thermal resistance | 6.8 | 9.9 | 7.1 | 9.2 |
| ψ JT | Junction-to-topcharacterization parameter | 0.2 | 0.5 | 0.1 | 0.3 |
| ψ JB | Junction-to-board characterizationparameter | 6.8 | 9.9 | 7.1 | 9.1 |
| R θ JC(bot) | Junction-to-case (bottom) thermal resistance | 2.1 | 2.2 | 2.1 | 2 |
Typical Application
The DRV832x family of devices is primarily used in applications for three-phase brushless DC motor control. The design procedures in the Typical Application section highlight how to use and configure the DRV832x family of devices.
Related Variants
The following components are covered by the same datasheet.
| Part Number | Manufacturer | Package |
|---|---|---|
| DRV8320 | Texas Instruments | — |
| DRV8320R | Texas Instruments | — |
| DRV8323 | Texas Instruments | — |
| DRV8323H | Texas Instruments | WQFN (40) |
| DRV8323HRTAR | Texas Instruments | WQFN-40-EP(6x6) |
| DRV8323HRTAR.A | Texas Instruments | — |
| DRV8323HRTAT | Texas Instruments | — |
| DRV8323HRTAT.A | Texas Instruments | — |
| DRV8323R | Texas Instruments | — |
| DRV8323RH | Texas Instruments | VQFN (48) |
| DRV8323RS | Texas Instruments | WQFN (32) |
| DRV8323S | Texas Instruments | WQFN (40) |
| DRV8323SRTAR | Texas Instruments | — |
| DRV8323SRTAR.A | Texas Instruments | — |
| DRV8323SRTAT | Texas Instruments | — |
| DRV8323SRTAT.A | Texas Instruments | — |
| DRV8323X | Texas Instruments | — |
| DRV8323XS | Texas Instruments | — |
| DRV832X | Texas Instruments | — |
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